types.hh revision 6214
12428SN/A/* 22428SN/A * Copyright (c) 2003-2005 The Regents of The University of Michigan 32428SN/A * All rights reserved. 42428SN/A * 52428SN/A * Redistribution and use in source and binary forms, with or without 62428SN/A * modification, are permitted provided that the following conditions are 72428SN/A * met: redistributions of source code must retain the above copyright 82428SN/A * notice, this list of conditions and the following disclaimer; 92428SN/A * redistributions in binary form must reproduce the above copyright 102428SN/A * notice, this list of conditions and the following disclaimer in the 112428SN/A * documentation and/or other materials provided with the distribution; 122428SN/A * neither the name of the copyright holders nor the names of its 132428SN/A * contributors may be used to endorse or promote products derived from 142428SN/A * this software without specific prior written permission. 152428SN/A * 162428SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 172428SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 182428SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 192428SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 202428SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 212428SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 222428SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 232428SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 242428SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 252428SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 262428SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272665Ssaidi@eecs.umich.edu * 282665Ssaidi@eecs.umich.edu * Authors: Nathan Binkert 292665Ssaidi@eecs.umich.edu * Steve Reinhardt 302428SN/A */ 312428SN/A 322428SN/A#ifndef __ARCH_ALPHA_TYPES_HH__ 332428SN/A#define __ARCH_ALPHA_TYPES_HH__ 342428SN/A 356214Snate@binkert.org#include "base/types.hh" 362428SN/A 375569Snate@binkert.orgnamespace AlphaISA { 385569Snate@binkert.org 395569Snate@binkert.orgtypedef uint32_t MachInst; 405569Snate@binkert.orgtypedef uint64_t ExtMachInst; 415569Snate@binkert.orgtypedef uint8_t RegIndex; 425569Snate@binkert.org 435569Snate@binkert.orgtypedef uint64_t IntReg; 445569Snate@binkert.orgtypedef uint64_t LargestRead; 455569Snate@binkert.org 465569Snate@binkert.org// floating point register file entry type 475569Snate@binkert.orgtypedef double FloatReg; 485569Snate@binkert.orgtypedef uint64_t FloatRegBits; 495569Snate@binkert.org 505569Snate@binkert.org// control register file contents 515569Snate@binkert.orgtypedef uint64_t MiscReg; 525569Snate@binkert.org 535569Snate@binkert.orgunion AnyReg 542428SN/A{ 555569Snate@binkert.org IntReg intreg; 565569Snate@binkert.org FloatReg fpreg; 575569Snate@binkert.org MiscReg ctrlreg; 585569Snate@binkert.org}; 592428SN/A 605569Snate@binkert.orgenum annotes 615569Snate@binkert.org{ 625569Snate@binkert.org ANNOTE_NONE = 0, 635569Snate@binkert.org // An impossible number for instruction annotations 645569Snate@binkert.org ITOUCH_ANNOTE = 0xffffffff, 655569Snate@binkert.org}; 662428SN/A 675569Snate@binkert.orgstruct CoreSpecific 685569Snate@binkert.org{ 695569Snate@binkert.org int core_type; 705569Snate@binkert.org}; 712428SN/A 722428SN/A} // namespace AlphaISA 732428SN/A 745569Snate@binkert.org#endif // __ARCH_ALPHA_TYPES_HH__ 75