tlb.hh revision 56 
1/*
2 * Copyright (c) 2003 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#ifndef __ALPHA_MEMORY_HH__
30#define __ALPHA_MEMORY_HH__
31
32#include <map>
33
34#include "targetarch/mem_req.hh"
35#include "sim/sim_object.hh"
36#include "base/statistics.hh"
37
38class ExecContext;
39
40class AlphaTlb : public SimObject
41{
42  protected:
43    typedef std::multimap<Addr, int> PageTable;
44    PageTable lookupTable;	// Quick lookup into page table
45
46    AlphaISA::PTE *table;	// the Page Table
47    int size;			// TLB Size
48    int nlu;			// not last used entry (for replacement)
49
50    void nextnlu() { if (++nlu >= size) nlu = 0; }
51    AlphaISA::PTE *lookup(Addr vpn, uint8_t asn) const;
52
53  public:
54    AlphaTlb(const std::string &name, int size);
55    virtual ~AlphaTlb();
56
57    int getsize() const { return size; }
58
59    AlphaISA::PTE &index();
60    void insert(Addr vaddr, AlphaISA::PTE &pte);
61
62    void flushAll();
63    void flushProcesses();
64    void flushAddr(Addr addr, uint8_t asn);
65
66    // static helper functions... really EV5 VM traits
67    static bool validVirtualAddress(Addr vaddr) {
68        // unimplemented bits must be all 0 or all 1
69        Addr unimplBits = vaddr & VA_UNIMPL_MASK;
70        return (unimplBits == 0) || (unimplBits == VA_UNIMPL_MASK);
71    }
72
73    static void checkCacheability(MemReqPtr req);
74
75    // Checkpointing
76    virtual void serialize();
77    virtual void unserialize(IniFile &db, const std::string &category,
78                             ConfigNode *node);
79
80};
81
82class AlphaItb : public AlphaTlb
83{
84  protected:
85    mutable Statistics::Scalar<> hits;
86    mutable Statistics::Scalar<> misses;
87    mutable Statistics::Scalar<> acv;
88    mutable Statistics::Formula accesses;
89
90  protected:
91    void fault(Addr pc, ExecContext *xc) const;
92
93  public:
94    AlphaItb(const std::string &name, int size);
95    virtual void regStats();
96
97    Fault translate(MemReqPtr req) const;
98};
99
100class AlphaDtb : public AlphaTlb
101{
102  protected:
103    mutable Statistics::Scalar<> read_hits;
104    mutable Statistics::Scalar<> read_misses;
105    mutable Statistics::Scalar<> read_acv;
106    mutable Statistics::Scalar<> read_accesses;
107    mutable Statistics::Scalar<> write_hits;
108    mutable Statistics::Scalar<> write_misses;
109    mutable Statistics::Scalar<> write_acv;
110    mutable Statistics::Scalar<> write_accesses;
111    Statistics::Formula hits;
112    Statistics::Formula misses;
113    Statistics::Formula acv;
114    Statistics::Formula accesses;
115
116  protected:
117    void fault(Addr pc, uint64_t flags, ExecContext *xc) const;
118
119  public:
120    AlphaDtb(const std::string &name, int size);
121    virtual void regStats();
122
123    Fault translate(MemReqPtr req, bool write) const;
124};
125
126#endif // __ALPHA_MEMORY_HH__
127