remote_gdb.cc revision 8229
110391SAndreas.Sandberg@ARM.com/* 212076Sanouk.vanlaer@arm.com * Copyright (c) 2002-2005 The Regents of The University of Michigan 310391SAndreas.Sandberg@ARM.com * All rights reserved. 410391SAndreas.Sandberg@ARM.com * 510391SAndreas.Sandberg@ARM.com * Redistribution and use in source and binary forms, with or without 610391SAndreas.Sandberg@ARM.com * modification, are permitted provided that the following conditions are 710391SAndreas.Sandberg@ARM.com * met: redistributions of source code must retain the above copyright 810391SAndreas.Sandberg@ARM.com * notice, this list of conditions and the following disclaimer; 910391SAndreas.Sandberg@ARM.com * redistributions in binary form must reproduce the above copyright 1010391SAndreas.Sandberg@ARM.com * notice, this list of conditions and the following disclaimer in the 1110391SAndreas.Sandberg@ARM.com * documentation and/or other materials provided with the distribution; 1210391SAndreas.Sandberg@ARM.com * neither the name of the copyright holders nor the names of its 1310391SAndreas.Sandberg@ARM.com * contributors may be used to endorse or promote products derived from 1410391SAndreas.Sandberg@ARM.com * this software without specific prior written permission. 1510391SAndreas.Sandberg@ARM.com * 1610391SAndreas.Sandberg@ARM.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 1710391SAndreas.Sandberg@ARM.com * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 1810391SAndreas.Sandberg@ARM.com * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 1910391SAndreas.Sandberg@ARM.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2010391SAndreas.Sandberg@ARM.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2110391SAndreas.Sandberg@ARM.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 2210391SAndreas.Sandberg@ARM.com * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2310391SAndreas.Sandberg@ARM.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2410391SAndreas.Sandberg@ARM.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2510391SAndreas.Sandberg@ARM.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 2610391SAndreas.Sandberg@ARM.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2710391SAndreas.Sandberg@ARM.com * 2810391SAndreas.Sandberg@ARM.com * Authors: Nathan Binkert 2910391SAndreas.Sandberg@ARM.com */ 3010391SAndreas.Sandberg@ARM.com 3110391SAndreas.Sandberg@ARM.com/* 3210391SAndreas.Sandberg@ARM.com * Copyright (c) 1990, 1993 3310391SAndreas.Sandberg@ARM.com * The Regents of the University of California. All rights reserved. 3410391SAndreas.Sandberg@ARM.com * 3510391SAndreas.Sandberg@ARM.com * This software was developed by the Computer Systems Engineering group 3610391SAndreas.Sandberg@ARM.com * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 3710391SAndreas.Sandberg@ARM.com * contributed to Berkeley. 3810391SAndreas.Sandberg@ARM.com * 3910391SAndreas.Sandberg@ARM.com * All advertising materials mentioning features or use of this software 4011793Sbrandon.potter@amd.com * must display the following acknowledgement: 4111793Sbrandon.potter@amd.com * This product includes software developed by the University of 4211793Sbrandon.potter@amd.com * California, Lawrence Berkeley Laboratories. 4311793Sbrandon.potter@amd.com * 4410391SAndreas.Sandberg@ARM.com * Redistribution and use in source and binary forms, with or without 4510391SAndreas.Sandberg@ARM.com * modification, are permitted provided that the following conditions 4610391SAndreas.Sandberg@ARM.com * are met: 4712076Sanouk.vanlaer@arm.com * 1. Redistributions of source code must retain the above copyright 4812187Sanouk.vanlaer@arm.com * notice, this list of conditions and the following disclaimer. 4910391SAndreas.Sandberg@ARM.com * 2. Redistributions in binary form must reproduce the above copyright 5010391SAndreas.Sandberg@ARM.com * notice, this list of conditions and the following disclaimer in the 5112187Sanouk.vanlaer@arm.com * documentation and/or other materials provided with the distribution. 5212076Sanouk.vanlaer@arm.com * 3. All advertising materials mentioning features or use of this software 5312076Sanouk.vanlaer@arm.com * must display the following acknowledgement: 5412187Sanouk.vanlaer@arm.com * This product includes software developed by the University of 5512076Sanouk.vanlaer@arm.com * California, Berkeley and its contributors. 5610391SAndreas.Sandberg@ARM.com * 4. Neither the name of the University nor the names of its contributors 5710391SAndreas.Sandberg@ARM.com * may be used to endorse or promote products derived from this software 5810391SAndreas.Sandberg@ARM.com * without specific prior written permission. 5910391SAndreas.Sandberg@ARM.com * 6010391SAndreas.Sandberg@ARM.com * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 6110391SAndreas.Sandberg@ARM.com * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 6210391SAndreas.Sandberg@ARM.com * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 6310391SAndreas.Sandberg@ARM.com * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 6410391SAndreas.Sandberg@ARM.com * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 6510391SAndreas.Sandberg@ARM.com * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 6610391SAndreas.Sandberg@ARM.com * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 6710391SAndreas.Sandberg@ARM.com * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 6810391SAndreas.Sandberg@ARM.com * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 6910391SAndreas.Sandberg@ARM.com * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 7010391SAndreas.Sandberg@ARM.com * SUCH DAMAGE. 7110391SAndreas.Sandberg@ARM.com * 7210391SAndreas.Sandberg@ARM.com * @(#)kgdb_stub.c 8.4 (Berkeley) 1/12/94 7310391SAndreas.Sandberg@ARM.com */ 7410391SAndreas.Sandberg@ARM.com 7510391SAndreas.Sandberg@ARM.com/*- 7610391SAndreas.Sandberg@ARM.com * Copyright (c) 2001 The NetBSD Foundation, Inc. 7710391SAndreas.Sandberg@ARM.com * All rights reserved. 7810391SAndreas.Sandberg@ARM.com * 7910391SAndreas.Sandberg@ARM.com * This code is derived from software contributed to The NetBSD Foundation 8010391SAndreas.Sandberg@ARM.com * by Jason R. Thorpe. 8110391SAndreas.Sandberg@ARM.com * 8210391SAndreas.Sandberg@ARM.com * Redistribution and use in source and binary forms, with or without 8310391SAndreas.Sandberg@ARM.com * modification, are permitted provided that the following conditions 8410391SAndreas.Sandberg@ARM.com * are met: 8510391SAndreas.Sandberg@ARM.com * 1. Redistributions of source code must retain the above copyright 8610391SAndreas.Sandberg@ARM.com * notice, this list of conditions and the following disclaimer. 8710391SAndreas.Sandberg@ARM.com * 2. Redistributions in binary form must reproduce the above copyright 8810391SAndreas.Sandberg@ARM.com * notice, this list of conditions and the following disclaimer in the 8910391SAndreas.Sandberg@ARM.com * documentation and/or other materials provided with the distribution. 9010391SAndreas.Sandberg@ARM.com * 3. All advertising materials mentioning features or use of this software 9110391SAndreas.Sandberg@ARM.com * must display the following acknowledgement: 9210391SAndreas.Sandberg@ARM.com * This product includes software developed by the NetBSD 9310391SAndreas.Sandberg@ARM.com * Foundation, Inc. and its contributors. 9410391SAndreas.Sandberg@ARM.com * 4. Neither the name of The NetBSD Foundation nor the names of its 9510391SAndreas.Sandberg@ARM.com * contributors may be used to endorse or promote products derived 9610391SAndreas.Sandberg@ARM.com * from this software without specific prior written permission. 9710391SAndreas.Sandberg@ARM.com * 9810391SAndreas.Sandberg@ARM.com * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 9910391SAndreas.Sandberg@ARM.com * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 10010391SAndreas.Sandberg@ARM.com * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 10110391SAndreas.Sandberg@ARM.com * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 10210391SAndreas.Sandberg@ARM.com * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 10310391SAndreas.Sandberg@ARM.com * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 10410391SAndreas.Sandberg@ARM.com * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 10510391SAndreas.Sandberg@ARM.com * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 10610391SAndreas.Sandberg@ARM.com * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 10710391SAndreas.Sandberg@ARM.com * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 10810391SAndreas.Sandberg@ARM.com * POSSIBILITY OF SUCH DAMAGE. 10910391SAndreas.Sandberg@ARM.com */ 11010391SAndreas.Sandberg@ARM.com 11110391SAndreas.Sandberg@ARM.com/* 11210391SAndreas.Sandberg@ARM.com * $NetBSD: kgdb_stub.c,v 1.8 2001/07/07 22:58:00 wdk Exp $ 11310391SAndreas.Sandberg@ARM.com * 11410391SAndreas.Sandberg@ARM.com * Taken from NetBSD 11510391SAndreas.Sandberg@ARM.com * 11610391SAndreas.Sandberg@ARM.com * "Stub" to allow remote cpu to debug over a serial line using gdb. 11710391SAndreas.Sandberg@ARM.com */ 11810391SAndreas.Sandberg@ARM.com 11910391SAndreas.Sandberg@ARM.com#include <sys/signal.h> 12010391SAndreas.Sandberg@ARM.com#include <unistd.h> 12110391SAndreas.Sandberg@ARM.com 12210391SAndreas.Sandberg@ARM.com#include <string> 12310391SAndreas.Sandberg@ARM.com 12410391SAndreas.Sandberg@ARM.com#include "config/full_system.hh" 12510391SAndreas.Sandberg@ARM.com#if FULL_SYSTEM 12610391SAndreas.Sandberg@ARM.com#include "arch/alpha/vtophys.hh" 12710391SAndreas.Sandberg@ARM.com#endif 12810391SAndreas.Sandberg@ARM.com 12910391SAndreas.Sandberg@ARM.com#include "arch/alpha/kgdb.h" 13010391SAndreas.Sandberg@ARM.com#include "arch/alpha/regredir.hh" 13110391SAndreas.Sandberg@ARM.com#include "arch/alpha/remote_gdb.hh" 13210391SAndreas.Sandberg@ARM.com#include "arch/alpha/utility.hh" 13310391SAndreas.Sandberg@ARM.com#include "base/intmath.hh" 13410391SAndreas.Sandberg@ARM.com#include "base/remote_gdb.hh" 13510391SAndreas.Sandberg@ARM.com#include "base/socket.hh" 13610391SAndreas.Sandberg@ARM.com#include "base/trace.hh" 13710391SAndreas.Sandberg@ARM.com#include "cpu/static_inst.hh" 13810391SAndreas.Sandberg@ARM.com#include "cpu/thread_context.hh" 13910391SAndreas.Sandberg@ARM.com#include "mem/physical.hh" 14010391SAndreas.Sandberg@ARM.com#include "mem/port.hh" 14110391SAndreas.Sandberg@ARM.com#include "sim/system.hh" 14210391SAndreas.Sandberg@ARM.com 14310391SAndreas.Sandberg@ARM.comusing namespace std; 14410391SAndreas.Sandberg@ARM.comusing namespace AlphaISA; 14510391SAndreas.Sandberg@ARM.com 14610391SAndreas.Sandberg@ARM.comRemoteGDB::RemoteGDB(System *_system, ThreadContext *tc) 14710391SAndreas.Sandberg@ARM.com : BaseRemoteGDB(_system, tc, KGDB_NUMREGS) 14810391SAndreas.Sandberg@ARM.com{ 14910391SAndreas.Sandberg@ARM.com memset(gdbregs.regs, 0, gdbregs.bytes()); 15010391SAndreas.Sandberg@ARM.com} 15110391SAndreas.Sandberg@ARM.com 15210391SAndreas.Sandberg@ARM.com/* 15310391SAndreas.Sandberg@ARM.com * Determine if the mapping at va..(va+len) is valid. 15410391SAndreas.Sandberg@ARM.com */ 15510391SAndreas.Sandberg@ARM.combool 15610391SAndreas.Sandberg@ARM.comRemoteGDB::acc(Addr va, size_t len) 15710391SAndreas.Sandberg@ARM.com{ 15810391SAndreas.Sandberg@ARM.com#if !FULL_SYSTEM 15910391SAndreas.Sandberg@ARM.com panic("acc function needs to be rewritten for SE mode\n"); 16010391SAndreas.Sandberg@ARM.com#else 16110391SAndreas.Sandberg@ARM.com Addr last_va; 16210391SAndreas.Sandberg@ARM.com 16310391SAndreas.Sandberg@ARM.com va = TruncPage(va); 16410391SAndreas.Sandberg@ARM.com last_va = RoundPage(va + len); 16510391SAndreas.Sandberg@ARM.com 16610391SAndreas.Sandberg@ARM.com do { 16710391SAndreas.Sandberg@ARM.com if (IsK0Seg(va)) { 16810391SAndreas.Sandberg@ARM.com if (va < (K0SegBase + pmem->size())) { 16910391SAndreas.Sandberg@ARM.com DPRINTF(GDBAcc, "acc: Mapping is valid K0SEG <= " 17010391SAndreas.Sandberg@ARM.com "%#x < K0SEG + size\n", va); 17110391SAndreas.Sandberg@ARM.com return true; 17210391SAndreas.Sandberg@ARM.com } else { 17310391SAndreas.Sandberg@ARM.com DPRINTF(GDBAcc, "acc: Mapping invalid %#x > K0SEG + size\n", 17410391SAndreas.Sandberg@ARM.com va); 17510391SAndreas.Sandberg@ARM.com return false; 17610391SAndreas.Sandberg@ARM.com } 17710391SAndreas.Sandberg@ARM.com } 17810391SAndreas.Sandberg@ARM.com 17910391SAndreas.Sandberg@ARM.com /** 18010391SAndreas.Sandberg@ARM.com * This code says that all accesses to palcode (instruction 18110391SAndreas.Sandberg@ARM.com * and data) are valid since there isn't a va->pa mapping 18210391SAndreas.Sandberg@ARM.com * because palcode is accessed physically. At some point this 18310391SAndreas.Sandberg@ARM.com * should probably be cleaned up but there is no easy way to 18410391SAndreas.Sandberg@ARM.com * do it. 18510391SAndreas.Sandberg@ARM.com */ 18610391SAndreas.Sandberg@ARM.com 18710391SAndreas.Sandberg@ARM.com if (PcPAL(va) || va < 0x10000) 18810391SAndreas.Sandberg@ARM.com return true; 18910391SAndreas.Sandberg@ARM.com 19010391SAndreas.Sandberg@ARM.com Addr ptbr = context->readMiscRegNoEffect(IPR_PALtemp20); 19110391SAndreas.Sandberg@ARM.com PageTableEntry pte = 19210391SAndreas.Sandberg@ARM.com kernel_pte_lookup(context->getPhysPort(), ptbr, va); 19310391SAndreas.Sandberg@ARM.com if (!pte.valid()) { 19410391SAndreas.Sandberg@ARM.com DPRINTF(GDBAcc, "acc: %#x pte is invalid\n", va); 19510391SAndreas.Sandberg@ARM.com return false; 19610391SAndreas.Sandberg@ARM.com } 19710391SAndreas.Sandberg@ARM.com va += PageBytes; 19810391SAndreas.Sandberg@ARM.com } while (va < last_va); 19910391SAndreas.Sandberg@ARM.com 20010391SAndreas.Sandberg@ARM.com DPRINTF(GDBAcc, "acc: %#x mapping is valid\n", va); 20110391SAndreas.Sandberg@ARM.com return true; 20210391SAndreas.Sandberg@ARM.com#endif 20310391SAndreas.Sandberg@ARM.com} 20410391SAndreas.Sandberg@ARM.com 20510391SAndreas.Sandberg@ARM.com/* 20610391SAndreas.Sandberg@ARM.com * Translate the kernel debugger register format into the GDB register 20710391SAndreas.Sandberg@ARM.com * format. 20810391SAndreas.Sandberg@ARM.com */ 20910391SAndreas.Sandberg@ARM.comvoid 21010391SAndreas.Sandberg@ARM.comRemoteGDB::getregs() 21110391SAndreas.Sandberg@ARM.com{ 21210391SAndreas.Sandberg@ARM.com memset(gdbregs.regs, 0, gdbregs.bytes()); 21310391SAndreas.Sandberg@ARM.com 21410391SAndreas.Sandberg@ARM.com gdbregs.regs[KGDB_REG_PC] = context->pcState().pc(); 21511204Ssascha.bischoff@ARM.com 21610391SAndreas.Sandberg@ARM.com // @todo: Currently this is very Alpha specific. 21710391SAndreas.Sandberg@ARM.com if (PcPAL(gdbregs.regs[KGDB_REG_PC])) { 21810391SAndreas.Sandberg@ARM.com for (int i = 0; i < NumIntArchRegs; ++i) { 21910391SAndreas.Sandberg@ARM.com gdbregs.regs[i] = context->readIntReg(reg_redir[i]); 22010391SAndreas.Sandberg@ARM.com } 22110391SAndreas.Sandberg@ARM.com } else { 22210391SAndreas.Sandberg@ARM.com for (int i = 0; i < NumIntArchRegs; ++i) { 22310391SAndreas.Sandberg@ARM.com gdbregs.regs[i] = context->readIntReg(i); 22410391SAndreas.Sandberg@ARM.com } 22511204Ssascha.bischoff@ARM.com } 22610391SAndreas.Sandberg@ARM.com 22711204Ssascha.bischoff@ARM.com#ifdef KGDB_FP_REGS 22811204Ssascha.bischoff@ARM.com for (int i = 0; i < NumFloatArchRegs; ++i) { 22911204Ssascha.bischoff@ARM.com gdbregs.regs[i + KGDB_REG_F0] = context->readFloatRegBits(i); 23011204Ssascha.bischoff@ARM.com } 23111204Ssascha.bischoff@ARM.com#endif 23211204Ssascha.bischoff@ARM.com} 23311204Ssascha.bischoff@ARM.com 23411204Ssascha.bischoff@ARM.com/* 23510391SAndreas.Sandberg@ARM.com * Translate the GDB register format into the kernel debugger register 23610391SAndreas.Sandberg@ARM.com * format. 23710391SAndreas.Sandberg@ARM.com */ 23810905Sandreas.sandberg@arm.comvoid 23910391SAndreas.Sandberg@ARM.comRemoteGDB::setregs() 24011204Ssascha.bischoff@ARM.com{ 24111204Ssascha.bischoff@ARM.com // @todo: Currently this is very Alpha specific. 24211204Ssascha.bischoff@ARM.com if (PcPAL(gdbregs.regs[KGDB_REG_PC])) { 24311204Ssascha.bischoff@ARM.com for (int i = 0; i < NumIntArchRegs; ++i) { 24411204Ssascha.bischoff@ARM.com context->setIntReg(reg_redir[i], gdbregs.regs[i]); 24511204Ssascha.bischoff@ARM.com } 24611204Ssascha.bischoff@ARM.com } else { 24711204Ssascha.bischoff@ARM.com for (int i = 0; i < NumIntArchRegs; ++i) { 24810391SAndreas.Sandberg@ARM.com context->setIntReg(i, gdbregs.regs[i]); 24910391SAndreas.Sandberg@ARM.com } 25010391SAndreas.Sandberg@ARM.com } 25110391SAndreas.Sandberg@ARM.com 25210391SAndreas.Sandberg@ARM.com#ifdef KGDB_FP_REGS 25310391SAndreas.Sandberg@ARM.com for (int i = 0; i < NumFloatArchRegs; ++i) { 25410391SAndreas.Sandberg@ARM.com context->setFloatRegBits(i, gdbregs.regs[i + KGDB_REG_F0]); 25511204Ssascha.bischoff@ARM.com } 25610391SAndreas.Sandberg@ARM.com#endif 25710391SAndreas.Sandberg@ARM.com context->pcState(gdbregs.regs[KGDB_REG_PC]); 25810391SAndreas.Sandberg@ARM.com} 25910391SAndreas.Sandberg@ARM.com 26010391SAndreas.Sandberg@ARM.comvoid 26110391SAndreas.Sandberg@ARM.comRemoteGDB::clearSingleStep() 26210391SAndreas.Sandberg@ARM.com{ 26310391SAndreas.Sandberg@ARM.com DPRINTF(GDBMisc, "clearSingleStep bt_addr=%#x nt_addr=%#x\n", 26410391SAndreas.Sandberg@ARM.com takenBkpt, notTakenBkpt); 26510391SAndreas.Sandberg@ARM.com 26610391SAndreas.Sandberg@ARM.com if (takenBkpt != 0) 26710391SAndreas.Sandberg@ARM.com clearTempBreakpoint(takenBkpt); 26810391SAndreas.Sandberg@ARM.com 26910391SAndreas.Sandberg@ARM.com if (notTakenBkpt != 0) 27010391SAndreas.Sandberg@ARM.com clearTempBreakpoint(notTakenBkpt); 27110391SAndreas.Sandberg@ARM.com} 27210391SAndreas.Sandberg@ARM.com 27310391SAndreas.Sandberg@ARM.comvoid 27410391SAndreas.Sandberg@ARM.comRemoteGDB::setSingleStep() 27510391SAndreas.Sandberg@ARM.com{ 27610391SAndreas.Sandberg@ARM.com PCState pc = context->pcState(); 27710391SAndreas.Sandberg@ARM.com PCState bpc; 27810391SAndreas.Sandberg@ARM.com bool set_bt = false; 27910391SAndreas.Sandberg@ARM.com 28010391SAndreas.Sandberg@ARM.com // User was stopped at pc, e.g. the instruction at pc was not 28110391SAndreas.Sandberg@ARM.com // executed. 28210391SAndreas.Sandberg@ARM.com MachInst inst = read<MachInst>(pc.pc()); 28310391SAndreas.Sandberg@ARM.com StaticInstPtr si(inst, pc.pc()); 28410391SAndreas.Sandberg@ARM.com if (si->hasBranchTarget(pc, context, bpc)) { 28510391SAndreas.Sandberg@ARM.com // Don't bother setting a breakpoint on the taken branch if it 28610391SAndreas.Sandberg@ARM.com // is the same as the next pc 28710391SAndreas.Sandberg@ARM.com if (bpc.pc() != pc.npc()) 28810391SAndreas.Sandberg@ARM.com set_bt = true; 28910391SAndreas.Sandberg@ARM.com } 29010391SAndreas.Sandberg@ARM.com 29110391SAndreas.Sandberg@ARM.com DPRINTF(GDBMisc, "setSingleStep bt_addr=%#x nt_addr=%#x\n", 29210391SAndreas.Sandberg@ARM.com takenBkpt, notTakenBkpt); 29310391SAndreas.Sandberg@ARM.com 29410391SAndreas.Sandberg@ARM.com setTempBreakpoint(notTakenBkpt = pc.npc()); 29510391SAndreas.Sandberg@ARM.com 29610391SAndreas.Sandberg@ARM.com if (set_bt) 29710391SAndreas.Sandberg@ARM.com setTempBreakpoint(takenBkpt = bpc.pc()); 29810391SAndreas.Sandberg@ARM.com} 29910391SAndreas.Sandberg@ARM.com 30010391SAndreas.Sandberg@ARM.com// Write bytes to kernel address space for debugger. 30110391SAndreas.Sandberg@ARM.combool 30210391SAndreas.Sandberg@ARM.comRemoteGDB::write(Addr vaddr, size_t size, const char *data) 30310391SAndreas.Sandberg@ARM.com{ 30410391SAndreas.Sandberg@ARM.com if (BaseRemoteGDB::write(vaddr, size, data)) { 30510391SAndreas.Sandberg@ARM.com#ifdef IMB 30610391SAndreas.Sandberg@ARM.com alpha_pal_imb(); 30710391SAndreas.Sandberg@ARM.com#endif 30810391SAndreas.Sandberg@ARM.com return true; 30910391SAndreas.Sandberg@ARM.com } else { 31010391SAndreas.Sandberg@ARM.com return false; 31110391SAndreas.Sandberg@ARM.com } 31210391SAndreas.Sandberg@ARM.com} 31310391SAndreas.Sandberg@ARM.com 31410391SAndreas.Sandberg@ARM.com