process.cc revision 13614
1/* 2 * Copyright (c) 2003-2004 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Gabe Black 29 * Ali Saidi 30 */ 31 32#include "arch/alpha/process.hh" 33 34#include "arch/alpha/isa_traits.hh" 35#include "base/loader/elf_object.hh" 36#include "base/loader/object_file.hh" 37#include "base/logging.hh" 38#include "cpu/thread_context.hh" 39#include "debug/Loader.hh" 40#include "mem/page_table.hh" 41#include "params/Process.hh" 42#include "sim/aux_vector.hh" 43#include "sim/byteswap.hh" 44#include "sim/process_impl.hh" 45#include "sim/syscall_return.hh" 46#include "sim/system.hh" 47 48using namespace AlphaISA; 49using namespace std; 50 51AlphaProcess::AlphaProcess(ProcessParams *params, ObjectFile *objFile) 52 : Process(params, 53 new EmulationPageTable(params->name, params->pid, PageBytes), 54 objFile) 55{ 56 fatal_if(params->useArchPT, "Arch page tables not implemented."); 57 Addr brk_point = objFile->dataBase() + objFile->dataSize() + 58 objFile->bssSize(); 59 brk_point = roundUp(brk_point, PageBytes); 60 61 // Set up stack. On Alpha, stack goes below text section. This 62 // code should get moved to some architecture-specific spot. 63 Addr stack_base = objFile->textBase() - (409600+4096); 64 65 // Set up region for mmaps. 66 Addr mmap_end = 0x10000; 67 68 Addr max_stack_size = 8 * 1024 * 1024; 69 70 // Set pointer for next thread stack. Reserve 8M for main stack. 71 Addr next_thread_stack_base = stack_base - max_stack_size; 72 73 memState = make_shared<MemState>(brk_point, stack_base, max_stack_size, 74 next_thread_stack_base, mmap_end); 75} 76 77void 78AlphaProcess::argsInit(int intSize, int pageSize) 79{ 80 // Patch the ld_bias for dynamic executables. 81 updateBias(); 82 83 objFile->loadSections(initVirtMem); 84 85 typedef AuxVector<uint64_t> auxv_t; 86 std::vector<auxv_t> auxv; 87 88 ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile); 89 if (elfObject) 90 { 91 // modern glibc uses a bunch of auxiliary vectors to set up 92 // TLS as well as do a bunch of other stuff 93 // these vectors go on the bottom of the stack, below argc/argv/envp 94 // pointers but above actual arg strings 95 // I don't have all the ones glibc looks at here, but so far it doesn't 96 // seem to be a problem. 97 // check out _dl_aux_init() in glibc/elf/dl-support.c for details 98 // --Lisa 99 auxv.push_back(auxv_t(M5_AT_PAGESZ, AlphaISA::PageBytes)); 100 auxv.push_back(auxv_t(M5_AT_CLKTCK, 100)); 101 auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable())); 102 DPRINTF(Loader, "auxv at PHDR %08p\n", elfObject->programHeaderTable()); 103 auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount())); 104 // This is the base address of the ELF interpreter; it should be 105 // zero for static executables or contain the base address for 106 // dynamic executables. 107 auxv.push_back(auxv_t(M5_AT_BASE, getBias())); 108 auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint())); 109 auxv.push_back(auxv_t(M5_AT_UID, uid())); 110 auxv.push_back(auxv_t(M5_AT_EUID, euid())); 111 auxv.push_back(auxv_t(M5_AT_GID, gid())); 112 auxv.push_back(auxv_t(M5_AT_EGID, egid())); 113 114 } 115 116 // Calculate how much space we need for arg & env & auxv arrays. 117 int argv_array_size = intSize * (argv.size() + 1); 118 int envp_array_size = intSize * (envp.size() + 1); 119 int auxv_array_size = intSize * 2 * (auxv.size() + 1); 120 121 int arg_data_size = 0; 122 for (vector<string>::size_type i = 0; i < argv.size(); ++i) { 123 arg_data_size += argv[i].size() + 1; 124 } 125 int env_data_size = 0; 126 for (vector<string>::size_type i = 0; i < envp.size(); ++i) { 127 env_data_size += envp[i].size() + 1; 128 } 129 130 int space_needed = 131 argv_array_size + 132 envp_array_size + 133 auxv_array_size + 134 arg_data_size + 135 env_data_size; 136 137 if (space_needed < 32*1024) 138 space_needed = 32*1024; 139 140 // set bottom of stack 141 memState->setStackMin(memState->getStackBase() - space_needed); 142 // align it 143 memState->setStackMin(roundDown(memState->getStackMin(), pageSize)); 144 memState->setStackSize(memState->getStackBase() - memState->getStackMin()); 145 // map memory 146 allocateMem(memState->getStackMin(), roundUp(memState->getStackSize(), 147 pageSize)); 148 149 // map out initial stack contents 150 Addr argv_array_base = memState->getStackMin() + intSize; // room for argc 151 Addr envp_array_base = argv_array_base + argv_array_size; 152 Addr auxv_array_base = envp_array_base + envp_array_size; 153 Addr arg_data_base = auxv_array_base + auxv_array_size; 154 Addr env_data_base = arg_data_base + arg_data_size; 155 156 // write contents to stack 157 uint64_t argc = argv.size(); 158 if (intSize == 8) 159 argc = htog((uint64_t)argc); 160 else if (intSize == 4) 161 argc = htog((uint32_t)argc); 162 else 163 panic("Unknown int size"); 164 165 initVirtMem.writeBlob(memState->getStackMin(), (uint8_t*)&argc, intSize); 166 167 copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem); 168 copyStringArray(envp, envp_array_base, env_data_base, initVirtMem); 169 170 //Copy the aux stuff 171 for (vector<auxv_t>::size_type x = 0; x < auxv.size(); x++) { 172 initVirtMem.writeBlob(auxv_array_base + x * 2 * intSize, 173 (uint8_t*)&(auxv[x].getAuxType()), intSize); 174 initVirtMem.writeBlob(auxv_array_base + (x * 2 + 1) * intSize, 175 (uint8_t*)&(auxv[x].getAuxVal()), intSize); 176 } 177 178 ThreadContext *tc = system->getThreadContext(contextIds[0]); 179 180 setSyscallArg(tc, 0, argc); 181 setSyscallArg(tc, 1, argv_array_base); 182 tc->setIntReg(StackPointerReg, memState->getStackMin()); 183 184 tc->pcState(getStartPC()); 185} 186 187void 188AlphaProcess::setupASNReg() 189{ 190 ThreadContext *tc = system->getThreadContext(contextIds[0]); 191 tc->setMiscRegNoEffect(IPR_DTB_ASN, _pid << 57); 192} 193 194 195void 196AlphaProcess::unserialize(CheckpointIn &cp) 197{ 198 Process::unserialize(cp); 199 // need to set up ASN after unserialization since _pid value may 200 // come from checkpoint 201 setupASNReg(); 202} 203 204 205void 206AlphaProcess::initState() 207{ 208 // need to set up ASN before further initialization since init 209 // will involve writing to virtual memory addresses 210 setupASNReg(); 211 212 Process::initState(); 213 214 argsInit(MachineBytes, PageBytes); 215 216 ThreadContext *tc = system->getThreadContext(contextIds[0]); 217 tc->setIntReg(GlobalPointerReg, objFile->globalPointer()); 218 //Operate in user mode 219 tc->setMiscRegNoEffect(IPR_ICM, mode_user << 3); 220 tc->setMiscRegNoEffect(IPR_DTB_CM, mode_user << 3); 221 //No super page mapping 222 tc->setMiscRegNoEffect(IPR_MCSR, 0); 223} 224 225RegVal 226AlphaProcess::getSyscallArg(ThreadContext *tc, int &i) 227{ 228 assert(i < 6); 229 return tc->readIntReg(FirstArgumentReg + i++); 230} 231 232void 233AlphaProcess::setSyscallArg(ThreadContext *tc, int i, RegVal val) 234{ 235 assert(i < 6); 236 tc->setIntReg(FirstArgumentReg + i, val); 237} 238 239void 240AlphaProcess::setSyscallReturn(ThreadContext *tc, SyscallReturn sysret) 241{ 242 // check for error condition. Alpha syscall convention is to 243 // indicate success/failure in reg a3 (r19) and put the 244 // return value itself in the standard return value reg (v0). 245 if (sysret.successful()) { 246 // no error 247 tc->setIntReg(SyscallSuccessReg, 0); 248 tc->setIntReg(ReturnValueReg, sysret.returnValue()); 249 } else { 250 // got an error, return details 251 tc->setIntReg(SyscallSuccessReg, (RegVal)-1); 252 tc->setIntReg(ReturnValueReg, sysret.errnoValue()); 253 } 254} 255