process.cc revision 12432:2480d8b432f5
1/* 2 * Copyright (c) 2003-2004 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Gabe Black 29 * Ali Saidi 30 */ 31 32#include "arch/alpha/process.hh" 33 34#include "arch/alpha/isa_traits.hh" 35#include "base/loader/elf_object.hh" 36#include "base/loader/object_file.hh" 37#include "base/logging.hh" 38#include "cpu/thread_context.hh" 39#include "debug/Loader.hh" 40#include "mem/page_table.hh" 41#include "params/Process.hh" 42#include "sim/aux_vector.hh" 43#include "sim/byteswap.hh" 44#include "sim/process_impl.hh" 45#include "sim/syscall_return.hh" 46#include "sim/system.hh" 47 48using namespace AlphaISA; 49using namespace std; 50 51AlphaProcess::AlphaProcess(ProcessParams *params, ObjectFile *objFile) 52 : Process(params, new FuncPageTable(params->name, params->pid, PageBytes), 53 objFile) 54{ 55 fatal_if(!params->useArchPT, "Arch page tables not implemented."); 56 Addr brk_point = objFile->dataBase() + objFile->dataSize() + 57 objFile->bssSize(); 58 brk_point = roundUp(brk_point, PageBytes); 59 60 // Set up stack. On Alpha, stack goes below text section. This 61 // code should get moved to some architecture-specific spot. 62 Addr stack_base = objFile->textBase() - (409600+4096); 63 64 // Set up region for mmaps. 65 Addr mmap_end = 0x10000; 66 67 Addr max_stack_size = 8 * 1024 * 1024; 68 69 // Set pointer for next thread stack. Reserve 8M for main stack. 70 Addr next_thread_stack_base = stack_base - max_stack_size; 71 72 memState = make_shared<MemState>(brk_point, stack_base, max_stack_size, 73 next_thread_stack_base, mmap_end); 74} 75 76void 77AlphaProcess::argsInit(int intSize, int pageSize) 78{ 79 // Patch the ld_bias for dynamic executables. 80 updateBias(); 81 82 objFile->loadSections(initVirtMem); 83 84 typedef AuxVector<uint64_t> auxv_t; 85 std::vector<auxv_t> auxv; 86 87 ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile); 88 if (elfObject) 89 { 90 // modern glibc uses a bunch of auxiliary vectors to set up 91 // TLS as well as do a bunch of other stuff 92 // these vectors go on the bottom of the stack, below argc/argv/envp 93 // pointers but above actual arg strings 94 // I don't have all the ones glibc looks at here, but so far it doesn't 95 // seem to be a problem. 96 // check out _dl_aux_init() in glibc/elf/dl-support.c for details 97 // --Lisa 98 auxv.push_back(auxv_t(M5_AT_PAGESZ, AlphaISA::PageBytes)); 99 auxv.push_back(auxv_t(M5_AT_CLKTCK, 100)); 100 auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable())); 101 DPRINTF(Loader, "auxv at PHDR %08p\n", elfObject->programHeaderTable()); 102 auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount())); 103 // This is the base address of the ELF interpreter; it should be 104 // zero for static executables or contain the base address for 105 // dynamic executables. 106 auxv.push_back(auxv_t(M5_AT_BASE, getBias())); 107 auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint())); 108 auxv.push_back(auxv_t(M5_AT_UID, uid())); 109 auxv.push_back(auxv_t(M5_AT_EUID, euid())); 110 auxv.push_back(auxv_t(M5_AT_GID, gid())); 111 auxv.push_back(auxv_t(M5_AT_EGID, egid())); 112 113 } 114 115 // Calculate how much space we need for arg & env & auxv arrays. 116 int argv_array_size = intSize * (argv.size() + 1); 117 int envp_array_size = intSize * (envp.size() + 1); 118 int auxv_array_size = intSize * 2 * (auxv.size() + 1); 119 120 int arg_data_size = 0; 121 for (vector<string>::size_type i = 0; i < argv.size(); ++i) { 122 arg_data_size += argv[i].size() + 1; 123 } 124 int env_data_size = 0; 125 for (vector<string>::size_type i = 0; i < envp.size(); ++i) { 126 env_data_size += envp[i].size() + 1; 127 } 128 129 int space_needed = 130 argv_array_size + 131 envp_array_size + 132 auxv_array_size + 133 arg_data_size + 134 env_data_size; 135 136 if (space_needed < 32*1024) 137 space_needed = 32*1024; 138 139 // set bottom of stack 140 memState->setStackMin(memState->getStackBase() - space_needed); 141 // align it 142 memState->setStackMin(roundDown(memState->getStackMin(), pageSize)); 143 memState->setStackSize(memState->getStackBase() - memState->getStackMin()); 144 // map memory 145 allocateMem(memState->getStackMin(), roundUp(memState->getStackSize(), 146 pageSize)); 147 148 // map out initial stack contents 149 Addr argv_array_base = memState->getStackMin() + intSize; // room for argc 150 Addr envp_array_base = argv_array_base + argv_array_size; 151 Addr auxv_array_base = envp_array_base + envp_array_size; 152 Addr arg_data_base = auxv_array_base + auxv_array_size; 153 Addr env_data_base = arg_data_base + arg_data_size; 154 155 // write contents to stack 156 uint64_t argc = argv.size(); 157 if (intSize == 8) 158 argc = htog((uint64_t)argc); 159 else if (intSize == 4) 160 argc = htog((uint32_t)argc); 161 else 162 panic("Unknown int size"); 163 164 initVirtMem.writeBlob(memState->getStackMin(), (uint8_t*)&argc, intSize); 165 166 copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem); 167 copyStringArray(envp, envp_array_base, env_data_base, initVirtMem); 168 169 //Copy the aux stuff 170 for (vector<auxv_t>::size_type x = 0; x < auxv.size(); x++) { 171 initVirtMem.writeBlob(auxv_array_base + x * 2 * intSize, 172 (uint8_t*)&(auxv[x].a_type), intSize); 173 initVirtMem.writeBlob(auxv_array_base + (x * 2 + 1) * intSize, 174 (uint8_t*)&(auxv[x].a_val), intSize); 175 } 176 177 ThreadContext *tc = system->getThreadContext(contextIds[0]); 178 179 setSyscallArg(tc, 0, argc); 180 setSyscallArg(tc, 1, argv_array_base); 181 tc->setIntReg(StackPointerReg, memState->getStackMin()); 182 183 tc->pcState(getStartPC()); 184} 185 186void 187AlphaProcess::setupASNReg() 188{ 189 ThreadContext *tc = system->getThreadContext(contextIds[0]); 190 tc->setMiscRegNoEffect(IPR_DTB_ASN, _pid << 57); 191} 192 193 194void 195AlphaProcess::unserialize(CheckpointIn &cp) 196{ 197 Process::unserialize(cp); 198 // need to set up ASN after unserialization since _pid value may 199 // come from checkpoint 200 setupASNReg(); 201} 202 203 204void 205AlphaProcess::initState() 206{ 207 // need to set up ASN before further initialization since init 208 // will involve writing to virtual memory addresses 209 setupASNReg(); 210 211 Process::initState(); 212 213 argsInit(MachineBytes, PageBytes); 214 215 ThreadContext *tc = system->getThreadContext(contextIds[0]); 216 tc->setIntReg(GlobalPointerReg, objFile->globalPointer()); 217 //Operate in user mode 218 tc->setMiscRegNoEffect(IPR_ICM, mode_user << 3); 219 tc->setMiscRegNoEffect(IPR_DTB_CM, mode_user << 3); 220 //No super page mapping 221 tc->setMiscRegNoEffect(IPR_MCSR, 0); 222} 223 224AlphaISA::IntReg 225AlphaProcess::getSyscallArg(ThreadContext *tc, int &i) 226{ 227 assert(i < 6); 228 return tc->readIntReg(FirstArgumentReg + i++); 229} 230 231void 232AlphaProcess::setSyscallArg(ThreadContext *tc, int i, AlphaISA::IntReg val) 233{ 234 assert(i < 6); 235 tc->setIntReg(FirstArgumentReg + i, val); 236} 237 238void 239AlphaProcess::setSyscallReturn(ThreadContext *tc, SyscallReturn sysret) 240{ 241 // check for error condition. Alpha syscall convention is to 242 // indicate success/failure in reg a3 (r19) and put the 243 // return value itself in the standard return value reg (v0). 244 if (sysret.successful()) { 245 // no error 246 tc->setIntReg(SyscallSuccessReg, 0); 247 tc->setIntReg(ReturnValueReg, sysret.returnValue()); 248 } else { 249 // got an error, return details 250 tc->setIntReg(SyscallSuccessReg, (IntReg)-1); 251 tc->setIntReg(ReturnValueReg, sysret.errnoValue()); 252 } 253} 254