process.cc revision 12431 
1/*
2 * Copyright (c) 2003-2004 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 *          Ali Saidi
30 */
31
32#include "arch/alpha/process.hh"
33
34#include "arch/alpha/isa_traits.hh"
35#include "base/loader/elf_object.hh"
36#include "base/loader/object_file.hh"
37#include "base/logging.hh"
38#include "cpu/thread_context.hh"
39#include "debug/Loader.hh"
40#include "mem/page_table.hh"
41#include "params/Process.hh"
42#include "sim/aux_vector.hh"
43#include "sim/byteswap.hh"
44#include "sim/process_impl.hh"
45#include "sim/syscall_return.hh"
46#include "sim/system.hh"
47
48using namespace AlphaISA;
49using namespace std;
50
51AlphaProcess::AlphaProcess(ProcessParams *params, ObjectFile *objFile)
52    : Process(params, new FuncPageTable(params->name, params->pid), objFile)
53{
54    fatal_if(!params->useArchPT, "Arch page tables not implemented.");
55    Addr brk_point = objFile->dataBase() + objFile->dataSize() +
56                     objFile->bssSize();
57    brk_point = roundUp(brk_point, PageBytes);
58
59    // Set up stack.  On Alpha, stack goes below text section.  This
60    // code should get moved to some architecture-specific spot.
61    Addr stack_base = objFile->textBase() - (409600+4096);
62
63    // Set up region for mmaps.
64    Addr mmap_end = 0x10000;
65
66    Addr max_stack_size = 8 * 1024 * 1024;
67
68    // Set pointer for next thread stack.  Reserve 8M for main stack.
69    Addr next_thread_stack_base = stack_base - max_stack_size;
70
71    memState = make_shared<MemState>(brk_point, stack_base, max_stack_size,
72                                     next_thread_stack_base, mmap_end);
73}
74
75void
76AlphaProcess::argsInit(int intSize, int pageSize)
77{
78    // Patch the ld_bias for dynamic executables.
79    updateBias();
80
81    objFile->loadSections(initVirtMem);
82
83    typedef AuxVector<uint64_t> auxv_t;
84    std::vector<auxv_t>  auxv;
85
86    ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile);
87    if (elfObject)
88    {
89        // modern glibc uses a bunch of auxiliary vectors to set up
90        // TLS as well as do a bunch of other stuff
91        // these vectors go on the bottom of the stack, below argc/argv/envp
92        // pointers but above actual arg strings
93        // I don't have all the ones glibc looks at here, but so far it doesn't
94        // seem to be a problem.
95        // check out _dl_aux_init() in glibc/elf/dl-support.c for details
96        // --Lisa
97        auxv.push_back(auxv_t(M5_AT_PAGESZ, AlphaISA::PageBytes));
98        auxv.push_back(auxv_t(M5_AT_CLKTCK, 100));
99        auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable()));
100        DPRINTF(Loader, "auxv at PHDR %08p\n", elfObject->programHeaderTable());
101        auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount()));
102        // This is the base address of the ELF interpreter; it should be
103        // zero for static executables or contain the base address for
104        // dynamic executables.
105        auxv.push_back(auxv_t(M5_AT_BASE, getBias()));
106        auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint()));
107        auxv.push_back(auxv_t(M5_AT_UID, uid()));
108        auxv.push_back(auxv_t(M5_AT_EUID, euid()));
109        auxv.push_back(auxv_t(M5_AT_GID, gid()));
110        auxv.push_back(auxv_t(M5_AT_EGID, egid()));
111
112    }
113
114    // Calculate how much space we need for arg & env & auxv arrays.
115    int argv_array_size = intSize * (argv.size() + 1);
116    int envp_array_size = intSize * (envp.size() + 1);
117    int auxv_array_size = intSize * 2 * (auxv.size() + 1);
118
119    int arg_data_size = 0;
120    for (vector<string>::size_type i = 0; i < argv.size(); ++i) {
121        arg_data_size += argv[i].size() + 1;
122    }
123    int env_data_size = 0;
124    for (vector<string>::size_type i = 0; i < envp.size(); ++i) {
125        env_data_size += envp[i].size() + 1;
126    }
127
128    int space_needed =
129        argv_array_size +
130        envp_array_size +
131        auxv_array_size +
132        arg_data_size +
133        env_data_size;
134
135    if (space_needed < 32*1024)
136        space_needed = 32*1024;
137
138    // set bottom of stack
139    memState->setStackMin(memState->getStackBase() - space_needed);
140    // align it
141    memState->setStackMin(roundDown(memState->getStackMin(), pageSize));
142    memState->setStackSize(memState->getStackBase() - memState->getStackMin());
143    // map memory
144    allocateMem(memState->getStackMin(), roundUp(memState->getStackSize(),
145                pageSize));
146
147    // map out initial stack contents
148    Addr argv_array_base = memState->getStackMin() + intSize; // room for argc
149    Addr envp_array_base = argv_array_base + argv_array_size;
150    Addr auxv_array_base = envp_array_base + envp_array_size;
151    Addr arg_data_base = auxv_array_base + auxv_array_size;
152    Addr env_data_base = arg_data_base + arg_data_size;
153
154    // write contents to stack
155    uint64_t argc = argv.size();
156    if (intSize == 8)
157        argc = htog((uint64_t)argc);
158    else if (intSize == 4)
159        argc = htog((uint32_t)argc);
160    else
161        panic("Unknown int size");
162
163    initVirtMem.writeBlob(memState->getStackMin(), (uint8_t*)&argc, intSize);
164
165    copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem);
166    copyStringArray(envp, envp_array_base, env_data_base, initVirtMem);
167
168    //Copy the aux stuff
169    for (vector<auxv_t>::size_type x = 0; x < auxv.size(); x++) {
170        initVirtMem.writeBlob(auxv_array_base + x * 2 * intSize,
171                (uint8_t*)&(auxv[x].a_type), intSize);
172        initVirtMem.writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
173                (uint8_t*)&(auxv[x].a_val), intSize);
174    }
175
176    ThreadContext *tc = system->getThreadContext(contextIds[0]);
177
178    setSyscallArg(tc, 0, argc);
179    setSyscallArg(tc, 1, argv_array_base);
180    tc->setIntReg(StackPointerReg, memState->getStackMin());
181
182    tc->pcState(getStartPC());
183}
184
185void
186AlphaProcess::setupASNReg()
187{
188    ThreadContext *tc = system->getThreadContext(contextIds[0]);
189    tc->setMiscRegNoEffect(IPR_DTB_ASN, _pid << 57);
190}
191
192
193void
194AlphaProcess::unserialize(CheckpointIn &cp)
195{
196    Process::unserialize(cp);
197    // need to set up ASN after unserialization since _pid value may
198    // come from checkpoint
199    setupASNReg();
200}
201
202
203void
204AlphaProcess::initState()
205{
206    // need to set up ASN before further initialization since init
207    // will involve writing to virtual memory addresses
208    setupASNReg();
209
210    Process::initState();
211
212    argsInit(MachineBytes, PageBytes);
213
214    ThreadContext *tc = system->getThreadContext(contextIds[0]);
215    tc->setIntReg(GlobalPointerReg, objFile->globalPointer());
216    //Operate in user mode
217    tc->setMiscRegNoEffect(IPR_ICM, mode_user << 3);
218    tc->setMiscRegNoEffect(IPR_DTB_CM, mode_user << 3);
219    //No super page mapping
220    tc->setMiscRegNoEffect(IPR_MCSR, 0);
221}
222
223AlphaISA::IntReg
224AlphaProcess::getSyscallArg(ThreadContext *tc, int &i)
225{
226    assert(i < 6);
227    return tc->readIntReg(FirstArgumentReg + i++);
228}
229
230void
231AlphaProcess::setSyscallArg(ThreadContext *tc, int i, AlphaISA::IntReg val)
232{
233    assert(i < 6);
234    tc->setIntReg(FirstArgumentReg + i, val);
235}
236
237void
238AlphaProcess::setSyscallReturn(ThreadContext *tc, SyscallReturn sysret)
239{
240    // check for error condition.  Alpha syscall convention is to
241    // indicate success/failure in reg a3 (r19) and put the
242    // return value itself in the standard return value reg (v0).
243    if (sysret.successful()) {
244        // no error
245        tc->setIntReg(SyscallSuccessReg, 0);
246        tc->setIntReg(ReturnValueReg, sysret.returnValue());
247    } else {
248        // got an error, return details
249        tc->setIntReg(SyscallSuccessReg, (IntReg)-1);
250        tc->setIntReg(ReturnValueReg, sysret.errnoValue());
251    }
252}
253