kernel_stats.hh revision 11168
12623SN/A/* 211147Smitch.hayenga@arm.com * Copyright (c) 2004-2005 The Regents of The University of Michigan 39442SAndreas.Sandberg@ARM.com * All rights reserved. 49442SAndreas.Sandberg@ARM.com * 59442SAndreas.Sandberg@ARM.com * Redistribution and use in source and binary forms, with or without 69442SAndreas.Sandberg@ARM.com * modification, are permitted provided that the following conditions are 79442SAndreas.Sandberg@ARM.com * met: redistributions of source code must retain the above copyright 89442SAndreas.Sandberg@ARM.com * notice, this list of conditions and the following disclaimer; 99442SAndreas.Sandberg@ARM.com * redistributions in binary form must reproduce the above copyright 109442SAndreas.Sandberg@ARM.com * notice, this list of conditions and the following disclaimer in the 119442SAndreas.Sandberg@ARM.com * documentation and/or other materials provided with the distribution; 129442SAndreas.Sandberg@ARM.com * neither the name of the copyright holders nor the names of its 139442SAndreas.Sandberg@ARM.com * contributors may be used to endorse or promote products derived from 142623SN/A * this software without specific prior written permission. 152623SN/A * 162623SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 172623SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 182623SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 192623SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 202623SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 212623SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 222623SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 232623SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 242623SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 252623SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 262623SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272623SN/A * 282623SN/A * Authors: Lisa Hsu 292623SN/A * Nathan Binkert 302623SN/A */ 312623SN/A 322623SN/A#ifndef __ARCH_ALPHA_KERNEL_STATS_HH__ 332623SN/A#define __ARCH_ALPHA_KERNEL_STATS_HH__ 342623SN/A 352623SN/A#include <map> 362623SN/A#include <stack> 372623SN/A#include <string> 382623SN/A#include <vector> 392665Ssaidi@eecs.umich.edu 402665Ssaidi@eecs.umich.edu#include "cpu/static_inst.hh" 412623SN/A#include "kern/kernel_stats.hh" 422623SN/A 432623SN/Aclass BaseCPU; 442623SN/Aclass ThreadContext; 452623SN/Aclass FnEvent; 462623SN/A// What does kernel stats expect is included? 4711147Smitch.hayenga@arm.comclass System; 486973Stjones1@inf.ed.ac.uk 495529Snate@binkert.orgnamespace AlphaISA { 505529Snate@binkert.orgnamespace Kernel { 512623SN/A 522623SN/Aenum cpu_mode { kernel, user, idle, cpu_mode_num }; 532623SN/Aextern const char *modestr[]; 542623SN/A 555529Snate@binkert.orgclass Statistics : public ::Kernel::Statistics 562623SN/A{ 572623SN/A protected: 5811169Sandreas.hansson@arm.com Addr idleProcess; 592623SN/A cpu_mode themode; 602623SN/A Tick lastModeTick; 612623SN/A 625728Sgblack@eecs.umich.edu void changeMode(cpu_mode newmode, ThreadContext *tc); 635728Sgblack@eecs.umich.edu 645728Sgblack@eecs.umich.edu private: 655728Sgblack@eecs.umich.edu Stats::Vector _callpal; 665728Sgblack@eecs.umich.edu// Stats::Vector _faults; 675728Sgblack@eecs.umich.edu 685728Sgblack@eecs.umich.edu Stats::Vector _mode; 695728Sgblack@eecs.umich.edu Stats::Vector _modeGood; 705728Sgblack@eecs.umich.edu Stats::Formula _modeFraction; 715728Sgblack@eecs.umich.edu Stats::Vector _modeTicks; 725728Sgblack@eecs.umich.edu 735728Sgblack@eecs.umich.edu Stats::Scalar _swap_context; 745728Sgblack@eecs.umich.edu 755728Sgblack@eecs.umich.edu public: 765728Sgblack@eecs.umich.edu Statistics(System *system); 775728Sgblack@eecs.umich.edu 785728Sgblack@eecs.umich.edu void regStats(const std::string &name); 795728Sgblack@eecs.umich.edu 805728Sgblack@eecs.umich.edu public: 815728Sgblack@eecs.umich.edu void mode(cpu_mode newmode, ThreadContext *tc); 825728Sgblack@eecs.umich.edu void context(Addr oldpcbb, Addr newpcbb, ThreadContext *tc); 835728Sgblack@eecs.umich.edu void callpal(int code, ThreadContext *tc); 845728Sgblack@eecs.umich.edu void hwrei() { _hwrei++; } 855728Sgblack@eecs.umich.edu 865728Sgblack@eecs.umich.edu void setIdleProcess(Addr idle, ThreadContext *tc); 875728Sgblack@eecs.umich.edu 885728Sgblack@eecs.umich.edu public: 895728Sgblack@eecs.umich.edu void serialize(CheckpointOut &cp) const override; 905728Sgblack@eecs.umich.edu void unserialize(CheckpointIn &cp) override; 915728Sgblack@eecs.umich.edu}; 925728Sgblack@eecs.umich.edu 935728Sgblack@eecs.umich.edu} // namespace Kernel 945728Sgblack@eecs.umich.edu} // namespace AlphaISA 955728Sgblack@eecs.umich.edu 965728Sgblack@eecs.umich.edu#endif // __ARCH_ALPHA_KERNEL_STATS_HH__ 975728Sgblack@eecs.umich.edu