isa.cc revision 11321
16313Sgblack@eecs.umich.edu/* 26313Sgblack@eecs.umich.edu * Copyright (c) 2009 The Regents of The University of Michigan 36313Sgblack@eecs.umich.edu * All rights reserved. 46313Sgblack@eecs.umich.edu * 56313Sgblack@eecs.umich.edu * Redistribution and use in source and binary forms, with or without 66313Sgblack@eecs.umich.edu * modification, are permitted provided that the following conditions are 76313Sgblack@eecs.umich.edu * met: redistributions of source code must retain the above copyright 86313Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer; 96313Sgblack@eecs.umich.edu * redistributions in binary form must reproduce the above copyright 106313Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer in the 116313Sgblack@eecs.umich.edu * documentation and/or other materials provided with the distribution; 126313Sgblack@eecs.umich.edu * neither the name of the copyright holders nor the names of its 136313Sgblack@eecs.umich.edu * contributors may be used to endorse or promote products derived from 146313Sgblack@eecs.umich.edu * this software without specific prior written permission. 156313Sgblack@eecs.umich.edu * 166313Sgblack@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 176313Sgblack@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 186313Sgblack@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 196313Sgblack@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 206313Sgblack@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 216313Sgblack@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 226313Sgblack@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 236313Sgblack@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 246313Sgblack@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 256313Sgblack@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 266313Sgblack@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 276313Sgblack@eecs.umich.edu * 286313Sgblack@eecs.umich.edu * Authors: Gabe Black 296313Sgblack@eecs.umich.edu */ 306313Sgblack@eecs.umich.edu 317678Sgblack@eecs.umich.edu#include <cassert> 327678Sgblack@eecs.umich.edu 336313Sgblack@eecs.umich.edu#include "arch/alpha/isa.hh" 346330Sgblack@eecs.umich.edu#include "base/misc.hh" 356313Sgblack@eecs.umich.edu#include "cpu/thread_context.hh" 369384SAndreas.Sandberg@arm.com#include "params/AlphaISA.hh" 377680Sgblack@eecs.umich.edu#include "sim/serialize.hh" 386313Sgblack@eecs.umich.edu 396313Sgblack@eecs.umich.edunamespace AlphaISA 406313Sgblack@eecs.umich.edu{ 416313Sgblack@eecs.umich.edu 429384SAndreas.Sandberg@arm.comISA::ISA(Params *p) 4310033SAli.Saidi@ARM.com : SimObject(p), system(p->system) 449384SAndreas.Sandberg@arm.com{ 459384SAndreas.Sandberg@arm.com clear(); 469384SAndreas.Sandberg@arm.com initializeIprTable(); 479384SAndreas.Sandberg@arm.com} 489384SAndreas.Sandberg@arm.com 499384SAndreas.Sandberg@arm.comconst AlphaISAParams * 509384SAndreas.Sandberg@arm.comISA::params() const 519384SAndreas.Sandberg@arm.com{ 529384SAndreas.Sandberg@arm.com return dynamic_cast<const Params *>(_params); 539384SAndreas.Sandberg@arm.com} 549384SAndreas.Sandberg@arm.com 556313Sgblack@eecs.umich.eduvoid 5610905Sandreas.sandberg@arm.comISA::serialize(CheckpointOut &cp) const 576313Sgblack@eecs.umich.edu{ 586330Sgblack@eecs.umich.edu SERIALIZE_SCALAR(fpcr); 596330Sgblack@eecs.umich.edu SERIALIZE_SCALAR(uniq); 606330Sgblack@eecs.umich.edu SERIALIZE_SCALAR(lock_flag); 616330Sgblack@eecs.umich.edu SERIALIZE_SCALAR(lock_addr); 626330Sgblack@eecs.umich.edu SERIALIZE_ARRAY(ipr, NumInternalProcRegs); 636313Sgblack@eecs.umich.edu} 646313Sgblack@eecs.umich.edu 656313Sgblack@eecs.umich.eduvoid 6610905Sandreas.sandberg@arm.comISA::unserialize(CheckpointIn &cp) 676313Sgblack@eecs.umich.edu{ 686330Sgblack@eecs.umich.edu UNSERIALIZE_SCALAR(fpcr); 696330Sgblack@eecs.umich.edu UNSERIALIZE_SCALAR(uniq); 706330Sgblack@eecs.umich.edu UNSERIALIZE_SCALAR(lock_flag); 716330Sgblack@eecs.umich.edu UNSERIALIZE_SCALAR(lock_addr); 726330Sgblack@eecs.umich.edu UNSERIALIZE_ARRAY(ipr, NumInternalProcRegs); 736330Sgblack@eecs.umich.edu} 746330Sgblack@eecs.umich.edu 756330Sgblack@eecs.umich.edu 766330Sgblack@eecs.umich.eduMiscReg 7710698Sandreas.hansson@arm.comISA::readMiscRegNoEffect(int misc_reg, ThreadID tid) const 786330Sgblack@eecs.umich.edu{ 796330Sgblack@eecs.umich.edu switch (misc_reg) { 806330Sgblack@eecs.umich.edu case MISCREG_FPCR: 816330Sgblack@eecs.umich.edu return fpcr; 826330Sgblack@eecs.umich.edu case MISCREG_UNIQ: 836330Sgblack@eecs.umich.edu return uniq; 846330Sgblack@eecs.umich.edu case MISCREG_LOCKFLAG: 856330Sgblack@eecs.umich.edu return lock_flag; 866330Sgblack@eecs.umich.edu case MISCREG_LOCKADDR: 876330Sgblack@eecs.umich.edu return lock_addr; 886330Sgblack@eecs.umich.edu case MISCREG_INTR: 896330Sgblack@eecs.umich.edu return intr_flag; 906330Sgblack@eecs.umich.edu default: 916330Sgblack@eecs.umich.edu assert(misc_reg < NumInternalProcRegs); 926330Sgblack@eecs.umich.edu return ipr[misc_reg]; 936330Sgblack@eecs.umich.edu } 946330Sgblack@eecs.umich.edu} 956330Sgblack@eecs.umich.edu 966330Sgblack@eecs.umich.eduMiscReg 976330Sgblack@eecs.umich.eduISA::readMiscReg(int misc_reg, ThreadContext *tc, ThreadID tid) 986330Sgblack@eecs.umich.edu{ 996330Sgblack@eecs.umich.edu switch (misc_reg) { 1006330Sgblack@eecs.umich.edu case MISCREG_FPCR: 1016330Sgblack@eecs.umich.edu return fpcr; 1026330Sgblack@eecs.umich.edu case MISCREG_UNIQ: 1036330Sgblack@eecs.umich.edu return uniq; 1046330Sgblack@eecs.umich.edu case MISCREG_LOCKFLAG: 1056330Sgblack@eecs.umich.edu return lock_flag; 1066330Sgblack@eecs.umich.edu case MISCREG_LOCKADDR: 1076330Sgblack@eecs.umich.edu return lock_addr; 1086330Sgblack@eecs.umich.edu case MISCREG_INTR: 1096330Sgblack@eecs.umich.edu return intr_flag; 1106330Sgblack@eecs.umich.edu default: 1116330Sgblack@eecs.umich.edu return readIpr(misc_reg, tc); 1126330Sgblack@eecs.umich.edu } 1136330Sgblack@eecs.umich.edu} 1146330Sgblack@eecs.umich.edu 1156330Sgblack@eecs.umich.eduvoid 1166330Sgblack@eecs.umich.eduISA::setMiscRegNoEffect(int misc_reg, const MiscReg &val, ThreadID tid) 1176330Sgblack@eecs.umich.edu{ 1186330Sgblack@eecs.umich.edu switch (misc_reg) { 1196330Sgblack@eecs.umich.edu case MISCREG_FPCR: 1206330Sgblack@eecs.umich.edu fpcr = val; 1216330Sgblack@eecs.umich.edu return; 1226330Sgblack@eecs.umich.edu case MISCREG_UNIQ: 1236330Sgblack@eecs.umich.edu uniq = val; 1246330Sgblack@eecs.umich.edu return; 1256330Sgblack@eecs.umich.edu case MISCREG_LOCKFLAG: 1266330Sgblack@eecs.umich.edu lock_flag = val; 1276330Sgblack@eecs.umich.edu return; 1286330Sgblack@eecs.umich.edu case MISCREG_LOCKADDR: 1296330Sgblack@eecs.umich.edu lock_addr = val; 1306330Sgblack@eecs.umich.edu return; 1316330Sgblack@eecs.umich.edu case MISCREG_INTR: 1326330Sgblack@eecs.umich.edu intr_flag = val; 1336330Sgblack@eecs.umich.edu return; 1346330Sgblack@eecs.umich.edu default: 1356330Sgblack@eecs.umich.edu assert(misc_reg < NumInternalProcRegs); 1366330Sgblack@eecs.umich.edu ipr[misc_reg] = val; 1376330Sgblack@eecs.umich.edu return; 1386330Sgblack@eecs.umich.edu } 1396330Sgblack@eecs.umich.edu} 1406330Sgblack@eecs.umich.edu 1416330Sgblack@eecs.umich.eduvoid 1426330Sgblack@eecs.umich.eduISA::setMiscReg(int misc_reg, const MiscReg &val, ThreadContext *tc, 1436330Sgblack@eecs.umich.edu ThreadID tid) 1446330Sgblack@eecs.umich.edu{ 1456330Sgblack@eecs.umich.edu switch (misc_reg) { 1466330Sgblack@eecs.umich.edu case MISCREG_FPCR: 1476330Sgblack@eecs.umich.edu fpcr = val; 1486330Sgblack@eecs.umich.edu return; 1496330Sgblack@eecs.umich.edu case MISCREG_UNIQ: 1506330Sgblack@eecs.umich.edu uniq = val; 1516330Sgblack@eecs.umich.edu return; 1526330Sgblack@eecs.umich.edu case MISCREG_LOCKFLAG: 1536330Sgblack@eecs.umich.edu lock_flag = val; 1546330Sgblack@eecs.umich.edu return; 1556330Sgblack@eecs.umich.edu case MISCREG_LOCKADDR: 1566330Sgblack@eecs.umich.edu lock_addr = val; 1576330Sgblack@eecs.umich.edu return; 1586330Sgblack@eecs.umich.edu case MISCREG_INTR: 1596330Sgblack@eecs.umich.edu intr_flag = val; 1606330Sgblack@eecs.umich.edu return; 1616330Sgblack@eecs.umich.edu default: 1626330Sgblack@eecs.umich.edu setIpr(misc_reg, val, tc); 1636330Sgblack@eecs.umich.edu return; 1646330Sgblack@eecs.umich.edu } 1656313Sgblack@eecs.umich.edu} 1666313Sgblack@eecs.umich.edu 1676313Sgblack@eecs.umich.edu} 1689384SAndreas.Sandberg@arm.com 1699384SAndreas.Sandberg@arm.comAlphaISA::ISA * 1709384SAndreas.Sandberg@arm.comAlphaISAParams::create() 1719384SAndreas.Sandberg@arm.com{ 1729384SAndreas.Sandberg@arm.com return new AlphaISA::ISA(this); 1739384SAndreas.Sandberg@arm.com} 174