interrupts.hh revision 4103
13520Sgblack@eecs.umich.edu/* 23520Sgblack@eecs.umich.edu * Copyright (c) 2006 The Regents of The University of Michigan 33520Sgblack@eecs.umich.edu * All rights reserved. 43520Sgblack@eecs.umich.edu * 53520Sgblack@eecs.umich.edu * Redistribution and use in source and binary forms, with or without 63520Sgblack@eecs.umich.edu * modification, are permitted provided that the following conditions are 73520Sgblack@eecs.umich.edu * met: redistributions of source code must retain the above copyright 83520Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer; 93520Sgblack@eecs.umich.edu * redistributions in binary form must reproduce the above copyright 103520Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer in the 113520Sgblack@eecs.umich.edu * documentation and/or other materials provided with the distribution; 123520Sgblack@eecs.umich.edu * neither the name of the copyright holders nor the names of its 133520Sgblack@eecs.umich.edu * contributors may be used to endorse or promote products derived from 143520Sgblack@eecs.umich.edu * this software without specific prior written permission. 153520Sgblack@eecs.umich.edu * 163520Sgblack@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 173520Sgblack@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 183520Sgblack@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 193520Sgblack@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 203520Sgblack@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 213520Sgblack@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 223520Sgblack@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 233520Sgblack@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 243520Sgblack@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 253520Sgblack@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 263520Sgblack@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 273520Sgblack@eecs.umich.edu * 283520Sgblack@eecs.umich.edu * Authors: Steve Reinhardt 293520Sgblack@eecs.umich.edu * Kevin Lim 303520Sgblack@eecs.umich.edu */ 313520Sgblack@eecs.umich.edu 323520Sgblack@eecs.umich.edu#ifndef __ARCH_ALPHA_INTERRUPT_HH__ 333520Sgblack@eecs.umich.edu#define __ARCH_ALPHA_INTERRUPT_HH__ 343520Sgblack@eecs.umich.edu 353520Sgblack@eecs.umich.edu#include "arch/alpha/faults.hh" 363520Sgblack@eecs.umich.edu#include "arch/alpha/isa_traits.hh" 374103Ssaidi@eecs.umich.edu#include "base/compiler.hh" 383520Sgblack@eecs.umich.edu#include "cpu/thread_context.hh" 393520Sgblack@eecs.umich.edu 403520Sgblack@eecs.umich.edunamespace AlphaISA 413520Sgblack@eecs.umich.edu{ 423520Sgblack@eecs.umich.edu class Interrupts 433520Sgblack@eecs.umich.edu { 443520Sgblack@eecs.umich.edu protected: 453520Sgblack@eecs.umich.edu uint64_t interrupts[NumInterruptLevels]; 463520Sgblack@eecs.umich.edu uint64_t intstatus; 473520Sgblack@eecs.umich.edu 483520Sgblack@eecs.umich.edu public: 493520Sgblack@eecs.umich.edu Interrupts() 503520Sgblack@eecs.umich.edu { 513520Sgblack@eecs.umich.edu memset(interrupts, 0, sizeof(interrupts)); 523520Sgblack@eecs.umich.edu intstatus = 0; 533633Sktlim@umich.edu newInfoSet = false; 543520Sgblack@eecs.umich.edu } 553520Sgblack@eecs.umich.edu 563520Sgblack@eecs.umich.edu void post(int int_num, int index) 573520Sgblack@eecs.umich.edu { 583520Sgblack@eecs.umich.edu DPRINTF(Interrupt, "Interrupt %d:%d posted\n", int_num, index); 593520Sgblack@eecs.umich.edu 603520Sgblack@eecs.umich.edu if (int_num < 0 || int_num >= NumInterruptLevels) 613520Sgblack@eecs.umich.edu panic("int_num out of bounds\n"); 623520Sgblack@eecs.umich.edu 633520Sgblack@eecs.umich.edu if (index < 0 || index >= sizeof(uint64_t) * 8) 643520Sgblack@eecs.umich.edu panic("int_num out of bounds\n"); 653520Sgblack@eecs.umich.edu 663520Sgblack@eecs.umich.edu interrupts[int_num] |= 1 << index; 673520Sgblack@eecs.umich.edu intstatus |= (ULL(1) << int_num); 683520Sgblack@eecs.umich.edu } 693520Sgblack@eecs.umich.edu 703520Sgblack@eecs.umich.edu void clear(int int_num, int index) 713520Sgblack@eecs.umich.edu { 723520Sgblack@eecs.umich.edu DPRINTF(Interrupt, "Interrupt %d:%d cleared\n", int_num, index); 733520Sgblack@eecs.umich.edu 743520Sgblack@eecs.umich.edu if (int_num < 0 || int_num >= TheISA::NumInterruptLevels) 753520Sgblack@eecs.umich.edu panic("int_num out of bounds\n"); 763520Sgblack@eecs.umich.edu 773520Sgblack@eecs.umich.edu if (index < 0 || index >= sizeof(uint64_t) * 8) 783520Sgblack@eecs.umich.edu panic("int_num out of bounds\n"); 793520Sgblack@eecs.umich.edu 803520Sgblack@eecs.umich.edu interrupts[int_num] &= ~(1 << index); 813520Sgblack@eecs.umich.edu if (interrupts[int_num] == 0) 823520Sgblack@eecs.umich.edu intstatus &= ~(ULL(1) << int_num); 833520Sgblack@eecs.umich.edu } 843520Sgblack@eecs.umich.edu 853520Sgblack@eecs.umich.edu void clear_all() 863520Sgblack@eecs.umich.edu { 873520Sgblack@eecs.umich.edu DPRINTF(Interrupt, "Interrupts all cleared\n"); 883520Sgblack@eecs.umich.edu 893520Sgblack@eecs.umich.edu memset(interrupts, 0, sizeof(interrupts)); 903520Sgblack@eecs.umich.edu intstatus = 0; 913520Sgblack@eecs.umich.edu } 923520Sgblack@eecs.umich.edu 933520Sgblack@eecs.umich.edu void serialize(std::ostream &os) 943520Sgblack@eecs.umich.edu { 953520Sgblack@eecs.umich.edu SERIALIZE_ARRAY(interrupts, NumInterruptLevels); 963520Sgblack@eecs.umich.edu SERIALIZE_SCALAR(intstatus); 973520Sgblack@eecs.umich.edu } 983520Sgblack@eecs.umich.edu 993520Sgblack@eecs.umich.edu void unserialize(Checkpoint *cp, const std::string §ion) 1003520Sgblack@eecs.umich.edu { 1013520Sgblack@eecs.umich.edu UNSERIALIZE_ARRAY(interrupts, NumInterruptLevels); 1023520Sgblack@eecs.umich.edu UNSERIALIZE_SCALAR(intstatus); 1033520Sgblack@eecs.umich.edu } 1043520Sgblack@eecs.umich.edu 1053521Sgblack@eecs.umich.edu bool check_interrupts(ThreadContext * tc) const 1063521Sgblack@eecs.umich.edu { 1073521Sgblack@eecs.umich.edu return (intstatus != 0) && !(tc->readPC() & 0x3); 1083521Sgblack@eecs.umich.edu } 1093521Sgblack@eecs.umich.edu 1103520Sgblack@eecs.umich.edu Fault getInterrupt(ThreadContext * tc) 1113520Sgblack@eecs.umich.edu { 1123520Sgblack@eecs.umich.edu int ipl = 0; 1133520Sgblack@eecs.umich.edu int summary = 0; 1143520Sgblack@eecs.umich.edu 1153520Sgblack@eecs.umich.edu if (tc->readMiscReg(IPR_ASTRR)) 1163520Sgblack@eecs.umich.edu panic("asynchronous traps not implemented\n"); 1173520Sgblack@eecs.umich.edu 1183520Sgblack@eecs.umich.edu if (tc->readMiscReg(IPR_SIRR)) { 1193520Sgblack@eecs.umich.edu for (int i = INTLEVEL_SOFTWARE_MIN; 1203520Sgblack@eecs.umich.edu i < INTLEVEL_SOFTWARE_MAX; i++) { 1213520Sgblack@eecs.umich.edu if (tc->readMiscReg(IPR_SIRR) & (ULL(1) << i)) { 1223520Sgblack@eecs.umich.edu // See table 4-19 of 21164 hardware reference 1233520Sgblack@eecs.umich.edu ipl = (i - INTLEVEL_SOFTWARE_MIN) + 1; 1243520Sgblack@eecs.umich.edu summary |= (ULL(1) << i); 1253520Sgblack@eecs.umich.edu } 1263520Sgblack@eecs.umich.edu } 1273520Sgblack@eecs.umich.edu } 1283520Sgblack@eecs.umich.edu 1293520Sgblack@eecs.umich.edu uint64_t interrupts = intstatus; 1303520Sgblack@eecs.umich.edu if (interrupts) { 1313520Sgblack@eecs.umich.edu for (int i = INTLEVEL_EXTERNAL_MIN; 1323520Sgblack@eecs.umich.edu i < INTLEVEL_EXTERNAL_MAX; i++) { 1333520Sgblack@eecs.umich.edu if (interrupts & (ULL(1) << i)) { 1343520Sgblack@eecs.umich.edu // See table 4-19 of 21164 hardware reference 1353520Sgblack@eecs.umich.edu ipl = i; 1363520Sgblack@eecs.umich.edu summary |= (ULL(1) << i); 1373520Sgblack@eecs.umich.edu } 1383520Sgblack@eecs.umich.edu } 1393520Sgblack@eecs.umich.edu } 1403520Sgblack@eecs.umich.edu 1413520Sgblack@eecs.umich.edu if (ipl && ipl > tc->readMiscReg(IPR_IPLR)) { 1423633Sktlim@umich.edu newIpl = ipl; 1433677Sktlim@umich.edu newSummary = summary; 1443633Sktlim@umich.edu newInfoSet = true; 1453520Sgblack@eecs.umich.edu DPRINTF(Flow, "Interrupt! IPLR=%d ipl=%d summary=%x\n", 1463520Sgblack@eecs.umich.edu tc->readMiscReg(IPR_IPLR), ipl, summary); 1473520Sgblack@eecs.umich.edu 1483520Sgblack@eecs.umich.edu return new InterruptFault; 1493520Sgblack@eecs.umich.edu } else { 1503520Sgblack@eecs.umich.edu return NoFault; 1513520Sgblack@eecs.umich.edu } 1523520Sgblack@eecs.umich.edu } 1533520Sgblack@eecs.umich.edu 1543633Sktlim@umich.edu void updateIntrInfo(ThreadContext *tc) 1553633Sktlim@umich.edu { 1563633Sktlim@umich.edu assert(newInfoSet); 1573633Sktlim@umich.edu tc->setMiscReg(IPR_ISR, newSummary); 1583633Sktlim@umich.edu tc->setMiscReg(IPR_INTID, newIpl); 1593633Sktlim@umich.edu newInfoSet = false; 1603633Sktlim@umich.edu } 1613633Sktlim@umich.edu 1624103Ssaidi@eecs.umich.edu uint64_t get_vec(int int_num) 1634103Ssaidi@eecs.umich.edu { 1644103Ssaidi@eecs.umich.edu panic("Shouldn't be called for Alpha\n"); 1654103Ssaidi@eecs.umich.edu M5_DUMMY_RETURN 1664103Ssaidi@eecs.umich.edu } 1674103Ssaidi@eecs.umich.edu 1683520Sgblack@eecs.umich.edu private: 1693633Sktlim@umich.edu bool newInfoSet; 1703633Sktlim@umich.edu int newIpl; 1713633Sktlim@umich.edu int newSummary; 1723520Sgblack@eecs.umich.edu }; 1733520Sgblack@eecs.umich.edu} 1743520Sgblack@eecs.umich.edu 1753520Sgblack@eecs.umich.edu#endif 1763520Sgblack@eecs.umich.edu 177