interrupts.hh revision 3827
13520Sgblack@eecs.umich.edu/*
23520Sgblack@eecs.umich.edu * Copyright (c) 2006 The Regents of The University of Michigan
33520Sgblack@eecs.umich.edu * All rights reserved.
43520Sgblack@eecs.umich.edu *
53520Sgblack@eecs.umich.edu * Redistribution and use in source and binary forms, with or without
63520Sgblack@eecs.umich.edu * modification, are permitted provided that the following conditions are
73520Sgblack@eecs.umich.edu * met: redistributions of source code must retain the above copyright
83520Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer;
93520Sgblack@eecs.umich.edu * redistributions in binary form must reproduce the above copyright
103520Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer in the
113520Sgblack@eecs.umich.edu * documentation and/or other materials provided with the distribution;
123520Sgblack@eecs.umich.edu * neither the name of the copyright holders nor the names of its
133520Sgblack@eecs.umich.edu * contributors may be used to endorse or promote products derived from
143520Sgblack@eecs.umich.edu * this software without specific prior written permission.
153520Sgblack@eecs.umich.edu *
163520Sgblack@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
173520Sgblack@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
183520Sgblack@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
193520Sgblack@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
203520Sgblack@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
213520Sgblack@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
223520Sgblack@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
233520Sgblack@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
243520Sgblack@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
253520Sgblack@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
263520Sgblack@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
273520Sgblack@eecs.umich.edu *
283520Sgblack@eecs.umich.edu * Authors: Steve Reinhardt
293520Sgblack@eecs.umich.edu *          Kevin Lim
303520Sgblack@eecs.umich.edu */
313520Sgblack@eecs.umich.edu
323520Sgblack@eecs.umich.edu#ifndef __ARCH_ALPHA_INTERRUPT_HH__
333520Sgblack@eecs.umich.edu#define __ARCH_ALPHA_INTERRUPT_HH__
343520Sgblack@eecs.umich.edu
353520Sgblack@eecs.umich.edu#include "arch/alpha/faults.hh"
363520Sgblack@eecs.umich.edu#include "arch/alpha/isa_traits.hh"
373520Sgblack@eecs.umich.edu#include "cpu/thread_context.hh"
383520Sgblack@eecs.umich.edu
393520Sgblack@eecs.umich.edunamespace AlphaISA
403520Sgblack@eecs.umich.edu{
413520Sgblack@eecs.umich.edu    class Interrupts
423520Sgblack@eecs.umich.edu    {
433520Sgblack@eecs.umich.edu      protected:
443520Sgblack@eecs.umich.edu        uint64_t interrupts[NumInterruptLevels];
453520Sgblack@eecs.umich.edu        uint64_t intstatus;
463520Sgblack@eecs.umich.edu
473520Sgblack@eecs.umich.edu      public:
483520Sgblack@eecs.umich.edu        Interrupts()
493520Sgblack@eecs.umich.edu        {
503520Sgblack@eecs.umich.edu            memset(interrupts, 0, sizeof(interrupts));
513520Sgblack@eecs.umich.edu            intstatus = 0;
523633Sktlim@umich.edu            newInfoSet = false;
533520Sgblack@eecs.umich.edu        }
543520Sgblack@eecs.umich.edu
553520Sgblack@eecs.umich.edu        void post(int int_num, int index)
563520Sgblack@eecs.umich.edu        {
573520Sgblack@eecs.umich.edu            DPRINTF(Interrupt, "Interrupt %d:%d posted\n", int_num, index);
583520Sgblack@eecs.umich.edu
593520Sgblack@eecs.umich.edu            if (int_num < 0 || int_num >= NumInterruptLevels)
603520Sgblack@eecs.umich.edu                panic("int_num out of bounds\n");
613520Sgblack@eecs.umich.edu
623520Sgblack@eecs.umich.edu            if (index < 0 || index >= sizeof(uint64_t) * 8)
633520Sgblack@eecs.umich.edu                panic("int_num out of bounds\n");
643520Sgblack@eecs.umich.edu
653520Sgblack@eecs.umich.edu            interrupts[int_num] |= 1 << index;
663520Sgblack@eecs.umich.edu            intstatus |= (ULL(1) << int_num);
673520Sgblack@eecs.umich.edu        }
683520Sgblack@eecs.umich.edu
693520Sgblack@eecs.umich.edu        void clear(int int_num, int index)
703520Sgblack@eecs.umich.edu        {
713520Sgblack@eecs.umich.edu            DPRINTF(Interrupt, "Interrupt %d:%d cleared\n", int_num, index);
723520Sgblack@eecs.umich.edu
733520Sgblack@eecs.umich.edu            if (int_num < 0 || int_num >= TheISA::NumInterruptLevels)
743520Sgblack@eecs.umich.edu                panic("int_num out of bounds\n");
753520Sgblack@eecs.umich.edu
763520Sgblack@eecs.umich.edu            if (index < 0 || index >= sizeof(uint64_t) * 8)
773520Sgblack@eecs.umich.edu                panic("int_num out of bounds\n");
783520Sgblack@eecs.umich.edu
793520Sgblack@eecs.umich.edu            interrupts[int_num] &= ~(1 << index);
803520Sgblack@eecs.umich.edu            if (interrupts[int_num] == 0)
813520Sgblack@eecs.umich.edu                intstatus &= ~(ULL(1) << int_num);
823520Sgblack@eecs.umich.edu        }
833520Sgblack@eecs.umich.edu
843520Sgblack@eecs.umich.edu        void clear_all()
853520Sgblack@eecs.umich.edu        {
863520Sgblack@eecs.umich.edu            DPRINTF(Interrupt, "Interrupts all cleared\n");
873520Sgblack@eecs.umich.edu
883520Sgblack@eecs.umich.edu            memset(interrupts, 0, sizeof(interrupts));
893520Sgblack@eecs.umich.edu            intstatus = 0;
903520Sgblack@eecs.umich.edu        }
913520Sgblack@eecs.umich.edu
923520Sgblack@eecs.umich.edu        void serialize(std::ostream &os)
933520Sgblack@eecs.umich.edu        {
943520Sgblack@eecs.umich.edu            SERIALIZE_ARRAY(interrupts, NumInterruptLevels);
953520Sgblack@eecs.umich.edu            SERIALIZE_SCALAR(intstatus);
963520Sgblack@eecs.umich.edu        }
973520Sgblack@eecs.umich.edu
983520Sgblack@eecs.umich.edu        void unserialize(Checkpoint *cp, const std::string &section)
993520Sgblack@eecs.umich.edu        {
1003520Sgblack@eecs.umich.edu            UNSERIALIZE_ARRAY(interrupts, NumInterruptLevels);
1013520Sgblack@eecs.umich.edu            UNSERIALIZE_SCALAR(intstatus);
1023520Sgblack@eecs.umich.edu        }
1033520Sgblack@eecs.umich.edu
1043521Sgblack@eecs.umich.edu        bool check_interrupts(ThreadContext * tc) const
1053521Sgblack@eecs.umich.edu        {
1063521Sgblack@eecs.umich.edu            return (intstatus != 0) && !(tc->readPC() & 0x3);
1073521Sgblack@eecs.umich.edu        }
1083521Sgblack@eecs.umich.edu
1093520Sgblack@eecs.umich.edu        Fault getInterrupt(ThreadContext * tc)
1103520Sgblack@eecs.umich.edu        {
1113520Sgblack@eecs.umich.edu            int ipl = 0;
1123520Sgblack@eecs.umich.edu            int summary = 0;
1133520Sgblack@eecs.umich.edu
1143520Sgblack@eecs.umich.edu            if (tc->readMiscReg(IPR_ASTRR))
1153520Sgblack@eecs.umich.edu                panic("asynchronous traps not implemented\n");
1163520Sgblack@eecs.umich.edu
1173520Sgblack@eecs.umich.edu            if (tc->readMiscReg(IPR_SIRR)) {
1183520Sgblack@eecs.umich.edu                for (int i = INTLEVEL_SOFTWARE_MIN;
1193520Sgblack@eecs.umich.edu                     i < INTLEVEL_SOFTWARE_MAX; i++) {
1203520Sgblack@eecs.umich.edu                    if (tc->readMiscReg(IPR_SIRR) & (ULL(1) << i)) {
1213520Sgblack@eecs.umich.edu                        // See table 4-19 of 21164 hardware reference
1223520Sgblack@eecs.umich.edu                        ipl = (i - INTLEVEL_SOFTWARE_MIN) + 1;
1233520Sgblack@eecs.umich.edu                        summary |= (ULL(1) << i);
1243520Sgblack@eecs.umich.edu                    }
1253520Sgblack@eecs.umich.edu                }
1263520Sgblack@eecs.umich.edu            }
1273520Sgblack@eecs.umich.edu
1283520Sgblack@eecs.umich.edu            uint64_t interrupts = intstatus;
1293520Sgblack@eecs.umich.edu            if (interrupts) {
1303520Sgblack@eecs.umich.edu                for (int i = INTLEVEL_EXTERNAL_MIN;
1313520Sgblack@eecs.umich.edu                    i < INTLEVEL_EXTERNAL_MAX; i++) {
1323520Sgblack@eecs.umich.edu                    if (interrupts & (ULL(1) << i)) {
1333520Sgblack@eecs.umich.edu                        // See table 4-19 of 21164 hardware reference
1343520Sgblack@eecs.umich.edu                        ipl = i;
1353520Sgblack@eecs.umich.edu                        summary |= (ULL(1) << i);
1363520Sgblack@eecs.umich.edu                    }
1373520Sgblack@eecs.umich.edu                }
1383520Sgblack@eecs.umich.edu            }
1393520Sgblack@eecs.umich.edu
1403520Sgblack@eecs.umich.edu            if (ipl && ipl > tc->readMiscReg(IPR_IPLR)) {
1413633Sktlim@umich.edu                newIpl = ipl;
1423677Sktlim@umich.edu                newSummary = summary;
1433633Sktlim@umich.edu                newInfoSet = true;
1443520Sgblack@eecs.umich.edu                DPRINTF(Flow, "Interrupt! IPLR=%d ipl=%d summary=%x\n",
1453520Sgblack@eecs.umich.edu                        tc->readMiscReg(IPR_IPLR), ipl, summary);
1463520Sgblack@eecs.umich.edu
1473520Sgblack@eecs.umich.edu                return new InterruptFault;
1483520Sgblack@eecs.umich.edu            } else {
1493520Sgblack@eecs.umich.edu                return NoFault;
1503520Sgblack@eecs.umich.edu            }
1513520Sgblack@eecs.umich.edu        }
1523520Sgblack@eecs.umich.edu
1533633Sktlim@umich.edu        void updateIntrInfo(ThreadContext *tc)
1543633Sktlim@umich.edu        {
1553633Sktlim@umich.edu            assert(newInfoSet);
1563633Sktlim@umich.edu            tc->setMiscReg(IPR_ISR, newSummary);
1573633Sktlim@umich.edu            tc->setMiscReg(IPR_INTID, newIpl);
1583633Sktlim@umich.edu            newInfoSet = false;
1593633Sktlim@umich.edu        }
1603633Sktlim@umich.edu
1613520Sgblack@eecs.umich.edu      private:
1623633Sktlim@umich.edu        bool newInfoSet;
1633633Sktlim@umich.edu        int newIpl;
1643633Sktlim@umich.edu        int newSummary;
1653520Sgblack@eecs.umich.edu    };
1663520Sgblack@eecs.umich.edu}
1673520Sgblack@eecs.umich.edu
1683520Sgblack@eecs.umich.edu#endif
1693520Sgblack@eecs.umich.edu
170