faults.hh revision 2680
12SN/A/* 21762SN/A * Copyright (c) 2003-2005 The Regents of The University of Michigan 32SN/A * All rights reserved. 42SN/A * 52SN/A * Redistribution and use in source and binary forms, with or without 62SN/A * modification, are permitted provided that the following conditions are 72SN/A * met: redistributions of source code must retain the above copyright 82SN/A * notice, this list of conditions and the following disclaimer; 92SN/A * redistributions in binary form must reproduce the above copyright 102SN/A * notice, this list of conditions and the following disclaimer in the 112SN/A * documentation and/or other materials provided with the distribution; 122SN/A * neither the name of the copyright holders nor the names of its 132SN/A * contributors may be used to endorse or promote products derived from 142SN/A * this software without specific prior written permission. 152SN/A * 162SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 172SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 182SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 192SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 202SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 212SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 222SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 232SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 242SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 252SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 262SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272665Ssaidi@eecs.umich.edu * 282665Ssaidi@eecs.umich.edu * Authors: Gabe Black 292665Ssaidi@eecs.umich.edu * Kevin Lim 302SN/A */ 312SN/A 322090SN/A#ifndef __ALPHA_FAULTS_HH__ 332090SN/A#define __ALPHA_FAULTS_HH__ 342SN/A 352502SN/A#include "arch/alpha/isa_traits.hh" 362090SN/A#include "sim/faults.hh" 372147SN/A 382166SN/A// The design of the "name" and "vect" functions is in sim/faults.hh 392147SN/A 402167SN/Anamespace AlphaISA 412167SN/A{ 422167SN/A 432147SN/Atypedef const Addr FaultVect; 442090SN/A 452222SN/Aclass AlphaFault : public FaultBase 462090SN/A{ 472201SN/A protected: 482201SN/A virtual bool skipFaultingInstruction() {return false;} 492201SN/A virtual bool setRestartAddress() {return true;} 502112SN/A public: 512174SN/A#if FULL_SYSTEM 522680Sktlim@umich.edu void invoke(ThreadContext * tc); 532174SN/A#endif 542175SN/A virtual FaultVect vect() = 0; 552222SN/A virtual FaultStat & countStat() = 0; 562SN/A}; 572SN/A 582203SN/Aclass MachineCheckFault : public AlphaFault 592166SN/A{ 602166SN/A private: 612203SN/A static FaultName _name; 622166SN/A static FaultVect _vect; 632222SN/A static FaultStat _count; 642166SN/A public: 652203SN/A FaultName name() {return _name;} 662166SN/A FaultVect vect() {return _vect;} 672222SN/A FaultStat & countStat() {return _count;} 682203SN/A bool isMachineCheckFault() {return true;} 692166SN/A}; 702166SN/A 712203SN/Aclass AlignmentFault : public AlphaFault 722166SN/A{ 732166SN/A private: 742203SN/A static FaultName _name; 752166SN/A static FaultVect _vect; 762222SN/A static FaultStat _count; 772166SN/A public: 782203SN/A FaultName name() {return _name;} 792166SN/A FaultVect vect() {return _vect;} 802222SN/A FaultStat & countStat() {return _count;} 812203SN/A bool isAlignmentFault() {return true;} 822166SN/A}; 832166SN/A 842166SN/Astatic inline Fault genMachineCheckFault() 852166SN/A{ 862203SN/A return new MachineCheckFault; 872166SN/A} 882166SN/A 892166SN/Astatic inline Fault genAlignmentFault() 902166SN/A{ 912203SN/A return new AlignmentFault; 922166SN/A} 932166SN/A 942147SN/Aclass ResetFault : public AlphaFault 952090SN/A{ 962147SN/A private: 972147SN/A static FaultName _name; 982147SN/A static FaultVect _vect; 992222SN/A static FaultStat _count; 1002112SN/A public: 1012147SN/A FaultName name() {return _name;} 1022147SN/A FaultVect vect() {return _vect;} 1032222SN/A FaultStat & countStat() {return _count;} 1042147SN/A}; 1052090SN/A 1062147SN/Aclass ArithmeticFault : public AlphaFault 1072090SN/A{ 1082201SN/A protected: 1092201SN/A bool skipFaultingInstruction() {return true;} 1102147SN/A private: 1112147SN/A static FaultName _name; 1122147SN/A static FaultVect _vect; 1132222SN/A static FaultStat _count; 1142112SN/A public: 1152147SN/A FaultName name() {return _name;} 1162147SN/A FaultVect vect() {return _vect;} 1172222SN/A FaultStat & countStat() {return _count;} 1182203SN/A#if FULL_SYSTEM 1192680Sktlim@umich.edu void invoke(ThreadContext * tc); 1202203SN/A#endif 1212147SN/A}; 1222090SN/A 1232147SN/Aclass InterruptFault : public AlphaFault 1242090SN/A{ 1252201SN/A protected: 1262201SN/A bool setRestartAddress() {return false;} 1272147SN/A private: 1282147SN/A static FaultName _name; 1292147SN/A static FaultVect _vect; 1302222SN/A static FaultStat _count; 1312112SN/A public: 1322147SN/A FaultName name() {return _name;} 1332147SN/A FaultVect vect() {return _vect;} 1342222SN/A FaultStat & countStat() {return _count;} 1352147SN/A}; 1362090SN/A 1372502SN/Aclass DtbFault : public AlphaFault 1382502SN/A{ 1392502SN/A#if FULL_SYSTEM 1402502SN/A private: 1412502SN/A AlphaISA::VAddr vaddr; 1422502SN/A uint32_t reqFlags; 1432502SN/A uint64_t flags; 1442502SN/A public: 1452502SN/A DtbFault(AlphaISA::VAddr _vaddr, uint32_t _reqFlags, uint64_t _flags) 1462502SN/A : vaddr(_vaddr), reqFlags(_reqFlags), flags(_flags) 1472502SN/A { } 1482502SN/A#endif 1492502SN/A FaultName name() = 0; 1502502SN/A FaultVect vect() = 0; 1512502SN/A FaultStat & countStat() = 0; 1522502SN/A#if FULL_SYSTEM 1532680Sktlim@umich.edu void invoke(ThreadContext * tc); 1542502SN/A#endif 1552502SN/A}; 1562502SN/A 1572502SN/Aclass NDtbMissFault : public DtbFault 1582090SN/A{ 1592147SN/A private: 1602147SN/A static FaultName _name; 1612147SN/A static FaultVect _vect; 1622222SN/A static FaultStat _count; 1632112SN/A public: 1642502SN/A#if FULL_SYSTEM 1652502SN/A NDtbMissFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags) 1662502SN/A : DtbFault(vaddr, reqFlags, flags) 1672502SN/A { } 1682502SN/A#endif 1692147SN/A FaultName name() {return _name;} 1702147SN/A FaultVect vect() {return _vect;} 1712222SN/A FaultStat & countStat() {return _count;} 1722147SN/A}; 1732090SN/A 1742502SN/Aclass PDtbMissFault : public DtbFault 1752090SN/A{ 1762147SN/A private: 1772147SN/A static FaultName _name; 1782147SN/A static FaultVect _vect; 1792222SN/A static FaultStat _count; 1802112SN/A public: 1812502SN/A#if FULL_SYSTEM 1822502SN/A PDtbMissFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags) 1832502SN/A : DtbFault(vaddr, reqFlags, flags) 1842502SN/A { } 1852502SN/A#endif 1862147SN/A FaultName name() {return _name;} 1872147SN/A FaultVect vect() {return _vect;} 1882222SN/A FaultStat & countStat() {return _count;} 1892147SN/A}; 1902090SN/A 1912502SN/Aclass DtbPageFault : public DtbFault 1922090SN/A{ 1932147SN/A private: 1942147SN/A static FaultName _name; 1952147SN/A static FaultVect _vect; 1962222SN/A static FaultStat _count; 1972112SN/A public: 1982502SN/A#if FULL_SYSTEM 1992502SN/A DtbPageFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags) 2002502SN/A : DtbFault(vaddr, reqFlags, flags) 2012502SN/A { } 2022502SN/A#endif 2032147SN/A FaultName name() {return _name;} 2042147SN/A FaultVect vect() {return _vect;} 2052222SN/A FaultStat & countStat() {return _count;} 2062147SN/A}; 2072090SN/A 2082502SN/Aclass DtbAcvFault : public DtbFault 2092090SN/A{ 2102147SN/A private: 2112147SN/A static FaultName _name; 2122147SN/A static FaultVect _vect; 2132222SN/A static FaultStat _count; 2142112SN/A public: 2152502SN/A#if FULL_SYSTEM 2162502SN/A DtbAcvFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags) 2172502SN/A : DtbFault(vaddr, reqFlags, flags) 2182502SN/A { } 2192502SN/A#endif 2202147SN/A FaultName name() {return _name;} 2212147SN/A FaultVect vect() {return _vect;} 2222222SN/A FaultStat & countStat() {return _count;} 2232147SN/A}; 2242090SN/A 2252502SN/Aclass DtbAlignmentFault : public DtbFault 2262090SN/A{ 2272147SN/A private: 2282147SN/A static FaultName _name; 2292147SN/A static FaultVect _vect; 2302222SN/A static FaultStat _count; 2312112SN/A public: 2322502SN/A#if FULL_SYSTEM 2332502SN/A DtbAlignmentFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags) 2342502SN/A : DtbFault(vaddr, reqFlags, flags) 2352502SN/A { } 2362502SN/A#endif 2372147SN/A FaultName name() {return _name;} 2382147SN/A FaultVect vect() {return _vect;} 2392222SN/A FaultStat & countStat() {return _count;} 2402147SN/A}; 2412090SN/A 2422502SN/Aclass ItbFault : public AlphaFault 2432502SN/A{ 2442502SN/A private: 2452502SN/A Addr pc; 2462502SN/A public: 2472502SN/A ItbFault(Addr _pc) 2482502SN/A : pc(_pc) 2492502SN/A { } 2502505SN/A FaultName name() = 0; 2512505SN/A FaultVect vect() = 0; 2522505SN/A FaultStat & countStat() = 0; 2532502SN/A#if FULL_SYSTEM 2542680Sktlim@umich.edu void invoke(ThreadContext * tc); 2552502SN/A#endif 2562502SN/A}; 2572502SN/A 2582502SN/Aclass ItbMissFault : public ItbFault 2592090SN/A{ 2602147SN/A private: 2612147SN/A static FaultName _name; 2622147SN/A static FaultVect _vect; 2632222SN/A static FaultStat _count; 2642112SN/A public: 2652502SN/A ItbMissFault(Addr pc) 2662502SN/A : ItbFault(pc) 2672502SN/A { } 2682147SN/A FaultName name() {return _name;} 2692147SN/A FaultVect vect() {return _vect;} 2702222SN/A FaultStat & countStat() {return _count;} 2712147SN/A}; 2722090SN/A 2732502SN/Aclass ItbPageFault : public ItbFault 2742090SN/A{ 2752147SN/A private: 2762147SN/A static FaultName _name; 2772147SN/A static FaultVect _vect; 2782222SN/A static FaultStat _count; 2792112SN/A public: 2802502SN/A ItbPageFault(Addr pc) 2812502SN/A : ItbFault(pc) 2822502SN/A { } 2832502SN/A FaultName name() {return _name;} 2842502SN/A FaultVect vect() {return _vect;} 2852502SN/A FaultStat & countStat() {return _count;} 2862502SN/A}; 2872502SN/A 2882502SN/Aclass ItbAcvFault : public ItbFault 2892502SN/A{ 2902502SN/A private: 2912502SN/A static FaultName _name; 2922502SN/A static FaultVect _vect; 2932502SN/A static FaultStat _count; 2942502SN/A public: 2952502SN/A ItbAcvFault(Addr pc) 2962502SN/A : ItbFault(pc) 2972502SN/A { } 2982147SN/A FaultName name() {return _name;} 2992147SN/A FaultVect vect() {return _vect;} 3002222SN/A FaultStat & countStat() {return _count;} 3012147SN/A}; 3022090SN/A 3032147SN/Aclass UnimplementedOpcodeFault : public AlphaFault 3042090SN/A{ 3052147SN/A private: 3062147SN/A static FaultName _name; 3072147SN/A static FaultVect _vect; 3082222SN/A static FaultStat _count; 3092112SN/A public: 3102147SN/A FaultName name() {return _name;} 3112147SN/A FaultVect vect() {return _vect;} 3122222SN/A FaultStat & countStat() {return _count;} 3132147SN/A}; 3142090SN/A 3152147SN/Aclass FloatEnableFault : public AlphaFault 3162090SN/A{ 3172147SN/A private: 3182147SN/A static FaultName _name; 3192147SN/A static FaultVect _vect; 3202222SN/A static FaultStat _count; 3212112SN/A public: 3222147SN/A FaultName name() {return _name;} 3232147SN/A FaultVect vect() {return _vect;} 3242222SN/A FaultStat & countStat() {return _count;} 3252147SN/A}; 3262090SN/A 3272147SN/Aclass PalFault : public AlphaFault 3282090SN/A{ 3292201SN/A protected: 3302201SN/A bool skipFaultingInstruction() {return true;} 3312147SN/A private: 3322147SN/A static FaultName _name; 3332147SN/A static FaultVect _vect; 3342222SN/A static FaultStat _count; 3352112SN/A public: 3362147SN/A FaultName name() {return _name;} 3372147SN/A FaultVect vect() {return _vect;} 3382222SN/A FaultStat & countStat() {return _count;} 3392147SN/A}; 3402090SN/A 3412147SN/Aclass IntegerOverflowFault : public AlphaFault 3422090SN/A{ 3432147SN/A private: 3442147SN/A static FaultName _name; 3452147SN/A static FaultVect _vect; 3462222SN/A static FaultStat _count; 3472112SN/A public: 3482147SN/A FaultName name() {return _name;} 3492147SN/A FaultVect vect() {return _vect;} 3502222SN/A FaultStat & countStat() {return _count;} 3512147SN/A}; 3522090SN/A 3532167SN/A} // AlphaISA namespace 3542167SN/A 3552SN/A#endif // __FAULTS_HH__ 356