SConscript revision 8105:906864dd0937
17150Sgblack@eecs.umich.edu# -*- mode:python -*- 27150Sgblack@eecs.umich.edu 37150Sgblack@eecs.umich.edu# Copyright (c) 2006 The Regents of The University of Michigan 47150Sgblack@eecs.umich.edu# All rights reserved. 57150Sgblack@eecs.umich.edu# 67150Sgblack@eecs.umich.edu# Redistribution and use in source and binary forms, with or without 77150Sgblack@eecs.umich.edu# modification, are permitted provided that the following conditions are 87150Sgblack@eecs.umich.edu# met: redistributions of source code must retain the above copyright 97150Sgblack@eecs.umich.edu# notice, this list of conditions and the following disclaimer; 107150Sgblack@eecs.umich.edu# redistributions in binary form must reproduce the above copyright 117150Sgblack@eecs.umich.edu# notice, this list of conditions and the following disclaimer in the 127150Sgblack@eecs.umich.edu# documentation and/or other materials provided with the distribution; 137150Sgblack@eecs.umich.edu# neither the name of the copyright holders nor the names of its 147150Sgblack@eecs.umich.edu# contributors may be used to endorse or promote products derived from 157150Sgblack@eecs.umich.edu# this software without specific prior written permission. 167150Sgblack@eecs.umich.edu# 177150Sgblack@eecs.umich.edu# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 187150Sgblack@eecs.umich.edu# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 197150Sgblack@eecs.umich.edu# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 207150Sgblack@eecs.umich.edu# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 217150Sgblack@eecs.umich.edu# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 227150Sgblack@eecs.umich.edu# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 237150Sgblack@eecs.umich.edu# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 247150Sgblack@eecs.umich.edu# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 257150Sgblack@eecs.umich.edu# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 267150Sgblack@eecs.umich.edu# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 277150Sgblack@eecs.umich.edu# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 287150Sgblack@eecs.umich.edu# 297150Sgblack@eecs.umich.edu# Authors: Steve Reinhardt 307150Sgblack@eecs.umich.edu 317150Sgblack@eecs.umich.eduimport sys 327150Sgblack@eecs.umich.edu 337150Sgblack@eecs.umich.eduImport('*') 347150Sgblack@eecs.umich.edu 357150Sgblack@eecs.umich.edu################################################################# 367150Sgblack@eecs.umich.edu# 377150Sgblack@eecs.umich.edu# ISA "switch header" generation. 387150Sgblack@eecs.umich.edu# 397150Sgblack@eecs.umich.edu# Auto-generate arch headers that include the right ISA-specific 407150Sgblack@eecs.umich.edu# header based on the setting of THE_ISA preprocessor variable. 417150Sgblack@eecs.umich.edu# 427150Sgblack@eecs.umich.edu################################################################# 437150Sgblack@eecs.umich.edu 447150Sgblack@eecs.umich.edu# List of headers to generate 457150Sgblack@eecs.umich.eduisa_switch_hdrs = Split(''' 467150Sgblack@eecs.umich.edu faults.hh 477150Sgblack@eecs.umich.edu interrupts.hh 487150Sgblack@eecs.umich.edu isa.hh 497150Sgblack@eecs.umich.edu isa_traits.hh 507150Sgblack@eecs.umich.edu kernel_stats.hh 517150Sgblack@eecs.umich.edu locked_mem.hh 527150Sgblack@eecs.umich.edu microcode_rom.hh 537150Sgblack@eecs.umich.edu mmapped_ipr.hh 547150Sgblack@eecs.umich.edu mt.hh 557150Sgblack@eecs.umich.edu process.hh 567848SAli.Saidi@ARM.com predecoder.hh 577848SAli.Saidi@ARM.com registers.hh 587848SAli.Saidi@ARM.com remote_gdb.hh 597848SAli.Saidi@ARM.com stacktrace.hh 608146SAli.Saidi@ARM.com tlb.hh 618146SAli.Saidi@ARM.com types.hh 628146SAli.Saidi@ARM.com utility.hh 637848SAli.Saidi@ARM.com vtophys.hh 648146SAli.Saidi@ARM.com ''') 657150Sgblack@eecs.umich.edu 667150Sgblack@eecs.umich.edu# Set up this directory to support switching headers 677150Sgblack@eecs.umich.edumake_switching_dir('arch', isa_switch_hdrs, env) 687150Sgblack@eecs.umich.edu 697150Sgblack@eecs.umich.edu################################################################# 707150Sgblack@eecs.umich.edu# 717150Sgblack@eecs.umich.edu# Include architecture-specific files. 727150Sgblack@eecs.umich.edu# 737150Sgblack@eecs.umich.edu################################################################# 747150Sgblack@eecs.umich.edu 757150Sgblack@eecs.umich.edu# 768146SAli.Saidi@ARM.com# Build a SCons scanner for ISA files 777150Sgblack@eecs.umich.edu# 787150Sgblack@eecs.umich.eduimport SCons.Scanner 797150Sgblack@eecs.umich.edu 807150Sgblack@eecs.umich.eduisa_scanner = SCons.Scanner.Classic("ISAScan", 817150Sgblack@eecs.umich.edu [".isa", ".ISA"], 827150Sgblack@eecs.umich.edu "SRCDIR", 837150Sgblack@eecs.umich.edu r'^\s*##include\s+"([\w/.-]*)"') 847150Sgblack@eecs.umich.edu 857150Sgblack@eecs.umich.eduenv.Append(SCANNERS = isa_scanner) 867150Sgblack@eecs.umich.edu 877150Sgblack@eecs.umich.edu# 887848SAli.Saidi@ARM.com# Now create a Builder object that uses isa_parser.py to generate C++ 897848SAli.Saidi@ARM.com# output from the ISA description (*.isa) files. 907848SAli.Saidi@ARM.com# 917848SAli.Saidi@ARM.com 928146SAli.Saidi@ARM.com# The emitter patches up the sources & targets to include the 938146SAli.Saidi@ARM.com# autogenerated files as targets and isa parser itself as a source. 948146SAli.Saidi@ARM.comdef isa_desc_emitter(target, source, env): 957848SAli.Saidi@ARM.com cpu_models = list(env['CPU_MODELS']) 967150Sgblack@eecs.umich.edu if env['USE_CHECKER']: 977150Sgblack@eecs.umich.edu cpu_models.append('CheckerCPU') 987150Sgblack@eecs.umich.edu 997150Sgblack@eecs.umich.edu # Several files are generated from the ISA description. 1007150Sgblack@eecs.umich.edu # We always get the basic decoder and header file. 1017150Sgblack@eecs.umich.edu target = [ 'decoder.cc', 'decoder.hh', 'max_inst_regs.hh' ] 1027150Sgblack@eecs.umich.edu # We also get an execute file for each selected CPU model. 1037150Sgblack@eecs.umich.edu target += [CpuModel.dict[cpu].filename for cpu in cpu_models] 1047150Sgblack@eecs.umich.edu 1057150Sgblack@eecs.umich.edu return target, source + [ Value(m) for m in cpu_models ] 1067150Sgblack@eecs.umich.edu 1077150Sgblack@eecs.umich.eduARCH_DIR = Dir('.') 1087150Sgblack@eecs.umich.edu 1097150Sgblack@eecs.umich.edu# import ply here because SCons screws with sys.path when performing actions. 1107150Sgblack@eecs.umich.eduimport ply 1117150Sgblack@eecs.umich.edu 1127150Sgblack@eecs.umich.edudef isa_desc_action_func(target, source, env): 1137150Sgblack@eecs.umich.edu # Add the current directory to the system path so we can import files 1147150Sgblack@eecs.umich.edu sys.path[0:0] = [ ARCH_DIR.srcnode().abspath ] 1157848SAli.Saidi@ARM.com import isa_parser 1167848SAli.Saidi@ARM.com 1177848SAli.Saidi@ARM.com models = [ s.get_contents() for s in source[1:] ] 1187848SAli.Saidi@ARM.com cpu_models = [CpuModel.dict[cpu] for cpu in models] 1198146SAli.Saidi@ARM.com parser = isa_parser.ISAParser(target[0].dir.abspath, cpu_models) 1208146SAli.Saidi@ARM.com parser.parse_isa_desc(source[0].abspath) 1218146SAli.Saidi@ARM.comisa_desc_action = MakeAction(isa_desc_action_func, Transform("ISA DESC", 1)) 1227848SAli.Saidi@ARM.com 1238203SAli.Saidi@ARM.com# Also include the CheckerCPU as one of the models if it is being 1248203SAli.Saidi@ARM.com# enabled via command line. 1257150Sgblack@eecs.umich.eduisa_desc_builder = Builder(action=isa_desc_action, emitter=isa_desc_emitter) 1267150Sgblack@eecs.umich.edu 1277150Sgblack@eecs.umich.eduenv.Append(BUILDERS = { 'ISADesc' : isa_desc_builder }) 1287150Sgblack@eecs.umich.edu 1297150Sgblack@eecs.umich.eduTraceFlag('IntRegs') 1307150Sgblack@eecs.umich.eduTraceFlag('FloatRegs') 1317150Sgblack@eecs.umich.eduTraceFlag('MiscRegs') 1327150Sgblack@eecs.umich.eduCompoundFlag('Registers', [ 'IntRegs', 'FloatRegs', 'MiscRegs' ]) 1337150Sgblack@eecs.umich.edu