SConscript revision 13610:5d5404ac6288
1# -*- mode:python -*- 2 3# Copyright (c) 2016-2017 ARM Limited 4# All rights reserved. 5# 6# The license below extends only to copyright in the software and shall 7# not be construed as granting a license to any other intellectual 8# property including but not limited to intellectual property relating 9# to a hardware implementation of the functionality of the software 10# licensed hereunder. You may use the software subject to the license 11# terms below provided that you ensure that this notice is replicated 12# unmodified and in its entirety in all distributions of the software, 13# modified or unmodified, in source code or in binary form. 14# 15# Copyright (c) 2006 The Regents of The University of Michigan 16# All rights reserved. 17# 18# Redistribution and use in source and binary forms, with or without 19# modification, are permitted provided that the following conditions are 20# met: redistributions of source code must retain the above copyright 21# notice, this list of conditions and the following disclaimer; 22# redistributions in binary form must reproduce the above copyright 23# notice, this list of conditions and the following disclaimer in the 24# documentation and/or other materials provided with the distribution; 25# neither the name of the copyright holders nor the names of its 26# contributors may be used to endorse or promote products derived from 27# this software without specific prior written permission. 28# 29# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 30# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 31# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 32# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 33# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 34# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 35# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 36# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 37# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 38# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 39# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 40# 41# Authors: Steve Reinhardt 42 43import sys 44import os 45import re 46 47from gem5_scons import Transform 48 49Import('*') 50 51################################################################# 52# 53# ISA "switch header" generation. 54# 55# Auto-generate arch headers that include the right ISA-specific 56# header based on the setting of THE_ISA preprocessor variable. 57# 58################################################################# 59 60env.SwitchingHeaders( 61 Split(''' 62 decoder.hh 63 interrupts.hh 64 isa.hh 65 isa_traits.hh 66 kernel_stats.hh 67 locked_mem.hh 68 microcode_rom.hh 69 mmapped_ipr.hh 70 mt.hh 71 process.hh 72 pseudo_inst.hh 73 registers.hh 74 remote_gdb.hh 75 stacktrace.hh 76 types.hh 77 utility.hh 78 vtophys.hh 79 '''), 80 env.subst('${TARGET_ISA}')) 81 82if env['BUILD_GPU']: 83 env.SwitchingHeaders( 84 Split(''' 85 gpu_decoder.hh 86 gpu_isa.hh 87 gpu_types.hh 88 '''), 89 env.subst('${TARGET_GPU_ISA}')) 90 91################################################################# 92# 93# Include architecture-specific files. 94# 95################################################################# 96 97# 98# Build a SCons scanner for ISA files 99# 100import SCons.Scanner 101import SCons.Tool 102 103scanner = SCons.Scanner.Classic("ISAScan", 104 [".isa", ".ISA"], 105 "SRCDIR", 106 r'^\s*##include\s+"([\w/.-]*)"') 107 108env.Append(SCANNERS=scanner) 109 110# Tell scons that when it sees a cc.inc file, it should scan it for includes. 111SCons.Tool.SourceFileScanner.add_scanner('.cc.inc', SCons.Tool.CScanner) 112 113# 114# Now create a Builder object that uses isa_parser.py to generate C++ 115# output from the ISA description (*.isa) files. 116# 117 118parser_py = File('isa_parser.py') 119micro_asm_py = File('micro_asm.py') 120 121# import ply here because SCons screws with sys.path when performing actions. 122import ply 123 124def run_parser(target, source, env): 125 # Add the current directory to the system path so we can import files. 126 sys.path[0:0] = [ parser_py.dir.abspath ] 127 import isa_parser 128 129 parser = isa_parser.ISAParser(target[0].dir.abspath) 130 parser.parse_isa_desc(source[0].abspath) 131 132desc_action = MakeAction(run_parser, Transform("ISA DESC", 1)) 133 134IsaDescBuilder = Builder(action=desc_action) 135 136 137# ISAs should use this function to set up an IsaDescBuilder and not try to 138# set one up manually. 139def ISADesc(desc, decoder_splits=1, exec_splits=1): 140 '''Set up a builder for an ISA description. 141 142 The decoder_splits and exec_splits parameters let us determine what 143 files the isa parser is actually going to generate. This needs to match 144 what files are actually generated, and there's no specific check for that 145 right now. 146 147 If the parser itself is responsible for generating a list of its products 148 and their dependencies, then using that output to set up the right 149 dependencies. This is what we used to do. The problem is that scons 150 fundamentally doesn't support using a build product to affect its graph 151 of possible products, dependencies, builders, etc. There are a couple ways 152 to work around that limitation. 153 154 One option is to compute dependencies while the build phase of scons is 155 running. That method can be quite complicated and cumbersome, because we 156 have to make sure our modifications are made before scons tries to 157 consume them. There's also no guarantee that this mechanism will work since 158 it subverts scons expectations and changes things behind its back. This 159 was implemented previously and constrained the builds parallelism 160 significantly. 161 162 Another option would be to recursively call scons to have it update the 163 list of products/dependencies during the setup phase of this invocation of 164 scons. The problem with that is that it would be very difficult to make 165 the sub-invocation of scons observe the options passed to the primary one 166 in all possible cases, or to even determine conclusively what the name of 167 the scons executable is in the first place. 168 169 Possible future changes to the isa parser might make it easier to 170 determine what files it would generate, perhaps because there was a more 171 direct correspondence between input files and output files. Or, if the 172 parser could run quickly and determine what its output files would be 173 without having do actually generate those files, then it could be run 174 unconditionally without slowing down all builds or touching the output 175 files unnecessarily. 176 ''' 177 generated_dir = File(desc).dir.up().Dir('generated') 178 def gen_file(name): 179 return generated_dir.File(name) 180 181 gen = [] 182 def add_gen(name): 183 gen.append(gen_file(name)) 184 185 # Tell scons about the various files the ISA parser will generate. 186 add_gen('decoder-g.cc.inc') 187 add_gen('decoder-ns.cc.inc') 188 add_gen('decode-method.cc.inc') 189 190 add_gen('decoder.hh') 191 add_gen('decoder-g.hh.inc') 192 add_gen('decoder-ns.hh.inc') 193 194 add_gen('exec-g.cc.inc') 195 add_gen('exec-ns.cc.inc') 196 197 add_gen('max_inst_regs.hh') 198 199 200 # These generated files are also top level sources. 201 def source_gen(name): 202 add_gen(name) 203 Source(gen_file(name)) 204 205 source_gen('decoder.cc') 206 207 if decoder_splits == 1: 208 source_gen('inst-constrs.cc') 209 else: 210 for i in range(1, decoder_splits + 1): 211 source_gen('inst-constrs-%d.cc' % i) 212 213 if exec_splits == 1: 214 source_gen('generic_cpu_exec.cc') 215 else: 216 for i in range(1, exec_splits + 1): 217 source_gen('generic_cpu_exec_%d.cc' % i) 218 219 # Actually create the builder. 220 sources = [desc, parser_py, micro_asm_py] 221 IsaDescBuilder(target=gen, source=sources, env=env) 222 return gen 223 224Export('ISADesc') 225 226DebugFlag('IntRegs') 227DebugFlag('FloatRegs') 228DebugFlag('VecRegs') 229DebugFlag('VecPredRegs') 230DebugFlag('CCRegs') 231DebugFlag('MiscRegs') 232CompoundFlag('Registers', [ 'IntRegs', 'FloatRegs', 'VecRegs', 'VecPredRegs', 233 'CCRegs', 'MiscRegs' ]) 234