SConscript revision 8585
12139SN/A# -*- mode:python -*-
22139SN/A
32139SN/A# Copyright (c) 2006 The Regents of The University of Michigan
42139SN/A# All rights reserved.
52139SN/A#
62139SN/A# Redistribution and use in source and binary forms, with or without
72139SN/A# modification, are permitted provided that the following conditions are
82139SN/A# met: redistributions of source code must retain the above copyright
92139SN/A# notice, this list of conditions and the following disclaimer;
102139SN/A# redistributions in binary form must reproduce the above copyright
112139SN/A# notice, this list of conditions and the following disclaimer in the
122139SN/A# documentation and/or other materials provided with the distribution;
132139SN/A# neither the name of the copyright holders nor the names of its
142139SN/A# contributors may be used to endorse or promote products derived from
152139SN/A# this software without specific prior written permission.
162139SN/A#
172139SN/A# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
182139SN/A# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
192139SN/A# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
202139SN/A# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
212139SN/A# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
222139SN/A# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
232139SN/A# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
242139SN/A# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
252139SN/A# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
262139SN/A# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
272139SN/A# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
282665Ssaidi@eecs.umich.edu#
292665Ssaidi@eecs.umich.edu# Authors: Steve Reinhardt
302139SN/A
314202Sbinkertn@umich.eduimport sys
322139SN/A
334202Sbinkertn@umich.eduImport('*')
342152SN/A
352152SN/A#################################################################
362139SN/A#
372139SN/A# ISA "switch header" generation.
382139SN/A#
392139SN/A# Auto-generate arch headers that include the right ISA-specific
402139SN/A# header based on the setting of THE_ISA preprocessor variable.
412152SN/A#
422152SN/A#################################################################
432139SN/A
442139SN/A# List of headers to generate
452139SN/Aisa_switch_hdrs = Split('''
464781Snate@binkert.org        faults.hh
474781Snate@binkert.org        interrupts.hh
487799Sgblack@eecs.umich.edu        isa.hh
494781Snate@binkert.org        isa_traits.hh
504781Snate@binkert.org        kernel_stats.hh
513170Sstever@eecs.umich.edu        locked_mem.hh
525664Sgblack@eecs.umich.edu        microcode_rom.hh
538105Sgblack@eecs.umich.edu        mmapped_ipr.hh
546179Sksewell@umich.edu        mt.hh
554781Snate@binkert.org        process.hh
564781Snate@binkert.org        predecoder.hh
576329Sgblack@eecs.umich.edu        registers.hh
584781Snate@binkert.org        remote_gdb.hh
594781Snate@binkert.org        stacktrace.hh
604781Snate@binkert.org        tlb.hh
614781Snate@binkert.org        types.hh
624781Snate@binkert.org        utility.hh
634781Snate@binkert.org        vtophys.hh
642139SN/A        ''')
652139SN/A
663546Sgblack@eecs.umich.edu# Set up this directory to support switching headers
674202Sbinkertn@umich.edumake_switching_dir('arch', isa_switch_hdrs, env)
682152SN/A
692152SN/A#################################################################
702152SN/A#
712152SN/A# Include architecture-specific files.
722152SN/A#
732152SN/A#################################################################
742152SN/A
752152SN/A#
762152SN/A# Build a SCons scanner for ISA files
772152SN/A#
782152SN/Aimport SCons.Scanner
792152SN/A
802504SN/Aisa_scanner = SCons.Scanner.Classic("ISAScan",
812504SN/A                                    [".isa", ".ISA"],
822504SN/A                                    "SRCDIR",
832504SN/A                                    r'^\s*##include\s+"([\w/.-]*)"')
842152SN/A
852504SN/Aenv.Append(SCANNERS = isa_scanner)
862152SN/A
872152SN/A#
882152SN/A# Now create a Builder object that uses isa_parser.py to generate C++
892152SN/A# output from the ISA description (*.isa) files.
902152SN/A#
912152SN/A
928584Sgblack@eecs.umich.eduisa_parser = File('isa_parser.py')
938584Sgblack@eecs.umich.edu
946993Snate@binkert.org# The emitter patches up the sources & targets to include the
956993Snate@binkert.org# autogenerated files as targets and isa parser itself as a source.
966993Snate@binkert.orgdef isa_desc_emitter(target, source, env):
976993Snate@binkert.org    cpu_models = list(env['CPU_MODELS'])
986993Snate@binkert.org    if env['USE_CHECKER']:
996993Snate@binkert.org        cpu_models.append('CheckerCPU')
1006993Snate@binkert.org
1016993Snate@binkert.org    # Several files are generated from the ISA description.
1026993Snate@binkert.org    # We always get the basic decoder and header file.
1036993Snate@binkert.org    target = [ 'decoder.cc', 'decoder.hh', 'max_inst_regs.hh' ]
1046993Snate@binkert.org    # We also get an execute file for each selected CPU model.
1056993Snate@binkert.org    target += [CpuModel.dict[cpu].filename for cpu in cpu_models]
1066993Snate@binkert.org
1078584Sgblack@eecs.umich.edu    # List the isa parser as a source.
1088584Sgblack@eecs.umich.edu    source += [ isa_parser ]
1098584Sgblack@eecs.umich.edu    # Add in the CPU models.
1108584Sgblack@eecs.umich.edu    source += [ Value(m) for m in cpu_models ]
1118584Sgblack@eecs.umich.edu
1128584Sgblack@eecs.umich.edu    return target, source
1136993Snate@binkert.org
1146993Snate@binkert.orgARCH_DIR = Dir('.')
1156993Snate@binkert.org
1166998Snate@binkert.org# import ply here because SCons screws with sys.path when performing actions.
1176998Snate@binkert.orgimport ply
1186998Snate@binkert.org
1197756SAli.Saidi@ARM.comdef isa_desc_action_func(target, source, env):
1206993Snate@binkert.org    # Add the current directory to the system path so we can import files
1216993Snate@binkert.org    sys.path[0:0] = [ ARCH_DIR.srcnode().abspath ]
1226993Snate@binkert.org    import isa_parser
1236993Snate@binkert.org
1248585Sgblack@eecs.umich.edu    # Skip over the ISA description itself and the parser to the CPU models.
1258584Sgblack@eecs.umich.edu    models = [ s.get_contents() for s in source[2:] ]
1266993Snate@binkert.org    cpu_models = [CpuModel.dict[cpu] for cpu in models]
1276993Snate@binkert.org    parser = isa_parser.ISAParser(target[0].dir.abspath, cpu_models)
1286993Snate@binkert.org    parser.parse_isa_desc(source[0].abspath)
1297816Ssteve.reinhardt@amd.comisa_desc_action = MakeAction(isa_desc_action_func, Transform("ISA DESC", 1))
1302152SN/A
1312766Sktlim@umich.edu# Also include the CheckerCPU as one of the models if it is being
1322766Sktlim@umich.edu# enabled via command line.
1336993Snate@binkert.orgisa_desc_builder = Builder(action=isa_desc_action, emitter=isa_desc_emitter)
1342152SN/A
1352152SN/Aenv.Append(BUILDERS = { 'ISADesc' : isa_desc_builder })
1365944Sgblack@eecs.umich.edu
1378335Snate@binkert.orgDebugFlag('IntRegs')
1388335Snate@binkert.orgDebugFlag('FloatRegs')
1398335Snate@binkert.orgDebugFlag('MiscRegs')
1405944Sgblack@eecs.umich.eduCompoundFlag('Registers', [ 'IntRegs', 'FloatRegs', 'MiscRegs' ])
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