SConscript revision 12246
12139SN/A# -*- mode:python -*-
22139SN/A
32139SN/A# Copyright (c) 2016 ARM Limited
42139SN/A# All rights reserved.
52139SN/A#
62139SN/A# The license below extends only to copyright in the software and shall
72139SN/A# not be construed as granting a license to any other intellectual
82139SN/A# property including but not limited to intellectual property relating
92139SN/A# to a hardware implementation of the functionality of the software
102139SN/A# licensed hereunder.  You may use the software subject to the license
112139SN/A# terms below provided that you ensure that this notice is replicated
122139SN/A# unmodified and in its entirety in all distributions of the software,
132139SN/A# modified or unmodified, in source code or in binary form.
142139SN/A#
152139SN/A# Copyright (c) 2006 The Regents of The University of Michigan
162139SN/A# All rights reserved.
172139SN/A#
182139SN/A# Redistribution and use in source and binary forms, with or without
192139SN/A# modification, are permitted provided that the following conditions are
202139SN/A# met: redistributions of source code must retain the above copyright
212139SN/A# notice, this list of conditions and the following disclaimer;
222139SN/A# redistributions in binary form must reproduce the above copyright
232139SN/A# notice, this list of conditions and the following disclaimer in the
242139SN/A# documentation and/or other materials provided with the distribution;
252139SN/A# neither the name of the copyright holders nor the names of its
262139SN/A# contributors may be used to endorse or promote products derived from
272139SN/A# this software without specific prior written permission.
282665Ssaidi@eecs.umich.edu#
292665Ssaidi@eecs.umich.edu# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
302139SN/A# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
314202Sbinkertn@umich.edu# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
328961Sgblack@eecs.umich.edu# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
3310196SCurtis.Dunham@arm.com# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
342139SN/A# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
354202Sbinkertn@umich.edu# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
362152SN/A# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
372152SN/A# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
382139SN/A# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
392139SN/A# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
402139SN/A#
412139SN/A# Authors: Steve Reinhardt
422139SN/A
432152SN/Aimport sys
442152SN/Aimport os
452139SN/Aimport re
4612015Sgabeblack@google.com
4712015Sgabeblack@google.comfrom gem5_scons import Transform
489020Sgblack@eecs.umich.edu
494781Snate@binkert.orgImport('*')
507799Sgblack@eecs.umich.edu
514781Snate@binkert.org#################################################################
524781Snate@binkert.org#
533170Sstever@eecs.umich.edu# ISA "switch header" generation.
545664Sgblack@eecs.umich.edu#
558105Sgblack@eecs.umich.edu# Auto-generate arch headers that include the right ISA-specific
566179Sksewell@umich.edu# header based on the setting of THE_ISA preprocessor variable.
574781Snate@binkert.org#
5810553Salexandru.dutu@amd.com#################################################################
596329Sgblack@eecs.umich.edu
604781Snate@binkert.orgenv.SwitchingHeaders(
614781Snate@binkert.org    Split('''
624781Snate@binkert.org        decoder.hh
634781Snate@binkert.org        interrupts.hh
644781Snate@binkert.org        isa.hh
654781Snate@binkert.org        isa_traits.hh
6612015Sgabeblack@google.com        kernel_stats.hh
6712015Sgabeblack@google.com        locked_mem.hh
682152SN/A        microcode_rom.hh
6911308Santhony.gutierrez@amd.com        mmapped_ipr.hh
7012016Sgabeblack@google.com        mt.hh
7112016Sgabeblack@google.com        process.hh
7211308Santhony.gutierrez@amd.com        pseudo_inst.hh
7311696Santhony.gutierrez@amd.com        registers.hh
7411308Santhony.gutierrez@amd.com        remote_gdb.hh
7512016Sgabeblack@google.com        stacktrace.hh
7612016Sgabeblack@google.com        tlb.hh
7711308Santhony.gutierrez@amd.com        types.hh
782152SN/A        utility.hh
792152SN/A        vtophys.hh
802152SN/A        '''),
812152SN/A    env.subst('${TARGET_ISA}'))
822152SN/A
832152SN/Aif env['BUILD_GPU']:
842152SN/A    env.SwitchingHeaders(
852152SN/A        Split('''
862152SN/A            gpu_decoder.hh
872152SN/A            gpu_isa.hh
882152SN/A            gpu_types.hh
892504SN/A            '''),
902504SN/A        env.subst('${TARGET_GPU_ISA}'))
912504SN/A
922504SN/A#################################################################
932152SN/A#
942504SN/A# Include architecture-specific files.
952152SN/A#
962152SN/A#################################################################
972152SN/A
982152SN/A#
992152SN/A# Build a SCons scanner for ISA files
1002152SN/A#
1018584Sgblack@eecs.umich.eduimport SCons.Scanner
1028584Sgblack@eecs.umich.eduimport SCons.Tool
1036993Snate@binkert.org
1046993Snate@binkert.orgscanner = SCons.Scanner.Classic("ISAScan",
1056993Snate@binkert.org                                [".isa", ".ISA"],
1068584Sgblack@eecs.umich.edu                                 "SRCDIR",
10710319SAndreas.Sandberg@ARM.com                                r'^\s*##include\s+"([\w/.-]*)"')
10810319SAndreas.Sandberg@ARM.com
10910319SAndreas.Sandberg@ARM.comenv.Append(SCANNERS=scanner)
11010319SAndreas.Sandberg@ARM.com
1118584Sgblack@eecs.umich.edu# Tell scons that when it sees a cc.inc file, it should scan it for includes.
11210196SCurtis.Dunham@arm.comSCons.Tool.SourceFileScanner.add_scanner('.cc.inc', SCons.Tool.CScanner)
11310196SCurtis.Dunham@arm.com
11410196SCurtis.Dunham@arm.com#
11510196SCurtis.Dunham@arm.com# Now create a Builder object that uses isa_parser.py to generate C++
11610196SCurtis.Dunham@arm.com# output from the ISA description (*.isa) files.
11710196SCurtis.Dunham@arm.com#
11810196SCurtis.Dunham@arm.com
11910196SCurtis.Dunham@arm.comparser_py = File('isa_parser.py')
12010196SCurtis.Dunham@arm.commicro_asm_py = File('micro_asm.py')
12110196SCurtis.Dunham@arm.com
12210196SCurtis.Dunham@arm.com# import ply here because SCons screws with sys.path when performing actions.
12310196SCurtis.Dunham@arm.comimport ply
12410196SCurtis.Dunham@arm.com
12510196SCurtis.Dunham@arm.comdef run_parser(target, source, env):
12610196SCurtis.Dunham@arm.com    # Add the current directory to the system path so we can import files.
12710196SCurtis.Dunham@arm.com    sys.path[0:0] = [ parser_py.dir.abspath ]
12810196SCurtis.Dunham@arm.com    import isa_parser
12910196SCurtis.Dunham@arm.com
13010196SCurtis.Dunham@arm.com    parser = isa_parser.ISAParser(target[0].dir.abspath)
13110196SCurtis.Dunham@arm.com    parser.parse_isa_desc(source[0].abspath)
13210196SCurtis.Dunham@arm.com
1336993Snate@binkert.orgdesc_action = MakeAction(run_parser, Transform("ISA DESC", 1))
1346993Snate@binkert.org
1356993Snate@binkert.orgIsaDescBuilder = Builder(action=desc_action)
1366998Snate@binkert.org
1376998Snate@binkert.org
1386998Snate@binkert.org# ISAs should use this function to set up an IsaDescBuilder and not try to
1397756SAli.Saidi@ARM.com# set one up manually.
1406993Snate@binkert.orgdef ISADesc(desc, decoder_splits=1, exec_splits=1):
1416993Snate@binkert.org    '''Set up a builder for an ISA description.
1426993Snate@binkert.org
1436993Snate@binkert.org    The decoder_splits and exec_splits parameters let us determine what
1448585Sgblack@eecs.umich.edu    files the isa parser is actually going to generate. This needs to match
1458584Sgblack@eecs.umich.edu    what files are actually generated, and there's no specific check for that
14610319SAndreas.Sandberg@ARM.com    right now.
1476993Snate@binkert.org
1487816Ssteve.reinhardt@amd.com    If the parser itself is responsible for generating a list of its products
1492152SN/A    and their dependencies, then using that output to set up the right
1502766Sktlim@umich.edu    dependencies. This is what we used to do. The problem is that scons
1512766Sktlim@umich.edu    fundamentally doesn't support using a build product to affect its graph
1526993Snate@binkert.org    of possible products, dependencies, builders, etc. There are a couple ways
1532152SN/A    to work around that limitation.
1542152SN/A
1555944Sgblack@eecs.umich.edu    One option is to compute dependencies while the build phase of scons is
15610196SCurtis.Dunham@arm.com    running. That method can be quite complicated and cumbersome, because we
15710196SCurtis.Dunham@arm.com    have to make sure our modifications are made before scons tries to
15810196SCurtis.Dunham@arm.com    consume them. There's also no guarantee that this mechanism will work since
15910196SCurtis.Dunham@arm.com    it subverts scons expectations and changes things behind its back. This
16010196SCurtis.Dunham@arm.com    was implemented previously and constrained the builds parallelism
16110196SCurtis.Dunham@arm.com    significantly.
16210196SCurtis.Dunham@arm.com
16310196SCurtis.Dunham@arm.com    Another option would be to recursively call scons to have it update the
16410196SCurtis.Dunham@arm.com    list of products/dependencies during the setup phase of this invocation of
16510196SCurtis.Dunham@arm.com    scons. The problem with that is that it would be very difficult to make
16610196SCurtis.Dunham@arm.com    the sub-invocation of scons observe the options passed to the primary one
16710196SCurtis.Dunham@arm.com    in all possible cases, or to even determine conclusively what the name of
16810196SCurtis.Dunham@arm.com    the scons executable is in the first place.
16910196SCurtis.Dunham@arm.com
17010196SCurtis.Dunham@arm.com    Possible future changes to the isa parser might make it easier to
17110196SCurtis.Dunham@arm.com    determine what files it would generate, perhaps because there was a more
17210196SCurtis.Dunham@arm.com    direct correspondence between input files and output files. Or, if the
17310196SCurtis.Dunham@arm.com    parser could run quickly and determine what its output files would be
17410196SCurtis.Dunham@arm.com    without having do actually generate those files, then it could be run
17510196SCurtis.Dunham@arm.com    unconditionally without slowing down all builds or touching the output
17610196SCurtis.Dunham@arm.com    files unnecessarily.
17710196SCurtis.Dunham@arm.com    '''
17810196SCurtis.Dunham@arm.com    generated_dir = File(desc).dir.up().Dir('generated')
17910196SCurtis.Dunham@arm.com    def gen_file(name):
18010196SCurtis.Dunham@arm.com        return generated_dir.File(name)
18110196SCurtis.Dunham@arm.com
18210196SCurtis.Dunham@arm.com    gen = []
18310196SCurtis.Dunham@arm.com    def add_gen(name):
18410196SCurtis.Dunham@arm.com        gen.append(gen_file(name))
18510196SCurtis.Dunham@arm.com
18610196SCurtis.Dunham@arm.com    # Tell scons about the various files the ISA parser will generate.
18710196SCurtis.Dunham@arm.com    add_gen('decoder-g.cc.inc')
18810196SCurtis.Dunham@arm.com    add_gen('decoder-ns.cc.inc')
18910196SCurtis.Dunham@arm.com    add_gen('decode-method.cc.inc')
19010196SCurtis.Dunham@arm.com
19110196SCurtis.Dunham@arm.com    add_gen('decoder.hh')
19210196SCurtis.Dunham@arm.com    add_gen('decoder-g.hh.inc')
19310196SCurtis.Dunham@arm.com    add_gen('decoder-ns.hh.inc')
19410196SCurtis.Dunham@arm.com
19510196SCurtis.Dunham@arm.com    add_gen('exec-g.cc.inc')
19610196SCurtis.Dunham@arm.com    add_gen('exec-ns.cc.inc')
19710196SCurtis.Dunham@arm.com
19810196SCurtis.Dunham@arm.com    add_gen('max_inst_regs.hh')
19910196SCurtis.Dunham@arm.com
20010196SCurtis.Dunham@arm.com
20110196SCurtis.Dunham@arm.com    # These generated files are also top level sources.
20210196SCurtis.Dunham@arm.com    def source_gen(name):
2038335Snate@binkert.org        add_gen(name)
2048335Snate@binkert.org        Source(gen_file(name))
2059920Syasuko.eckert@amd.com
2068335Snate@binkert.org    source_gen('decoder.cc')
20710935Snilay@cs.wisc.edu
208    if decoder_splits == 1:
209        source_gen('inst-constrs.cc')
210    else:
211        for i in range(1, decoder_splits + 1):
212            source_gen('inst-constrs-%d.cc' % i)
213
214    if exec_splits == 1:
215        source_gen('generic_cpu_exec.cc')
216    else:
217        for i in range(1, exec_splits + 1):
218            source_gen('generic_cpu_exec_%d.cc' % i)
219
220    # Actually create the builder.
221    sources = [desc, parser_py, micro_asm_py]
222    IsaDescBuilder(target=gen, source=sources, env=env)
223    return gen
224
225Export('ISADesc')
226
227DebugFlag('IntRegs')
228DebugFlag('FloatRegs')
229DebugFlag('VecRegs')
230DebugFlag('CCRegs')
231DebugFlag('MiscRegs')
232CompoundFlag('Registers', [ 'IntRegs', 'FloatRegs', 'CCRegs', 'MiscRegs' ])
233