SConscript revision 2037
12929Sktlim@umich.edu# -*- mode:python -*- 22929Sktlim@umich.edu 32932Sktlim@umich.edu# Copyright (c) 2004-2005 The Regents of The University of Michigan 42929Sktlim@umich.edu# All rights reserved. 52929Sktlim@umich.edu# 62929Sktlim@umich.edu# Redistribution and use in source and binary forms, with or without 72929Sktlim@umich.edu# modification, are permitted provided that the following conditions are 82929Sktlim@umich.edu# met: redistributions of source code must retain the above copyright 92929Sktlim@umich.edu# notice, this list of conditions and the following disclaimer; 102929Sktlim@umich.edu# redistributions in binary form must reproduce the above copyright 112929Sktlim@umich.edu# notice, this list of conditions and the following disclaimer in the 122929Sktlim@umich.edu# documentation and/or other materials provided with the distribution; 132929Sktlim@umich.edu# neither the name of the copyright holders nor the names of its 142929Sktlim@umich.edu# contributors may be used to endorse or promote products derived from 152929Sktlim@umich.edu# this software without specific prior written permission. 162929Sktlim@umich.edu# 172929Sktlim@umich.edu# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 182929Sktlim@umich.edu# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 192929Sktlim@umich.edu# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 202929Sktlim@umich.edu# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 212929Sktlim@umich.edu# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 222929Sktlim@umich.edu# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 232929Sktlim@umich.edu# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 242929Sktlim@umich.edu# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 252929Sktlim@umich.edu# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 262929Sktlim@umich.edu# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 272929Sktlim@umich.edu# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 282932Sktlim@umich.edu 292932Sktlim@umich.eduimport os 302932Sktlim@umich.eduimport sys 312929Sktlim@umich.edufrom os.path import isdir 326007Ssteve.reinhardt@amd.com 337735SAli.Saidi@ARM.com# This file defines how to build a particular configuration of M5 342929Sktlim@umich.edu# based on variable settings in the 'env' build environment. 352929Sktlim@umich.edu 362929Sktlim@umich.edu# Import build environment variable from SConstruct. 372929Sktlim@umich.eduImport('env') 382929Sktlim@umich.edu 392929Sktlim@umich.edu################################################### 402929Sktlim@umich.edu# 418947Sandreas.hansson@arm.com# Define needed sources. 428947Sandreas.hansson@arm.com# 438947Sandreas.hansson@arm.com################################################### 442929Sktlim@umich.edu 452929Sktlim@umich.edu# Base sources used by all configurations. 462929Sktlim@umich.edu 472929Sktlim@umich.edubase_sources = Split(''' 482929Sktlim@umich.edu base/circlebuf.cc 492929Sktlim@umich.edu base/copyright.cc 506007Ssteve.reinhardt@amd.com base/cprintf.cc 516007Ssteve.reinhardt@amd.com base/embedfile.cc 526007Ssteve.reinhardt@amd.com base/fast_alloc.cc 536007Ssteve.reinhardt@amd.com base/fifo_buffer.cc 546007Ssteve.reinhardt@amd.com base/hostinfo.cc 556007Ssteve.reinhardt@amd.com base/hybrid_pred.cc 566007Ssteve.reinhardt@amd.com base/inifile.cc 576007Ssteve.reinhardt@amd.com base/intmath.cc 586007Ssteve.reinhardt@amd.com base/match.cc 596007Ssteve.reinhardt@amd.com base/misc.cc 606007Ssteve.reinhardt@amd.com base/output.cc 616007Ssteve.reinhardt@amd.com base/pollevent.cc 626007Ssteve.reinhardt@amd.com base/range.cc 636007Ssteve.reinhardt@amd.com base/random.cc 646007Ssteve.reinhardt@amd.com base/sat_counter.cc 656007Ssteve.reinhardt@amd.com base/socket.cc 669435SAndreas.Sandberg@ARM.com base/statistics.cc 679435SAndreas.Sandberg@ARM.com base/str.cc 689435SAndreas.Sandberg@ARM.com base/time.cc 696007Ssteve.reinhardt@amd.com base/trace.cc 706007Ssteve.reinhardt@amd.com base/traceflags.cc 716007Ssteve.reinhardt@amd.com base/userinfo.cc 726007Ssteve.reinhardt@amd.com base/compression/lzss_compression.cc 736007Ssteve.reinhardt@amd.com base/loader/aout_object.cc 746007Ssteve.reinhardt@amd.com base/loader/ecoff_object.cc 756007Ssteve.reinhardt@amd.com base/loader/elf_object.cc 766007Ssteve.reinhardt@amd.com base/loader/object_file.cc 776007Ssteve.reinhardt@amd.com base/loader/symtab.cc 786007Ssteve.reinhardt@amd.com base/stats/events.cc 792929Sktlim@umich.edu base/stats/statdb.cc 802929Sktlim@umich.edu base/stats/visit.cc 812929Sktlim@umich.edu base/stats/text.cc 826007Ssteve.reinhardt@amd.com 836007Ssteve.reinhardt@amd.com cpu/base.cc 846007Ssteve.reinhardt@amd.com cpu/base_dyn_inst.cc 859781Sandreas.hansson@arm.com cpu/exec_context.cc 866007Ssteve.reinhardt@amd.com cpu/exetrace.cc 876007Ssteve.reinhardt@amd.com cpu/pc_event.cc 882929Sktlim@umich.edu cpu/static_inst.cc 892929Sktlim@umich.edu cpu/o3/2bit_local_pred.cc 902929Sktlim@umich.edu cpu/o3/alpha_dyn_inst.cc 912929Sktlim@umich.edu cpu/o3/alpha_cpu.cc 922929Sktlim@umich.edu cpu/o3/alpha_cpu_builder.cc 936011Ssteve.reinhardt@amd.com cpu/o3/bpred_unit.cc 946007Ssteve.reinhardt@amd.com cpu/o3/btb.cc 956007Ssteve.reinhardt@amd.com cpu/o3/commit.cc 966007Ssteve.reinhardt@amd.com cpu/o3/decode.cc 976007Ssteve.reinhardt@amd.com cpu/o3/fetch.cc 986007Ssteve.reinhardt@amd.com cpu/o3/free_list.cc 996007Ssteve.reinhardt@amd.com cpu/o3/cpu.cc 1006007Ssteve.reinhardt@amd.com cpu/o3/iew.cc 1016007Ssteve.reinhardt@amd.com cpu/o3/inst_queue.cc 1026007Ssteve.reinhardt@amd.com cpu/o3/ldstq.cc 1036007Ssteve.reinhardt@amd.com cpu/o3/mem_dep_unit.cc 1046007Ssteve.reinhardt@amd.com cpu/o3/ras.cc 1056007Ssteve.reinhardt@amd.com cpu/o3/rename.cc 1066007Ssteve.reinhardt@amd.com cpu/o3/rename_map.cc 1076007Ssteve.reinhardt@amd.com cpu/o3/rob.cc 1089781Sandreas.hansson@arm.com cpu/o3/sat_counter.cc 1099781Sandreas.hansson@arm.com cpu/o3/store_set.cc 1109781Sandreas.hansson@arm.com cpu/o3/tournament_pred.cc 1119781Sandreas.hansson@arm.com cpu/fast/cpu.cc 1127735SAli.Saidi@ARM.com cpu/sampler/sampler.cc 1136011Ssteve.reinhardt@amd.com cpu/simple/cpu.cc 1146007Ssteve.reinhardt@amd.com cpu/trace/reader/mem_trace_reader.cc 1159781Sandreas.hansson@arm.com cpu/trace/reader/ibm_reader.cc 1166007Ssteve.reinhardt@amd.com cpu/trace/reader/itx_reader.cc 1176007Ssteve.reinhardt@amd.com cpu/trace/reader/m5_reader.cc 1187735SAli.Saidi@ARM.com cpu/trace/opt_cpu.cc 1197735SAli.Saidi@ARM.com cpu/trace/trace_cpu.cc 1207735SAli.Saidi@ARM.com 1217735SAli.Saidi@ARM.com encumbered/cpu/full/bpred.cc 1227735SAli.Saidi@ARM.com encumbered/cpu/full/commit.cc 1237735SAli.Saidi@ARM.com encumbered/cpu/full/cpu.cc 1247735SAli.Saidi@ARM.com encumbered/cpu/full/create_vector.cc 1257735SAli.Saidi@ARM.com encumbered/cpu/full/cv_spec_state.cc 1267735SAli.Saidi@ARM.com encumbered/cpu/full/dd_queue.cc 1277735SAli.Saidi@ARM.com encumbered/cpu/full/dep_link.cc 1287735SAli.Saidi@ARM.com encumbered/cpu/full/dispatch.cc 1297735SAli.Saidi@ARM.com encumbered/cpu/full/dyn_inst.cc 1307735SAli.Saidi@ARM.com encumbered/cpu/full/execute.cc 1317735SAli.Saidi@ARM.com encumbered/cpu/full/fetch.cc 1326007Ssteve.reinhardt@amd.com encumbered/cpu/full/floss_reasons.cc 1338599Ssteve.reinhardt@amd.com encumbered/cpu/full/fu_pool.cc 1348599Ssteve.reinhardt@amd.com encumbered/cpu/full/inst_fifo.cc 1358599Ssteve.reinhardt@amd.com encumbered/cpu/full/instpipe.cc 1366007Ssteve.reinhardt@amd.com encumbered/cpu/full/issue.cc 1376011Ssteve.reinhardt@amd.com encumbered/cpu/full/ls_queue.cc 1386007Ssteve.reinhardt@amd.com encumbered/cpu/full/machine_queue.cc 1396007Ssteve.reinhardt@amd.com encumbered/cpu/full/pipetrace.cc 1406007Ssteve.reinhardt@amd.com encumbered/cpu/full/readyq.cc 1416007Ssteve.reinhardt@amd.com encumbered/cpu/full/reg_info.cc 1426007Ssteve.reinhardt@amd.com encumbered/cpu/full/rob_station.cc 1436007Ssteve.reinhardt@amd.com encumbered/cpu/full/spec_memory.cc 1449781Sandreas.hansson@arm.com encumbered/cpu/full/spec_state.cc 1459781Sandreas.hansson@arm.com encumbered/cpu/full/storebuffer.cc 1469781Sandreas.hansson@arm.com encumbered/cpu/full/writeback.cc 1479781Sandreas.hansson@arm.com encumbered/cpu/full/iq/iq_station.cc 1486007Ssteve.reinhardt@amd.com encumbered/cpu/full/iq/iqueue.cc 1496007Ssteve.reinhardt@amd.com encumbered/cpu/full/iq/segmented/chain_info.cc 1506007Ssteve.reinhardt@amd.com encumbered/cpu/full/iq/segmented/chain_wire.cc 1519781Sandreas.hansson@arm.com encumbered/cpu/full/iq/segmented/iq_seg.cc 1529781Sandreas.hansson@arm.com encumbered/cpu/full/iq/segmented/iq_segmented.cc 1539781Sandreas.hansson@arm.com encumbered/cpu/full/iq/segmented/seg_chain.cc 1549781Sandreas.hansson@arm.com encumbered/cpu/full/iq/seznec/iq_seznec.cc 1556008Ssteve.reinhardt@amd.com encumbered/cpu/full/iq/standard/iq_standard.cc 1569781Sandreas.hansson@arm.com encumbered/mem/functional/main.cc 1576008Ssteve.reinhardt@amd.com 1586008Ssteve.reinhardt@amd.com mem/base_hier.cc 1596008Ssteve.reinhardt@amd.com mem/base_mem.cc 1606008Ssteve.reinhardt@amd.com mem/hier_params.cc 1616008Ssteve.reinhardt@amd.com mem/mem_cmd.cc 1629401SAndreas.Sandberg@ARM.com mem/mem_debug.cc 1639781Sandreas.hansson@arm.com mem/mem_req.cc 1649781Sandreas.hansson@arm.com mem/memory_interface.cc 1656008Ssteve.reinhardt@amd.com mem/bus/base_interface.cc 1669781Sandreas.hansson@arm.com mem/bus/bus.cc 1676007Ssteve.reinhardt@amd.com mem/bus/bus_bridge.cc 1686007Ssteve.reinhardt@amd.com mem/bus/bus_bridge_master.cc 1696007Ssteve.reinhardt@amd.com mem/bus/bus_bridge_slave.cc 1706007Ssteve.reinhardt@amd.com mem/bus/bus_interface.cc 1719781Sandreas.hansson@arm.com mem/bus/dma_bus_interface.cc 1726007Ssteve.reinhardt@amd.com mem/bus/dma_interface.cc 1736007Ssteve.reinhardt@amd.com mem/bus/master_interface.cc 1742929Sktlim@umich.edu mem/bus/slave_interface.cc 1752929Sktlim@umich.edu mem/cache/base_cache.cc 1762929Sktlim@umich.edu mem/cache/cache.cc 1772929Sktlim@umich.edu mem/cache/cache_builder.cc 1786007Ssteve.reinhardt@amd.com mem/cache/coherence/coherence_protocol.cc 1796007Ssteve.reinhardt@amd.com mem/cache/coherence/uni_coherence.cc 1802929Sktlim@umich.edu mem/cache/miss/blocking_buffer.cc 1812929Sktlim@umich.edu mem/cache/miss/miss_queue.cc 1826007Ssteve.reinhardt@amd.com mem/cache/miss/mshr.cc 1832929Sktlim@umich.edu mem/cache/miss/mshr_queue.cc 1842929Sktlim@umich.edu mem/cache/prefetch/base_prefetcher.cc 1858947Sandreas.hansson@arm.com mem/cache/prefetch/prefetcher.cc 1868947Sandreas.hansson@arm.com mem/cache/prefetch/tagged_prefetcher.cc 1878947Sandreas.hansson@arm.com mem/cache/tags/base_tags.cc 1888947Sandreas.hansson@arm.com mem/cache/tags/cache_tags.cc 1898947Sandreas.hansson@arm.com mem/cache/tags/fa_lru.cc 1908947Sandreas.hansson@arm.com mem/cache/tags/iic.cc 1918947Sandreas.hansson@arm.com mem/cache/tags/lru.cc 1928947Sandreas.hansson@arm.com mem/cache/tags/repl/gen.cc 1938947Sandreas.hansson@arm.com mem/cache/tags/repl/repl.cc 1948947Sandreas.hansson@arm.com mem/cache/tags/split.cc 1958947Sandreas.hansson@arm.com mem/cache/tags/split_lru.cc 1968947Sandreas.hansson@arm.com mem/cache/tags/split_lifo.cc 1979781Sandreas.hansson@arm.com mem/functional/functional.cc 1989781Sandreas.hansson@arm.com mem/timing/base_memory.cc 1998947Sandreas.hansson@arm.com mem/timing/memory_builder.cc 2008947Sandreas.hansson@arm.com mem/timing/simple_mem_bank.cc 2019401SAndreas.Sandberg@ARM.com mem/trace/itx_writer.cc 2029781Sandreas.hansson@arm.com mem/trace/mem_trace_writer.cc 2038947Sandreas.hansson@arm.com mem/trace/m5_writer.cc 2048947Sandreas.hansson@arm.com 2058947Sandreas.hansson@arm.com python/pyconfig.cc 2068947Sandreas.hansson@arm.com python/embedded_py.cc 2078947Sandreas.hansson@arm.com 2088947Sandreas.hansson@arm.com sim/builder.cc 2092929Sktlim@umich.edu sim/configfile.cc 2102929Sktlim@umich.edu sim/debug.cc 2112929Sktlim@umich.edu sim/eventq.cc 2122929Sktlim@umich.edu sim/main.cc 2134937Sstever@gmail.com sim/param.cc 2144937Sstever@gmail.com sim/profile.cc 2154937Sstever@gmail.com sim/root.cc 2164937Sstever@gmail.com sim/serialize.cc 2178120Sgblack@eecs.umich.edu sim/sim_events.cc 2184937Sstever@gmail.com sim/sim_exit.cc 2194937Sstever@gmail.com sim/sim_object.cc 2204937Sstever@gmail.com sim/startup.cc 2214937Sstever@gmail.com sim/stat_context.cc 2225773Snate@binkert.org sim/stat_control.cc 2234937Sstever@gmail.com sim/trace_context.cc 2244937Sstever@gmail.com ''') 2254937Sstever@gmail.com# These are now included by the architecture specific SConscript 2262929Sktlim@umich.edu# arch/alpha/decoder.cc 2272929Sktlim@umich.edu# arch/alpha/alpha_o3_exec.cc 2282929Sktlim@umich.edu# arch/alpha/fast_cpu_exec.cc 2295773Snate@binkert.org# arch/alpha/simple_cpu_exec.cc 2302929Sktlim@umich.edu# arch/alpha/full_cpu_exec.cc 2312929Sktlim@umich.edu# arch/alpha/faults.cc 2322929Sktlim@umich.edu# arch/alpha/isa_traits.cc 2332929Sktlim@umich.edu 2342929Sktlim@umich.edu# MySql sources 2352929Sktlim@umich.edumysql_sources = Split(''' 2364937Sstever@gmail.com base/mysql.cc 2374937Sstever@gmail.com base/stats/mysql.cc 2384937Sstever@gmail.com ''') 2394937Sstever@gmail.com 2404937Sstever@gmail.com# Full-system sources 2414937Sstever@gmail.comfull_system_sources = Split(''' 2424937Sstever@gmail.com base/crc.cc 2434937Sstever@gmail.com base/inet.cc 2444937Sstever@gmail.com base/remote_gdb.cc 2454937Sstever@gmail.com 2464937Sstever@gmail.com cpu/intr_control.cc 2474937Sstever@gmail.com cpu/profile.cc 2484937Sstever@gmail.com 2494937Sstever@gmail.com dev/alpha_console.cc 2504937Sstever@gmail.com dev/baddev.cc 2512929Sktlim@umich.edu dev/simconsole.cc 2522929Sktlim@umich.edu dev/disk_image.cc 2532929Sktlim@umich.edu dev/etherbus.cc 2542929Sktlim@umich.edu dev/etherdump.cc 2552929Sktlim@umich.edu dev/etherint.cc 2562929Sktlim@umich.edu dev/etherlink.cc 2572929Sktlim@umich.edu dev/etherpkt.cc 2586011Ssteve.reinhardt@amd.com dev/ethertap.cc 2592929Sktlim@umich.edu dev/ide_ctrl.cc 2602929Sktlim@umich.edu dev/ide_disk.cc 2612929Sktlim@umich.edu dev/io_device.cc 2622929Sktlim@umich.edu dev/ns_gige.cc 2632929Sktlim@umich.edu dev/pciconfigall.cc 2642929Sktlim@umich.edu dev/pcidev.cc 2652929Sktlim@umich.edu dev/pcifake.cc 2662929Sktlim@umich.edu dev/pktfifo.cc 2672997Sstever@eecs.umich.edu dev/platform.cc 2682997Sstever@eecs.umich.edu dev/sinic.cc 2692929Sktlim@umich.edu dev/simple_disk.cc 27010196SCurtis.Dunham@arm.com dev/tsunami.cc 2712929Sktlim@umich.edu dev/tsunami_cchip.cc 27210196SCurtis.Dunham@arm.com dev/isa_fake.cc 27310196SCurtis.Dunham@arm.com dev/tsunami_io.cc 27410196SCurtis.Dunham@arm.com dev/tsunami_pchip.cc 27510196SCurtis.Dunham@arm.com dev/uart.cc 2762929Sktlim@umich.edu dev/uart8250.cc 27710196SCurtis.Dunham@arm.com 2782997Sstever@eecs.umich.edu kern/kernel_binning.cc 2792997Sstever@eecs.umich.edu kern/kernel_stats.cc 2802997Sstever@eecs.umich.edu kern/system_events.cc 2815773Snate@binkert.org kern/freebsd/freebsd_system.cc 2825773Snate@binkert.org kern/linux/linux_syscalls.cc 2832997Sstever@eecs.umich.edu kern/linux/linux_system.cc 2842997Sstever@eecs.umich.edu kern/linux/printk.cc 2859922Ssteve.reinhardt@amd.com kern/tru64/dump_mbuf.cc 2866007Ssteve.reinhardt@amd.com kern/tru64/printf.cc 2872997Sstever@eecs.umich.edu kern/tru64/tru64_events.cc 2882929Sktlim@umich.edu kern/tru64/tru64_syscalls.cc 2892997Sstever@eecs.umich.edu kern/tru64/tru64_system.cc 2908120Sgblack@eecs.umich.edu 2912997Sstever@eecs.umich.edu mem/functional/memory_control.cc 2922997Sstever@eecs.umich.edu mem/functional/physical.cc 2932997Sstever@eecs.umich.edu 2942997Sstever@eecs.umich.edu sim/system.cc 2952997Sstever@eecs.umich.edu ''') 2962929Sktlim@umich.edu 2972997Sstever@eecs.umich.edu# These are now included by the architecture specific SConscript 2982929Sktlim@umich.edu# arch/alpha/alpha_memory.cc 2992929Sktlim@umich.edu# arch/alpha/arguments.cc 3003005Sstever@eecs.umich.edu# arch/alpha/ev5.cc 3013005Sstever@eecs.umich.edu# arch/alpha/osfpal.cc 3028802Sgblack@eecs.umich.edu# arch/alpha/pseudo_inst.cc 3038802Sgblack@eecs.umich.edu# arch/alpha/stacktrace.cc 3048802Sgblack@eecs.umich.edu# arch/alpha/vtophys.cc 3058802Sgblack@eecs.umich.edu 3068802Sgblack@eecs.umich.edu# turbolaser encumbered sources 3078802Sgblack@eecs.umich.eduturbolaser_sources = Split(''' 3088802Sgblack@eecs.umich.edu encumbered/dev/dma.cc 3099447SAndreas.Sandberg@ARM.com encumbered/dev/etherdev.cc 3109447SAndreas.Sandberg@ARM.com encumbered/dev/scsi.cc 3118802Sgblack@eecs.umich.edu encumbered/dev/scsi_ctrl.cc 3128802Sgblack@eecs.umich.edu encumbered/dev/scsi_disk.cc 3138802Sgblack@eecs.umich.edu encumbered/dev/scsi_none.cc 3148802Sgblack@eecs.umich.edu encumbered/dev/tlaser_clock.cc 3158889Sgeoffrey.blake@arm.com encumbered/dev/tlaser_ipi.cc 3168889Sgeoffrey.blake@arm.com encumbered/dev/tlaser_mbox.cc 3178889Sgeoffrey.blake@arm.com encumbered/dev/tlaser_mc146818.cc 3188802Sgblack@eecs.umich.edu encumbered/dev/tlaser_node.cc 3198802Sgblack@eecs.umich.edu encumbered/dev/tlaser_pcia.cc 3208802Sgblack@eecs.umich.edu encumbered/dev/tlaser_pcidev.cc 3218802Sgblack@eecs.umich.edu encumbered/dev/tlaser_serial.cc 3228889Sgeoffrey.blake@arm.com encumbered/dev/turbolaser.cc 3239447SAndreas.Sandberg@ARM.com encumbered/dev/uart8530.cc 3249447SAndreas.Sandberg@ARM.com ''') 3259447SAndreas.Sandberg@ARM.com 3269447SAndreas.Sandberg@ARM.com# Syscall emulation (non-full-system) sources 3279447SAndreas.Sandberg@ARM.comsyscall_emulation_sources = Split(''' 3288802Sgblack@eecs.umich.edu cpu/memtest/memtest.cc 3298802Sgblack@eecs.umich.edu encumbered/eio/eio.cc 3308802Sgblack@eecs.umich.edu encumbered/eio/exolex.cc 3319674Snilay@cs.wisc.edu encumbered/eio/libexo.cc 3329674Snilay@cs.wisc.edu sim/process.cc 3333691Shsul@eecs.umich.edu sim/syscall_emul.cc 3348802Sgblack@eecs.umich.edu ''') 3358802Sgblack@eecs.umich.edu 3369244Sandreas.hansson@arm.com# These are now included by the architecture specific SConscript 3379244Sandreas.hansson@arm.com# arch/alpha/alpha_common_syscall_emul.cc 3383005Sstever@eecs.umich.edu# arch/alpha/alpha_linux_process.cc 3398492Snilay@cs.wisc.edu# arch/alpha/alpha_tru64_process.cc 3406928SBrad.Beckmann@amd.com 3416928SBrad.Beckmann@amd.comtargetarch_files = Split(''' 3426928SBrad.Beckmann@amd.com alpha_linux_process.hh 3436928SBrad.Beckmann@amd.com alpha_memory.hh 3446166Ssteve.reinhardt@amd.com alpha_tru64_process.hh 34510196SCurtis.Dunham@arm.com aout_machdep.h 3463005Sstever@eecs.umich.edu arguments.hh 34710196SCurtis.Dunham@arm.com ecoff_machdep.h 3482997Sstever@eecs.umich.edu ev5.hh 34910196SCurtis.Dunham@arm.com faults.hh 3506293Ssteve.reinhardt@amd.com isa_fullsys_traits.hh 3516293Ssteve.reinhardt@amd.com isa_traits.hh 352 pseudo_inst.hh 353 stacktrace.hh 354 vptr.hh 355 vtophys.hh 356 ''') 357# osfpal.hh 358# byte_swap.hh 359# alpha_common_syscall_emul.hh 360 361# Set up bridging headers to the architecture specific versions 362for f in targetarch_files: 363 env.Command('targetarch/' + f, 'arch/%s/%s' % (env['TARGET_ISA'], f), 364 '''echo '#include "arch/%s/%s"' > $TARGET''' % (env['TARGET_ISA'], f)) 365 366# Let the target architecture define what sources it needs 367arch_source = SConscript('arch/%s/SConscript' % env['TARGET_ISA'], 368 build_dir = 'build/%s/' % env['BUILD_DIR'], 369 exports = 'env', duplicate = False) 370 371# Add a flag defining what THE_ISA should be for all compilation 372env.Append(CPPDEFINES=[('THE_ISA','%s_ISA' % env['TARGET_ISA'].upper())]) 373 374# Set up complete list of sources based on configuration. 375sources = base_sources + arch_source 376 377if env['FULL_SYSTEM']: 378 sources += full_system_sources 379 if env['ALPHA_TLASER']: 380 sources += turbolaser_sources 381else: 382 sources += syscall_emulation_sources 383 384if env['USE_MYSQL']: 385 sources += mysql_sources 386 387for opt in env.ExportOptions: 388 env.ConfigFile(opt) 389 390################################################### 391# 392# Add an SCons scanner for ISA files 393# 394################################################### 395import SCons.Scanner 396 397def ISAScan(): 398 return SCons.Scanner.Classic("ISAScan", 399 "$ISASUFFIXES", 400 "SRCDIR", 401 '^[ \t]*##[ \t]*include[ \t]*"([^>"]+)"') 402 403def ISAPath(env, dir, a=None): 404 return (Dir(env['SRCDIR']), Dir('.')) 405 406iscan = Scanner(function = ISAScan().scan, skeys = [".isa", ".ISA"], 407 path_function = ISAPath) 408env.Append(SCANNERS = iscan) 409 410 411################################################### 412# 413# Special build rules. 414# 415################################################### 416 417# base/traceflags.{cc,hh} are generated from base/traceflags.py. 418# $TARGET.base will expand to "<build-dir>/base/traceflags". 419env.Command(Split('base/traceflags.hh base/traceflags.cc'), 420 'base/traceflags.py', 421 'python $SOURCE $TARGET.base') 422 423# several files are generated from arch/$TARGET_ISA/isa_desc. 424env.Command(Split(''' 425 arch/%s/decoder.cc 426 arch/%s/decoder.hh 427 arch/%s/alpha_o3_exec.cc 428 arch/%s/fast_cpu_exec.cc 429 arch/%s/simple_cpu_exec.cc 430 arch/%s/full_cpu_exec.cc''' % 431 (env['TARGET_ISA'], 432 env['TARGET_ISA'], 433 env['TARGET_ISA'], 434 env['TARGET_ISA'], 435 env['TARGET_ISA'], 436 env['TARGET_ISA'])), 437 Split(''' 438 arch/%s/isa/main.isa 439 arch/isa_parser.py''' % 440 env['TARGET_ISA']), 441 '$SRCDIR/arch/isa_parser.py $SOURCE $TARGET.dir arch/%s' % env['TARGET_ISA']) 442 443 444# libelf build is described in its own SConscript file. 445# SConscript-local is the per-config build, which just copies some 446# header files into a place where they can be found. 447SConscript('libelf/SConscript-local', exports = 'env', duplicate=0) 448SConscript('python/SConscript', exports = ['env'], duplicate=0) 449 450# This function adds the specified sources to the given build 451# environment, and returns a list of all the corresponding SCons 452# Object nodes (including an extra one for date.cc). We explicitly 453# add the Object nodes so we can set up special dependencies for 454# date.cc. 455def make_objs(sources, env): 456 objs = [env.Object(s) for s in sources] 457 # make date.cc depend on all other objects so it always gets 458 # recompiled whenever anything else does 459 date_obj = env.Object('base/date.cc') 460 env.Depends(date_obj, objs) 461 objs.append(date_obj) 462 return objs 463 464################################################### 465# 466# Define binaries. Each different build type (debug, opt, etc.) gets 467# a slightly different build environment. 468# 469################################################### 470 471# Include file paths are rooted in this directory. SCons will 472# automatically expand '.' to refer to both the source directory and 473# the corresponding build directory to pick up generated include 474# files. 475env.Append(CPPPATH='.') 476 477# Debug binary 478debugEnv = env.Copy(OBJSUFFIX='.do') 479debugEnv.Label = 'debug' 480debugEnv.Append(CCFLAGS=Split('-g -gstabs+ -O0')) 481debugEnv.Append(CPPDEFINES='DEBUG') 482tlist = debugEnv.Program(target = 'm5.debug', 483 source = make_objs(sources, debugEnv)) 484debugEnv.M5Binary = tlist[0] 485 486# Optimized binary 487optEnv = env.Copy() 488optEnv.Label = 'opt' 489optEnv.Append(CCFLAGS=Split('-g -O5')) 490tlist = optEnv.Program(target = 'm5.opt', 491 source = make_objs(sources, optEnv)) 492optEnv.M5Binary = tlist[0] 493 494# "Fast" binary 495fastEnv = env.Copy(OBJSUFFIX='.fo') 496fastEnv.Label = 'fast' 497fastEnv.Append(CCFLAGS=Split('-O5')) 498fastEnv.Append(CPPDEFINES='NDEBUG') 499fastEnv.Program(target = 'm5.fast.unstripped', 500 source = make_objs(sources, fastEnv)) 501tlist = fastEnv.Command(target = 'm5.fast', 502 source = 'm5.fast.unstripped', 503 action = 'strip $SOURCE -o $TARGET') 504fastEnv.M5Binary = tlist[0] 505 506# Profiled binary 507profEnv = env.Copy(OBJSUFFIX='.po') 508profEnv.Label = 'prof' 509profEnv.Append(CCFLAGS=Split('-O5 -g -pg'), LINKFLAGS='-pg') 510tlist = profEnv.Program(target = 'm5.prof', 511 source = make_objs(sources, profEnv)) 512profEnv.M5Binary = tlist[0] 513 514envList = [debugEnv, optEnv, fastEnv, profEnv] 515 516Return('envList') 517