ExtSlave.cc revision 11618:37b0af2c7ba8 
1// Copyright (c) 2015 ARM Limited
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3//
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35
36// Copyright 2009-2014 Sandia Coporation.  Under the terms
37// of Contract DE-AC04-94AL85000 with Sandia Corporation, the U.S.
38// Government retains certain rights in this software.
39//
40// Copyright (c) 2009-2014, Sandia Corporation
41// All rights reserved.
42//
43// For license information, see the LICENSE file in the current directory.
44
45#include "gem5.hh"
46
47#ifdef fatal  // gem5 sets this
48#undef fatal
49#endif
50
51using namespace SST;
52using namespace SST::gem5;
53using namespace SST::MemHierarchy;
54
55ExtSlave::ExtSlave(gem5Component *g5c, Output &out,
56        ::ExternalSlave& port, std::string &name) :
57    Port(name, port),
58    comp(g5c), out(out), simPhase(CONSTRUCTION), initPackets(NULL),
59    link(comp->configureLink(name, new Event::Handler<ExtSlave>(this,
60                                              &ExtSlave::handleEvent)))
61{
62    if (!link) {
63        out.fatal(CALL_INFO, 1, "Failed to configure link %s\n", name.c_str());
64    }
65}
66
67void ExtSlave::init(unsigned phase)
68{
69    simPhase = INIT;
70    if (initPackets) {
71        while (!initPackets->empty()) {
72            link->sendInitData(initPackets->front());
73            initPackets->pop_front();
74        }
75        delete initPackets;
76        initPackets = NULL;
77    }
78}
79
80void
81ExtSlave::recvFunctional(PacketPtr pkt)
82{
83    if (simPhase == CONSTRUCTION) {
84        if (initPackets == NULL) {
85            initPackets = new std::list<MemEvent*>;
86        }
87        ::MemCmd::Command pktCmd = (::MemCmd::Command)pkt->cmd.toInt();
88        assert(pktCmd == ::MemCmd::WriteReq);
89        Addr a = pkt->getAddr();
90        MemEvent* ev = new MemEvent(comp, a, a, GetX);
91        ev->setPayload(pkt->getSize(), pkt->getPtr<uint8_t>());
92        initPackets->push_back(ev);
93    } else {
94        panic("Functional accesses not allowed after construction phase");
95    }
96}
97
98bool
99ExtSlave::recvTimingReq(PacketPtr pkt)
100{
101    Command cmd;
102    switch ((::MemCmd::Command)pkt->cmd.toInt()) {
103    case ::MemCmd::HardPFReq:
104    case ::MemCmd::SoftPFReq:
105    case ::MemCmd::LoadLockedReq:
106    case ::MemCmd::ReadExReq:
107    case ::MemCmd::ReadReq:       cmd = GetS;   break;
108    case ::MemCmd::StoreCondReq:
109    case ::MemCmd::WriteReq:      cmd = GetX;   break;
110    default:
111        out.fatal(CALL_INFO, 1, "Don't know how to convert gem5 packet "
112                  "command %s to SST\n", pkt->cmd.toString().c_str());
113    }
114
115    auto ev = new MemEvent(comp, pkt->getAddr(), pkt->getAddr(), cmd);
116    ev->setPayload(pkt->getSize(), pkt->getPtr<uint8_t>());
117    if ((::MemCmd::Command)pkt->cmd.toInt() == ::MemCmd::LoadLockedReq)
118        ev->setLoadLink();
119    else if ((::MemCmd::Command)pkt->cmd.toInt() == ::MemCmd::StoreCondReq)
120        ev->setStoreConditional();
121
122    if (pkt->req->isLockedRMW())   ev->setFlag(MemEvent::F_LOCKED);
123    if (pkt->req->isUncacheable()) ev->setFlag(MemEvent::F_NONCACHEABLE);
124    if (pkt->req->hasContextId())  ev->setGroupId(pkt->req->contextId());
125// Prefetches not working with SST; it maybe be dropping them, treating them
126// as not deserving of responses, or something else -- not sure yet.
127//  ev->setPrefetchFlag(pkt->req->isPrefetch());
128
129    if (simPhase == INIT) {
130        link->sendInitData(ev);
131        delete pkt->req;
132        delete pkt;
133    } else {
134        if (pkt->needsResponse()) {
135            PacketMap[ev->getID()] = pkt;
136        }
137        link->send(ev);
138    }
139    return true;
140}
141
142
143void
144ExtSlave::handleEvent(Event* ev)
145{
146    MemEvent* event = dynamic_cast<MemEvent*>(ev);
147    if (!event) {
148        out.fatal(CALL_INFO, 1, "ExtSlave handleEvent received non-MemEvent\n");
149        delete ev;
150        return;
151    }
152    Event::id_type id = event->getID();
153
154    PacketMap_t::iterator mi = PacketMap.find(id);
155    if (mi != PacketMap.end()) { // replying to prior request
156        PacketPtr pkt = mi->second;
157        PacketMap.erase(mi);
158
159        pkt->makeResponse();  // Convert to a response packet
160        pkt->setData(event->getPayload().data());
161
162        // Resolve the success of Store Conditionals
163        if (pkt->isLLSC() && pkt->isWrite()) {
164            pkt->req->setExtraData(event->isAtomic());
165        }
166
167        // Clear out bus delay notifications
168        pkt->headerDelay = pkt->payloadDelay = 0;
169
170        if (blocked() || !sendTimingResp(pkt)) {
171            respQ.push_back(pkt);
172        }
173    } else { // we can handle unexpected invalidates, but nothing else.
174        Command cmd = event->getCmd();
175        assert(cmd == Inv);
176
177        // make Req/Pkt for Snoop/no response needed
178        // presently no consideration for masterId, packet type, flags...
179        RequestPtr req = new Request(event->getAddr(), event->getSize(), 0, 0);
180        auto pkt = new Packet(req, ::MemCmd::InvalidateReq);
181
182        // Clear out bus delay notifications
183        pkt->headerDelay = pkt->payloadDelay = 0;
184
185        sendTimingSnoopReq(pkt);
186    }
187    delete event;
188}
189
190void
191ExtSlave::recvRespRetry()
192{
193    while (blocked() && sendTimingResp(respQ.front())) {
194        respQ.pop_front();
195    }
196}
197