interconnect.h revision 10152 
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31
32
33#ifndef __INTERCONNECT_H__
34#define __INTERCONNECT_H__
35
36#include "assert.h"
37#include "basic_circuit.h"
38#include "basic_components.h"
39#include "cacti_interface.h"
40#include "component.h"
41#include "parameter.h"
42#include "subarray.h"
43#include "wire.h"
44
45// leakge power includes entire htree in a bank (when uca_tree == false)
46// leakge power includes only part to one bank when uca_tree == true
47
48class interconnect : public Component
49{
50  public:
51    interconnect(
52        string  name_,
53        enum Device_ty device_ty_,
54        double base_w, double base_h, int data_w, double len,
55        const InputParameter *configure_interface, int start_wiring_level_,
56        bool pipelinable_ = false,
57        double route_over_perc_ =0.5,
58        bool opt_local_=true,
59        enum Core_type core_ty_=Inorder,
60        enum Wire_type wire_model=Global,
61        double width_s=1.0, double space_s=1.0,
62        TechnologyParameter::DeviceType *dt = &(g_tp.peri_global)
63                );
64
65    ~interconnect() {};
66
67    void compute();
68        string   name;
69        enum Device_ty device_ty;
70    double in_rise_time, out_rise_time;
71        InputParameter l_ip;
72        uca_org_t local_result;
73    Area no_device_under_wire_area;
74    void set_in_rise_time(double rt)
75    {
76      in_rise_time = rt;
77    }
78
79    void leakage_feedback(double temperature);
80    double max_unpipelined_link_delay;
81    powerDef power_bit;
82
83    double wire_bw;
84    double init_wire_bw;  // bus width at root
85    double base_width;
86    double base_height;
87    int data_width;
88    enum Wire_type wt;
89    double width_scaling, space_scaling;
90    int start_wiring_level;
91    double length;
92    double min_w_nmos;
93    double min_w_pmos;
94    double latency, throughput;
95    bool  latency_overflow;
96    bool  throughput_overflow;
97    double  interconnect_latency;
98    double  interconnect_throughput;
99    bool opt_local;
100    enum Core_type core_ty;
101    bool pipelinable;
102    double route_over_perc;
103    int  num_pipe_stages;
104
105  private:
106    TechnologyParameter::DeviceType *deviceType;
107
108};
109
110#endif
111
112