core.h revision 10152:52c552138ba1 
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31
32
33#ifndef CORE_H_
34#define CORE_H_
35
36#include "XML_Parse.h"
37#include "array.h"
38#include "basic_components.h"
39#include "interconnect.h"
40#include "logic.h"
41#include "parameter.h"
42#include "sharedcache.h"
43
44class BranchPredictor :public Component {
45  public:
46
47        ParseXML *XML;
48        int  ithCore;
49        InputParameter interface_ip;
50        CoreDynParam  coredynp;
51        double clockRate,executionTime;
52        double scktRatio, chip_PR_overhead, macro_PR_overhead;
53        ArrayST * globalBPT;
54        ArrayST * localBPT;
55        ArrayST * L1_localBPT;
56        ArrayST * L2_localBPT;
57        ArrayST * chooser;
58        ArrayST * RAS;
59        bool exist;
60
61        BranchPredictor(ParseXML *XML_interface, int ithCore_, InputParameter* interface_ip_,const CoreDynParam & dyn_p_, bool exsit=true);
62    void computeEnergy(bool is_tdp=true);
63    void displayEnergy(uint32_t indent = 0,int plevel = 100, bool is_tdp=true);
64        ~BranchPredictor();
65};
66
67
68class InstFetchU :public Component {
69  public:
70
71        ParseXML *XML;
72        int  ithCore;
73        InputParameter interface_ip;
74        CoreDynParam  coredynp;
75        double clockRate,executionTime;
76        double scktRatio, chip_PR_overhead, macro_PR_overhead;
77        enum Cache_policy cache_p;
78        InstCache icache;
79        ArrayST * IB;
80        ArrayST * BTB;
81        BranchPredictor * BPT;
82        inst_decoder * ID_inst;
83        inst_decoder * ID_operand;
84        inst_decoder * ID_misc;
85        bool exist;
86
87        InstFetchU(ParseXML *XML_interface, int ithCore_, InputParameter* interface_ip_,const CoreDynParam & dyn_p_, bool exsit=true);
88    void computeEnergy(bool is_tdp=true);
89    void displayEnergy(uint32_t indent = 0,int plevel = 100, bool is_tdp=true);
90        ~InstFetchU();
91};
92
93
94class SchedulerU :public Component {
95  public:
96
97        ParseXML *XML;
98        int  ithCore;
99        InputParameter interface_ip;
100        CoreDynParam  coredynp;
101        double clockRate,executionTime;
102        double scktRatio, chip_PR_overhead, macro_PR_overhead;
103        double Iw_height, fp_Iw_height,ROB_height;
104        ArrayST         * int_inst_window;
105        ArrayST         * fp_inst_window;
106        ArrayST         * ROB;
107    selection_logic * instruction_selection;
108    bool exist;
109
110    SchedulerU(ParseXML *XML_interface, int ithCore_, InputParameter* interface_ip_,const CoreDynParam & dyn_p_, bool exist_=true);
111    void computeEnergy(bool is_tdp=true);
112    void displayEnergy(uint32_t indent = 0,int plevel = 100, bool is_tdp=true);
113        ~SchedulerU();
114};
115
116class RENAMINGU :public Component {
117  public:
118
119        ParseXML *XML;
120        int  ithCore;
121        InputParameter interface_ip;
122        double clockRate,executionTime;
123        CoreDynParam  coredynp;
124        ArrayST * iFRAT;
125        ArrayST * fFRAT;
126        ArrayST * iRRAT;
127        ArrayST * fRRAT;
128        ArrayST * ifreeL;
129        ArrayST * ffreeL;
130        dep_resource_conflict_check * idcl;
131        dep_resource_conflict_check * fdcl;
132        ArrayST * RAHT;//register alias history table Used to store GC
133        bool exist;
134
135
136        RENAMINGU(ParseXML *XML_interface, int ithCore_, InputParameter* interface_ip_, const CoreDynParam & dyn_p_, bool exist_=true);
137    void computeEnergy(bool is_tdp=true);
138    void displayEnergy(uint32_t indent = 0,int plevel = 100, bool is_tdp=true);
139        ~RENAMINGU();
140};
141
142class LoadStoreU :public Component {
143  public:
144
145        ParseXML *XML;
146        int  ithCore;
147        InputParameter interface_ip;
148        CoreDynParam  coredynp;
149        enum Cache_policy cache_p;
150        double clockRate,executionTime;
151        double scktRatio, chip_PR_overhead, macro_PR_overhead;
152        double lsq_height;
153        DataCache dcache;
154        ArrayST * LSQ;//it is actually the store queue but for inorder processors it serves as both loadQ and StoreQ
155        ArrayST * LoadQ;
156        bool exist;
157
158        LoadStoreU(ParseXML *XML_interface, int ithCore_, InputParameter* interface_ip_,const CoreDynParam & dyn_p_, bool exist_=true);
159    void computeEnergy(bool is_tdp=true);
160    void displayEnergy(uint32_t indent = 0,int plevel = 100, bool is_tdp=true);
161        ~LoadStoreU();
162};
163
164class MemManU :public Component {
165  public:
166
167        ParseXML *XML;
168        int  ithCore;
169        InputParameter interface_ip;
170        CoreDynParam  coredynp;
171        double clockRate,executionTime;
172        double scktRatio, chip_PR_overhead, macro_PR_overhead;
173        ArrayST * itlb;
174        ArrayST * dtlb;
175        bool exist;
176
177        MemManU(ParseXML *XML_interface, int ithCore_, InputParameter* interface_ip_,const CoreDynParam & dyn_p_, bool exist_=true);
178    void computeEnergy(bool is_tdp=true);
179    void displayEnergy(uint32_t indent = 0,int plevel = 100, bool is_tdp=true);
180        ~MemManU();
181};
182
183class RegFU :public Component {
184  public:
185
186        ParseXML *XML;
187        int  ithCore;
188        InputParameter interface_ip;
189        CoreDynParam  coredynp;
190        double clockRate,executionTime;
191        double scktRatio, chip_PR_overhead, macro_PR_overhead;
192        double int_regfile_height, fp_regfile_height;
193        ArrayST * IRF;
194        ArrayST * FRF;
195        ArrayST * RFWIN;
196        bool exist;
197
198        RegFU(ParseXML *XML_interface, int ithCore_, InputParameter* interface_ip_,const CoreDynParam & dyn_p_, bool exist_=true);
199    void computeEnergy(bool is_tdp=true);
200    void displayEnergy(uint32_t indent = 0,int plevel = 100, bool is_tdp=true);
201        ~RegFU();
202};
203
204class EXECU :public Component {
205  public:
206
207        ParseXML *XML;
208        int  ithCore;
209        InputParameter interface_ip;
210        double clockRate,executionTime;
211        double scktRatio, chip_PR_overhead, macro_PR_overhead;
212        double lsq_height;
213        CoreDynParam  coredynp;
214        RegFU          * rfu;
215        SchedulerU     * scheu;
216    FunctionalUnit * fp_u;
217    FunctionalUnit * exeu;
218    FunctionalUnit * mul;
219        interconnect * int_bypass;
220        interconnect * intTagBypass;
221        interconnect * int_mul_bypass;
222        interconnect * intTag_mul_Bypass;
223        interconnect * fp_bypass;
224        interconnect * fpTagBypass;
225
226        Component  bypass;
227        bool exist;
228
229        EXECU(ParseXML *XML_interface, int ithCore_, InputParameter* interface_ip_, double lsq_height_,const CoreDynParam & dyn_p_, bool exist_=true);
230    void computeEnergy(bool is_tdp=true);
231        void displayEnergy(uint32_t indent = 0,int plevel = 100, bool is_tdp=true);
232        ~EXECU();
233};
234
235
236class Core :public Component {
237  public:
238
239        ParseXML *XML;
240        int  ithCore;
241        InputParameter interface_ip;
242        double clockRate,executionTime;
243        double scktRatio, chip_PR_overhead, macro_PR_overhead;
244        InstFetchU * ifu;
245        LoadStoreU * lsu;
246        MemManU    * mmu;
247        EXECU      * exu;
248        RENAMINGU  * rnu;
249    Pipeline   * corepipe;
250    UndiffCore * undiffCore;
251    SharedCache * l2cache;
252    CoreDynParam  coredynp;
253    //full_decoder 	inst_decoder;
254    //clock_network	clockNetwork;
255        Core(ParseXML *XML_interface, int ithCore_, InputParameter* interface_ip_);
256        void set_core_param();
257        void computeEnergy(bool is_tdp=true);
258        void displayEnergy(uint32_t indent = 0,int plevel = 100, bool is_tdp=true);
259        ~Core();
260};
261
262#endif /* CORE_H_ */
263