router.cc revision 10234
110152Satgutier@umich.edu/***************************************************************************** 210152Satgutier@umich.edu * McPAT/CACTI 310152Satgutier@umich.edu * SOFTWARE LICENSE AGREEMENT 410152Satgutier@umich.edu * Copyright 2012 Hewlett-Packard Development Company, L.P. 510234Syasuko.eckert@amd.com * Copyright (c) 2010-2013 Advanced Micro Devices, Inc. 610152Satgutier@umich.edu * All Rights Reserved 710152Satgutier@umich.edu * 810152Satgutier@umich.edu * Redistribution and use in source and binary forms, with or without 910152Satgutier@umich.edu * modification, are permitted provided that the following conditions are 1010152Satgutier@umich.edu * met: redistributions of source code must retain the above copyright 1110152Satgutier@umich.edu * notice, this list of conditions and the following disclaimer; 1210152Satgutier@umich.edu * redistributions in binary form must reproduce the above copyright 1310152Satgutier@umich.edu * notice, this list of conditions and the following disclaimer in the 1410152Satgutier@umich.edu * documentation and/or other materials provided with the distribution; 1510152Satgutier@umich.edu * neither the name of the copyright holders nor the names of its 1610152Satgutier@umich.edu * contributors may be used to endorse or promote products derived from 1710152Satgutier@umich.edu * this software without specific prior written permission. 1810152Satgutier@umich.edu 1910152Satgutier@umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 2010152Satgutier@umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 2110152Satgutier@umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 2210152Satgutier@umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2310152Satgutier@umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2410152Satgutier@umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 2510152Satgutier@umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2610152Satgutier@umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2710152Satgutier@umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2810152Satgutier@umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 2910234Syasuko.eckert@amd.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 3010152Satgutier@umich.edu * 3110152Satgutier@umich.edu ***************************************************************************/ 3210152Satgutier@umich.edu 3310152Satgutier@umich.edu 3410152Satgutier@umich.edu 3510152Satgutier@umich.edu#include "router.h" 3610152Satgutier@umich.edu 3710152Satgutier@umich.eduRouter::Router( 3810152Satgutier@umich.edu double flit_size_, 3910152Satgutier@umich.edu double vc_buf, /* vc size = vc_buffer_size * flit_size */ 4010152Satgutier@umich.edu double vc_c, 4110152Satgutier@umich.edu TechnologyParameter::DeviceType *dt, 4210152Satgutier@umich.edu double I_, 4310152Satgutier@umich.edu double O_, 4410152Satgutier@umich.edu double M_ 4510234Syasuko.eckert@amd.com ): flit_size(flit_size_), 4610234Syasuko.eckert@amd.com deviceType(dt), 4710234Syasuko.eckert@amd.com I(I_), 4810234Syasuko.eckert@amd.com O(O_), 4910234Syasuko.eckert@amd.com M(M_) { 5010234Syasuko.eckert@amd.com vc_buffer_size = vc_buf; 5110234Syasuko.eckert@amd.com vc_count = vc_c; 5210234Syasuko.eckert@amd.com min_w_pmos = deviceType->n_to_p_eff_curr_drv_ratio * g_tp.min_w_nmos_; 5310234Syasuko.eckert@amd.com double technology = g_ip->F_sz_um; 5410152Satgutier@umich.edu 5510234Syasuko.eckert@amd.com Vdd = dt->Vdd; 5610152Satgutier@umich.edu 5710234Syasuko.eckert@amd.com /*Crossbar parameters. Transmisson gate is employed for connector*/ 5810234Syasuko.eckert@amd.com NTtr = 10 * technology * 1e-6 / 2; /*Transmission gate's nmos tr. length*/ 5910234Syasuko.eckert@amd.com PTtr = 20 * technology * 1e-6 / 2; /* pmos tr. length*/ 6010234Syasuko.eckert@amd.com wt = 15 * technology * 1e-6 / 2; /*track width*/ 6110234Syasuko.eckert@amd.com ht = 15 * technology * 1e-6 / 2; /*track height*/ 6210152Satgutier@umich.edu// I = 5; /*Number of crossbar input ports*/ 6310152Satgutier@umich.edu// O = 5; /*Number of crossbar output ports*/ 6410234Syasuko.eckert@amd.com NTi = 12.5 * technology * 1e-6 / 2; 6510234Syasuko.eckert@amd.com PTi = 25 * technology * 1e-6 / 2; 6610152Satgutier@umich.edu 6710234Syasuko.eckert@amd.com NTid = 60 * technology * 1e-6 / 2; //m 6810234Syasuko.eckert@amd.com PTid = 120 * technology * 1e-6 / 2; // m 6910234Syasuko.eckert@amd.com NTod = 60 * technology * 1e-6 / 2; // m 7010234Syasuko.eckert@amd.com PTod = 120 * technology * 1e-6 / 2; // m 7110152Satgutier@umich.edu 7210234Syasuko.eckert@amd.com calc_router_parameters(); 7310152Satgutier@umich.edu} 7410152Satgutier@umich.edu 7510234Syasuko.eckert@amd.comRouter::~Router() {} 7610152Satgutier@umich.edu 7710152Satgutier@umich.edu 7810152Satgutier@umich.edudouble //wire cap with triple spacing 7910152Satgutier@umich.eduRouter::Cw3(double length) { 8010234Syasuko.eckert@amd.com Wire wc(g_ip->wt, length, 1, 3, 3); 8110234Syasuko.eckert@amd.com return (wc.wire_cap(length)); 8210152Satgutier@umich.edu} 8310152Satgutier@umich.edu 8410152Satgutier@umich.edu/*Function to calculate the gate capacitance*/ 8510152Satgutier@umich.edudouble 8610152Satgutier@umich.eduRouter::gate_cap(double w) { 8710234Syasuko.eckert@amd.com return (double) gate_C (w*1e6 /*u*/, 0); 8810152Satgutier@umich.edu} 8910152Satgutier@umich.edu 9010152Satgutier@umich.edu/*Function to calculate the diffusion capacitance*/ 9110152Satgutier@umich.edudouble 9210152Satgutier@umich.eduRouter::diff_cap(double w, int type /*0 for n-mos and 1 for p-mos*/, 9310234Syasuko.eckert@amd.com double s /*number of stacking transistors*/) { 9410234Syasuko.eckert@amd.com return (double) drain_C_(w*1e6 /*u*/, type, (int) s, 1, g_tp.cell_h_def); 9510152Satgutier@umich.edu} 9610152Satgutier@umich.edu 9710152Satgutier@umich.edu 9810152Satgutier@umich.edu/*crossbar related functions */ 9910152Satgutier@umich.edu 10010152Satgutier@umich.edu// Model for simple transmission gate 10110152Satgutier@umich.edudouble 10210152Satgutier@umich.eduRouter::transmission_buf_inpcap() { 10310234Syasuko.eckert@amd.com return diff_cap(NTtr, 0, 1) + diff_cap(PTtr, 1, 1); 10410152Satgutier@umich.edu} 10510152Satgutier@umich.edu 10610152Satgutier@umich.edudouble 10710152Satgutier@umich.eduRouter::transmission_buf_outcap() { 10810234Syasuko.eckert@amd.com return diff_cap(NTtr, 0, 1) + diff_cap(PTtr, 1, 1); 10910152Satgutier@umich.edu} 11010152Satgutier@umich.edu 11110152Satgutier@umich.edudouble 11210152Satgutier@umich.eduRouter::transmission_buf_ctrcap() { 11310234Syasuko.eckert@amd.com return gate_cap(NTtr) + gate_cap(PTtr); 11410152Satgutier@umich.edu} 11510152Satgutier@umich.edu 11610152Satgutier@umich.edudouble 11710152Satgutier@umich.eduRouter::crossbar_inpline() { 11810234Syasuko.eckert@amd.com return (Cw3(O*flit_size*wt) + O*transmission_buf_inpcap() + gate_cap(NTid) + 11910234Syasuko.eckert@amd.com gate_cap(PTid) + diff_cap(NTid, 0, 1) + diff_cap(PTid, 1, 1)); 12010152Satgutier@umich.edu} 12110152Satgutier@umich.edu 12210152Satgutier@umich.edudouble 12310152Satgutier@umich.eduRouter::crossbar_outline() { 12410234Syasuko.eckert@amd.com return (Cw3(I*flit_size*ht) + I*transmission_buf_outcap() + gate_cap(NTod) + 12510234Syasuko.eckert@amd.com gate_cap(PTod) + diff_cap(NTod, 0, 1) + diff_cap(PTod, 1, 1)); 12610152Satgutier@umich.edu} 12710152Satgutier@umich.edu 12810152Satgutier@umich.edudouble 12910152Satgutier@umich.eduRouter::crossbar_ctrline() { 13010234Syasuko.eckert@amd.com return (Cw3(0.5*O*flit_size*wt) + flit_size*transmission_buf_ctrcap() + 13110234Syasuko.eckert@amd.com diff_cap(NTi, 0, 1) + diff_cap(PTi, 1, 1) + 13210234Syasuko.eckert@amd.com gate_cap(NTi) + gate_cap(PTi)); 13310152Satgutier@umich.edu} 13410152Satgutier@umich.edu 13510152Satgutier@umich.edudouble 13610152Satgutier@umich.eduRouter::tr_crossbar_power() { 13710234Syasuko.eckert@amd.com return (crossbar_inpline()*Vdd*Vdd*flit_size / 2 + 13810234Syasuko.eckert@amd.com crossbar_outline()*Vdd*Vdd*flit_size / 2) * 2; 13910152Satgutier@umich.edu} 14010152Satgutier@umich.edu 14110234Syasuko.eckert@amd.comvoid Router::buffer_stats() { 14210234Syasuko.eckert@amd.com DynamicParameter dyn_p; 14310234Syasuko.eckert@amd.com dyn_p.is_tag = false; 14410234Syasuko.eckert@amd.com dyn_p.pure_cam = false; 14510234Syasuko.eckert@amd.com dyn_p.fully_assoc = false; 14610234Syasuko.eckert@amd.com dyn_p.pure_ram = true; 14710234Syasuko.eckert@amd.com dyn_p.is_dram = false; 14810234Syasuko.eckert@amd.com dyn_p.is_main_mem = false; 14910234Syasuko.eckert@amd.com dyn_p.num_subarrays = 1; 15010234Syasuko.eckert@amd.com dyn_p.num_mats = 1; 15110234Syasuko.eckert@amd.com dyn_p.Ndbl = 1; 15210234Syasuko.eckert@amd.com dyn_p.Ndwl = 1; 15310234Syasuko.eckert@amd.com dyn_p.Nspd = 1; 15410234Syasuko.eckert@amd.com dyn_p.deg_bl_muxing = 1; 15510234Syasuko.eckert@amd.com dyn_p.deg_senseamp_muxing_non_associativity = 1; 15610234Syasuko.eckert@amd.com dyn_p.Ndsam_lev_1 = 1; 15710234Syasuko.eckert@amd.com dyn_p.Ndsam_lev_2 = 1; 15810234Syasuko.eckert@amd.com dyn_p.Ndcm = 1; 15910234Syasuko.eckert@amd.com dyn_p.number_addr_bits_mat = 8; 16010234Syasuko.eckert@amd.com dyn_p.number_way_select_signals_mat = 1; 16110234Syasuko.eckert@amd.com dyn_p.number_subbanks_decode = 0; 16210234Syasuko.eckert@amd.com dyn_p.num_act_mats_hor_dir = 1; 16310234Syasuko.eckert@amd.com dyn_p.V_b_sense = Vdd; // FIXME check power calc. 16410234Syasuko.eckert@amd.com dyn_p.ram_cell_tech_type = 0; 16510234Syasuko.eckert@amd.com dyn_p.num_r_subarray = (int) vc_buffer_size; 16610234Syasuko.eckert@amd.com dyn_p.num_c_subarray = (int) flit_size * (int) vc_count; 16710234Syasuko.eckert@amd.com dyn_p.num_mats_h_dir = 1; 16810234Syasuko.eckert@amd.com dyn_p.num_mats_v_dir = 1; 16910234Syasuko.eckert@amd.com dyn_p.num_do_b_subbank = (int)flit_size; 17010234Syasuko.eckert@amd.com dyn_p.num_di_b_subbank = (int)flit_size; 17110234Syasuko.eckert@amd.com dyn_p.num_do_b_mat = (int) flit_size; 17210234Syasuko.eckert@amd.com dyn_p.num_di_b_mat = (int) flit_size; 17310234Syasuko.eckert@amd.com dyn_p.num_do_b_mat = (int) flit_size; 17410234Syasuko.eckert@amd.com dyn_p.num_di_b_mat = (int) flit_size; 17510234Syasuko.eckert@amd.com dyn_p.num_do_b_bank_per_port = (int) flit_size; 17610234Syasuko.eckert@amd.com dyn_p.num_di_b_bank_per_port = (int) flit_size; 17710234Syasuko.eckert@amd.com dyn_p.out_w = (int) flit_size; 17810152Satgutier@umich.edu 17910234Syasuko.eckert@amd.com dyn_p.use_inp_params = 1; 18010234Syasuko.eckert@amd.com dyn_p.num_wr_ports = (unsigned int) vc_count; 18110234Syasuko.eckert@amd.com dyn_p.num_rd_ports = 1;//(unsigned int) vc_count;//based on Bill Dally's book 18210234Syasuko.eckert@amd.com dyn_p.num_rw_ports = 0; 18310234Syasuko.eckert@amd.com dyn_p.num_se_rd_ports = 0; 18410234Syasuko.eckert@amd.com dyn_p.num_search_ports = 0; 18510152Satgutier@umich.edu 18610152Satgutier@umich.edu 18710152Satgutier@umich.edu 18810234Syasuko.eckert@amd.com dyn_p.cell.h = g_tp.sram.b_h + 2 * g_tp.wire_outside_mat.pitch * (dyn_p.num_wr_ports + 18910234Syasuko.eckert@amd.com dyn_p.num_rw_ports - 1 + dyn_p.num_rd_ports); 19010234Syasuko.eckert@amd.com dyn_p.cell.w = g_tp.sram.b_w + 2 * g_tp.wire_outside_mat.pitch * (dyn_p.num_rw_ports - 1 + 19110234Syasuko.eckert@amd.com (dyn_p.num_rd_ports - dyn_p.num_se_rd_ports) + 19210234Syasuko.eckert@amd.com dyn_p.num_wr_ports) + g_tp.wire_outside_mat.pitch * dyn_p.num_se_rd_ports; 19310152Satgutier@umich.edu 19410234Syasuko.eckert@amd.com Mat buff(dyn_p); 19510234Syasuko.eckert@amd.com buff.compute_delays(0); 19610234Syasuko.eckert@amd.com buff.compute_power_energy(); 19710234Syasuko.eckert@amd.com buffer.power.readOp = buff.power.readOp; 19810234Syasuko.eckert@amd.com buffer.power.writeOp = buffer.power.readOp; //FIXME 19910234Syasuko.eckert@amd.com buffer.area = buff.area; 20010152Satgutier@umich.edu} 20110152Satgutier@umich.edu 20210152Satgutier@umich.edu 20310152Satgutier@umich.edu 20410234Syasuko.eckert@amd.comvoid 20510234Syasuko.eckert@amd.comRouter::cb_stats () { 20610234Syasuko.eckert@amd.com if (1) { 20710234Syasuko.eckert@amd.com Crossbar c_b(I, O, flit_size); 20810234Syasuko.eckert@amd.com c_b.compute_power(); 20910234Syasuko.eckert@amd.com crossbar.delay = c_b.delay; 21010234Syasuko.eckert@amd.com crossbar.power.readOp.dynamic = c_b.power.readOp.dynamic; 21110234Syasuko.eckert@amd.com crossbar.power.readOp.leakage = c_b.power.readOp.leakage; 21210234Syasuko.eckert@amd.com crossbar.power.readOp.gate_leakage = c_b.power.readOp.gate_leakage; 21310234Syasuko.eckert@amd.com crossbar.area = c_b.area; 21410152Satgutier@umich.edu// c_b.print_crossbar(); 21510234Syasuko.eckert@amd.com } else { 21610234Syasuko.eckert@amd.com crossbar.power.readOp.dynamic = tr_crossbar_power(); 21710234Syasuko.eckert@amd.com crossbar.power.readOp.leakage = flit_size * I * O * 21810234Syasuko.eckert@amd.com cmos_Isub_leakage(NTtr * g_tp.min_w_nmos_, PTtr * min_w_pmos, 1, tg); 21910234Syasuko.eckert@amd.com crossbar.power.readOp.gate_leakage = flit_size * I * O * 22010234Syasuko.eckert@amd.com cmos_Ig_leakage(NTtr * g_tp.min_w_nmos_, PTtr * min_w_pmos, 1, tg); 22110234Syasuko.eckert@amd.com } 22210152Satgutier@umich.edu} 22310152Satgutier@umich.edu 22410152Satgutier@umich.eduvoid 22510234Syasuko.eckert@amd.comRouter::get_router_power() { 22610234Syasuko.eckert@amd.com /* calculate buffer stats */ 22710234Syasuko.eckert@amd.com buffer_stats(); 22810152Satgutier@umich.edu 22910234Syasuko.eckert@amd.com /* calculate cross-bar stats */ 23010234Syasuko.eckert@amd.com cb_stats(); 23110152Satgutier@umich.edu 23210234Syasuko.eckert@amd.com /* calculate arbiter stats */ 23310234Syasuko.eckert@amd.com Arbiter vcarb(vc_count, flit_size, buffer.area.w); 23410234Syasuko.eckert@amd.com Arbiter cbarb(I, flit_size, crossbar.area.w); 23510234Syasuko.eckert@amd.com vcarb.compute_power(); 23610234Syasuko.eckert@amd.com cbarb.compute_power(); 23710234Syasuko.eckert@amd.com arbiter.power.readOp.dynamic = vcarb.power.readOp.dynamic * I + 23810234Syasuko.eckert@amd.com cbarb.power.readOp.dynamic * O; 23910234Syasuko.eckert@amd.com arbiter.power.readOp.leakage = vcarb.power.readOp.leakage * I + 24010234Syasuko.eckert@amd.com cbarb.power.readOp.leakage * O; 24110234Syasuko.eckert@amd.com arbiter.power.readOp.gate_leakage = vcarb.power.readOp.gate_leakage * I + 24210234Syasuko.eckert@amd.com cbarb.power.readOp.gate_leakage * O; 24310152Satgutier@umich.edu 24410152Satgutier@umich.edu// arb_stats(); 24510234Syasuko.eckert@amd.com power.readOp.dynamic = ((buffer.power.readOp.dynamic + 24610234Syasuko.eckert@amd.com buffer.power.writeOp.dynamic) + 24710234Syasuko.eckert@amd.com crossbar.power.readOp.dynamic + 24810234Syasuko.eckert@amd.com arbiter.power.readOp.dynamic) * MIN(I, O) * M; 24910234Syasuko.eckert@amd.com double pppm_t[4] = {1, I, I, 1}; 25010234Syasuko.eckert@amd.com power = power + (buffer.power * pppm_t + crossbar.power + arbiter.power) * 25110234Syasuko.eckert@amd.com pppm_lkg; 25210152Satgutier@umich.edu 25310152Satgutier@umich.edu} 25410152Satgutier@umich.edu 25510234Syasuko.eckert@amd.comvoid 25610234Syasuko.eckert@amd.comRouter::get_router_delay () { 25710234Syasuko.eckert@amd.com FREQUENCY = 5; // move this to config file --TODO 25810234Syasuko.eckert@amd.com cycle_time = (1 / (double)FREQUENCY) * 1e3; //ps 25910234Syasuko.eckert@amd.com delay = 4; 26010234Syasuko.eckert@amd.com max_cyc = 17 * g_tp.FO4; //s 26110234Syasuko.eckert@amd.com max_cyc *= 1e12; //ps 26210234Syasuko.eckert@amd.com if (cycle_time < max_cyc) { 26310234Syasuko.eckert@amd.com FREQUENCY = (1 / max_cyc) * 1e3; //GHz 26410234Syasuko.eckert@amd.com } 26510152Satgutier@umich.edu} 26610152Satgutier@umich.edu 26710234Syasuko.eckert@amd.comvoid 26810234Syasuko.eckert@amd.comRouter::get_router_area() { 26910234Syasuko.eckert@amd.com area.h = I * buffer.area.h; 27010234Syasuko.eckert@amd.com area.w = buffer.area.w + crossbar.area.w; 27110152Satgutier@umich.edu} 27210152Satgutier@umich.edu 27310234Syasuko.eckert@amd.comvoid 27410234Syasuko.eckert@amd.comRouter::calc_router_parameters() { 27510234Syasuko.eckert@amd.com /* calculate router frequency and pipeline cycles */ 27610234Syasuko.eckert@amd.com get_router_delay(); 27710152Satgutier@umich.edu 27810234Syasuko.eckert@amd.com /* router power stats */ 27910234Syasuko.eckert@amd.com get_router_power(); 28010152Satgutier@umich.edu 28110234Syasuko.eckert@amd.com /* area stats */ 28210234Syasuko.eckert@amd.com get_router_area(); 28310152Satgutier@umich.edu} 28410152Satgutier@umich.edu 28510234Syasuko.eckert@amd.comvoid 28610234Syasuko.eckert@amd.comRouter::print_router() { 28710234Syasuko.eckert@amd.com cout << "\n\nRouter stats:\n"; 28810234Syasuko.eckert@amd.com cout << "\tRouter Area - " << area.get_area()*1e-6 << "(mm^2)\n"; 28910234Syasuko.eckert@amd.com cout << "\tMaximum possible network frequency - " << (1 / max_cyc)*1e3 29010234Syasuko.eckert@amd.com << "GHz\n"; 29110234Syasuko.eckert@amd.com cout << "\tNetwork frequency - " << FREQUENCY << " GHz\n"; 29210234Syasuko.eckert@amd.com cout << "\tNo. of Virtual channels - " << vc_count << "\n"; 29310234Syasuko.eckert@amd.com cout << "\tNo. of pipeline stages - " << delay << endl; 29410234Syasuko.eckert@amd.com cout << "\tLink bandwidth - " << flit_size << " (bits)\n"; 29510234Syasuko.eckert@amd.com cout << "\tNo. of buffer entries per virtual channel - " 29610234Syasuko.eckert@amd.com << vc_buffer_size << "\n"; 29710234Syasuko.eckert@amd.com cout << "\tSimple buffer Area - " << buffer.area.get_area()*1e-6 29810234Syasuko.eckert@amd.com << "(mm^2)\n"; 29910234Syasuko.eckert@amd.com cout << "\tSimple buffer access (Read) - " 30010234Syasuko.eckert@amd.com << buffer.power.readOp.dynamic * 1e9 << " (nJ)\n"; 30110234Syasuko.eckert@amd.com cout << "\tSimple buffer leakage - " << buffer.power.readOp.leakage * 1e3 30210234Syasuko.eckert@amd.com << " (mW)\n"; 30310234Syasuko.eckert@amd.com cout << "\tCrossbar Area - " << crossbar.area.get_area()*1e-6 30410234Syasuko.eckert@amd.com << "(mm^2)\n"; 30510234Syasuko.eckert@amd.com cout << "\tCross bar access energy - " 30610234Syasuko.eckert@amd.com << crossbar.power.readOp.dynamic * 1e9 << " (nJ)\n"; 30710234Syasuko.eckert@amd.com cout << "\tCross bar leakage power - " 30810234Syasuko.eckert@amd.com << crossbar.power.readOp.leakage * 1e3 << " (mW)\n"; 30910234Syasuko.eckert@amd.com cout << "\tArbiter access energy (VC arb + Crossbar arb) - " 31010234Syasuko.eckert@amd.com << arbiter.power.readOp.dynamic * 1e9 << " (nJ)\n"; 31110234Syasuko.eckert@amd.com cout << "\tArbiter leakage (VC arb + Crossbar arb) - " 31210234Syasuko.eckert@amd.com << arbiter.power.readOp.leakage * 1e3 << " (mW)\n"; 31310152Satgutier@umich.edu 31410152Satgutier@umich.edu} 31510152Satgutier@umich.edu 316