110448Snilay@cs.wisc.edu/* Copyright (c) 2012 Massachusetts Institute of Technology 210448Snilay@cs.wisc.edu * 310448Snilay@cs.wisc.edu * Permission is hereby granted, free of charge, to any person obtaining a copy 410448Snilay@cs.wisc.edu * of this software and associated documentation files (the "Software"), to deal 510448Snilay@cs.wisc.edu * in the Software without restriction, including without limitation the rights 610448Snilay@cs.wisc.edu * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 710448Snilay@cs.wisc.edu * copies of the Software, and to permit persons to whom the Software is 810448Snilay@cs.wisc.edu * furnished to do so, subject to the following conditions: 910448Snilay@cs.wisc.edu * 1010448Snilay@cs.wisc.edu * The above copyright notice and this permission notice shall be included in 1110448Snilay@cs.wisc.edu * all copies or substantial portions of the Software. 1210448Snilay@cs.wisc.edu * 1310448Snilay@cs.wisc.edu * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 1410448Snilay@cs.wisc.edu * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 1510448Snilay@cs.wisc.edu * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 1610448Snilay@cs.wisc.edu * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 1710448Snilay@cs.wisc.edu * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 1810448Snilay@cs.wisc.edu * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 1910448Snilay@cs.wisc.edu * THE SOFTWARE. 2010448Snilay@cs.wisc.edu */ 2110448Snilay@cs.wisc.edu 2210447Snilay@cs.wisc.edu#include "model/electrical/DemuxTreeDeserializer.h" 2310447Snilay@cs.wisc.edu 2410447Snilay@cs.wisc.edu#include <cmath> 2510447Snilay@cs.wisc.edu 2610447Snilay@cs.wisc.edu#include "model/PortInfo.h" 2710447Snilay@cs.wisc.edu#include "model/TransitionInfo.h" 2810447Snilay@cs.wisc.edu#include "model/EventInfo.h" 2910447Snilay@cs.wisc.edu#include "model/std_cells/StdCellLib.h" 3010447Snilay@cs.wisc.edu#include "model/std_cells/StdCell.h" 3110447Snilay@cs.wisc.edu#include "model/electrical/Multiplexer.h" 3210447Snilay@cs.wisc.edu#include "model/timing_graph/ElectricalNet.h" 3310447Snilay@cs.wisc.edu 3410447Snilay@cs.wisc.edunamespace DSENT 3510447Snilay@cs.wisc.edu{ 3610447Snilay@cs.wisc.edu using std::ceil; 3710447Snilay@cs.wisc.edu 3810447Snilay@cs.wisc.edu DemuxTreeDeserializer::DemuxTreeDeserializer(const String& instance_name_, const TechModel* tech_model_) 3910447Snilay@cs.wisc.edu : ElectricalModel(instance_name_, tech_model_) 4010447Snilay@cs.wisc.edu { 4110447Snilay@cs.wisc.edu initParameters(); 4210447Snilay@cs.wisc.edu initProperties(); 4310447Snilay@cs.wisc.edu } 4410447Snilay@cs.wisc.edu 4510447Snilay@cs.wisc.edu DemuxTreeDeserializer::~DemuxTreeDeserializer() 4610447Snilay@cs.wisc.edu {} 4710447Snilay@cs.wisc.edu 4810447Snilay@cs.wisc.edu void DemuxTreeDeserializer::initParameters() 4910447Snilay@cs.wisc.edu { 5010447Snilay@cs.wisc.edu addParameterName("InDataRate"); 5110447Snilay@cs.wisc.edu addParameterName("OutDataRate"); 5210447Snilay@cs.wisc.edu addParameterName("OutBits"); //Output width will just be output width / serialization ratio 5310447Snilay@cs.wisc.edu addParameterName("BitDuplicate", "TRUE"); 5410447Snilay@cs.wisc.edu return; 5510447Snilay@cs.wisc.edu } 5610447Snilay@cs.wisc.edu 5710447Snilay@cs.wisc.edu void DemuxTreeDeserializer::initProperties() 5810447Snilay@cs.wisc.edu { 5910447Snilay@cs.wisc.edu return; 6010447Snilay@cs.wisc.edu } 6110447Snilay@cs.wisc.edu 6210447Snilay@cs.wisc.edu DemuxTreeDeserializer* DemuxTreeDeserializer::clone() const 6310447Snilay@cs.wisc.edu { 6410447Snilay@cs.wisc.edu // TODO 6510447Snilay@cs.wisc.edu return NULL; 6610447Snilay@cs.wisc.edu } 6710447Snilay@cs.wisc.edu 6810447Snilay@cs.wisc.edu void DemuxTreeDeserializer::constructModel() 6910447Snilay@cs.wisc.edu { 7010447Snilay@cs.wisc.edu 7110447Snilay@cs.wisc.edu // Get parameters 7210447Snilay@cs.wisc.edu double in_data_rate = getParameter("InDataRate"); 7310447Snilay@cs.wisc.edu double out_data_rate = getParameter("OutDataRate"); 7410447Snilay@cs.wisc.edu unsigned int out_bits = getParameter("OutBits"); 7510447Snilay@cs.wisc.edu bool bit_duplicate = getParameter("BitDuplicate"); 7610447Snilay@cs.wisc.edu 7710447Snilay@cs.wisc.edu // Calculate deserialization ratio 7810447Snilay@cs.wisc.edu unsigned int deserialization_ratio = (unsigned int) floor(in_data_rate / out_data_rate); 7910447Snilay@cs.wisc.edu ASSERT(deserialization_ratio == in_data_rate / out_data_rate, 8010447Snilay@cs.wisc.edu "[Error] " + getInstanceName() + " -> Cannot have non-integer deserialization ratios!"); 8110447Snilay@cs.wisc.edu ASSERT((deserialization_ratio & (deserialization_ratio - 1)) == 0, 8210447Snilay@cs.wisc.edu "[Error] " + getInstanceName() + " -> Deserialization ratio must be a power of 2"); 8310447Snilay@cs.wisc.edu 8410447Snilay@cs.wisc.edu // Calculate output width 8510447Snilay@cs.wisc.edu unsigned int input_bits = out_bits / deserialization_ratio; 8610447Snilay@cs.wisc.edu ASSERT(out_bits >= deserialization_ratio, "[Error] " + getInstanceName() + 8710447Snilay@cs.wisc.edu " -> Output width must be >= deserialization ratio!"); 8810447Snilay@cs.wisc.edu ASSERT(floor((double) out_bits / deserialization_ratio) == input_bits, 8910447Snilay@cs.wisc.edu "[Error] " + getInstanceName() + " -> Output width must be a multiple of the serialization ratio!"); 9010447Snilay@cs.wisc.edu 9110447Snilay@cs.wisc.edu // Store calculated numbers 9210447Snilay@cs.wisc.edu getGenProperties()->set("DeserializationRatio", deserialization_ratio); 9310447Snilay@cs.wisc.edu getGenProperties()->set("InputBits", input_bits); 9410447Snilay@cs.wisc.edu 9510447Snilay@cs.wisc.edu // Create ports 9610447Snilay@cs.wisc.edu createInputPort("In", makeNetIndex(0, input_bits-1)); 9710447Snilay@cs.wisc.edu createInputPort("InCK"); 9810447Snilay@cs.wisc.edu createOutputPort("Out", makeNetIndex(0, out_bits-1)); 9910447Snilay@cs.wisc.edu 10010447Snilay@cs.wisc.edu //Create energy, power, and area results 10110447Snilay@cs.wisc.edu createElectricalResults(); 10210447Snilay@cs.wisc.edu createElectricalEventResult("Deserialize"); 10310447Snilay@cs.wisc.edu getEventInfo("Deserialize")->setTransitionInfo("InCK", TransitionInfo(0.0, (double) deserialization_ratio / 2.0, 0.0)); 10410447Snilay@cs.wisc.edu // Set conditions during idle state 10510447Snilay@cs.wisc.edu getEventInfo("Idle")->setStaticTransitionInfos(); 10610447Snilay@cs.wisc.edu getEventInfo("Idle")->setTransitionInfo("InCK", TransitionInfo(0.0, (double) deserialization_ratio / 2.0, 0.0)); 10710447Snilay@cs.wisc.edu 10810447Snilay@cs.wisc.edu // Mark InCK as a false path (since timing tool will do strange stuff due to all the clock divides and stuff) 10910447Snilay@cs.wisc.edu getNet("InCK")->setFalsePath(true); 11010447Snilay@cs.wisc.edu 11110447Snilay@cs.wisc.edu // Create deserializer 11210447Snilay@cs.wisc.edu if (deserialization_ratio == 1) 11310447Snilay@cs.wisc.edu { 11410447Snilay@cs.wisc.edu // No need to do anything, hohoho 11510447Snilay@cs.wisc.edu assign("Out", "In"); 11610447Snilay@cs.wisc.edu } 11710447Snilay@cs.wisc.edu else if (input_bits == 1) 11810447Snilay@cs.wisc.edu { 11910447Snilay@cs.wisc.edu //----------------------------------------------------------------- 12010447Snilay@cs.wisc.edu // Create 2:1 demux deserializer 12110447Snilay@cs.wisc.edu //----------------------------------------------------------------- 12210447Snilay@cs.wisc.edu const String& des_dff_way0_name = "DesDFFWay0"; 12310447Snilay@cs.wisc.edu const String& des_dff_way1_name = "DesDFFWay1"; 12410447Snilay@cs.wisc.edu const String& des_latch_name = "DesLatch"; 12510447Snilay@cs.wisc.edu const String& ck_dff_name = "CKDFF"; 12610447Snilay@cs.wisc.edu const String& ck_inv_name = "CKINV"; 12710447Snilay@cs.wisc.edu const String& out_way0_name = "OutWay0"; 12810447Snilay@cs.wisc.edu const String& out_way1_name = "OutWay1"; 12910447Snilay@cs.wisc.edu const String& mid_way0_name = "MidWay0"; 13010447Snilay@cs.wisc.edu const String& ck_div2_name = "CK_div2"; 13110447Snilay@cs.wisc.edu const String& ck_div2_b_name = "CK_div2_b"; 13210447Snilay@cs.wisc.edu 13310447Snilay@cs.wisc.edu // Create nets 13410447Snilay@cs.wisc.edu createNet(out_way0_name); 13510447Snilay@cs.wisc.edu createNet(out_way1_name); 13610447Snilay@cs.wisc.edu createNet(mid_way0_name); 13710447Snilay@cs.wisc.edu createNet(ck_div2_name); 13810447Snilay@cs.wisc.edu createNet(ck_div2_b_name); 13910447Snilay@cs.wisc.edu 14010447Snilay@cs.wisc.edu // Create the dffs and latch needed on both ways 14110447Snilay@cs.wisc.edu StdCell* des_dff_way0 = getTechModel()->getStdCellLib()->createStdCell("DFFQ", des_dff_way0_name); 14210447Snilay@cs.wisc.edu des_dff_way0->construct(); 14310447Snilay@cs.wisc.edu StdCell* des_dff_way1 = getTechModel()->getStdCellLib()->createStdCell("DFFQ", des_dff_way1_name); 14410447Snilay@cs.wisc.edu des_dff_way1->construct(); 14510447Snilay@cs.wisc.edu StdCell* des_latch = getTechModel()->getStdCellLib()->createStdCell("LATQ", des_latch_name); 14610447Snilay@cs.wisc.edu des_latch->construct(); 14710447Snilay@cs.wisc.edu 14810447Snilay@cs.wisc.edu // Create clk divide circuit 14910447Snilay@cs.wisc.edu StdCell* ck_dff = getTechModel()->getStdCellLib()->createStdCell("DFFQ", ck_dff_name); 15010447Snilay@cs.wisc.edu ck_dff->construct(); 15110447Snilay@cs.wisc.edu StdCell* ck_inv = getTechModel()->getStdCellLib()->createStdCell("INV", ck_inv_name); 15210447Snilay@cs.wisc.edu ck_inv->construct(); 15310447Snilay@cs.wisc.edu 15410447Snilay@cs.wisc.edu // Connect ports 15510447Snilay@cs.wisc.edu portConnect(des_dff_way0, "CK", "InCK"); 15610447Snilay@cs.wisc.edu portConnect(des_dff_way0, "D", mid_way0_name); 15710447Snilay@cs.wisc.edu portConnect(des_dff_way0, "Q", out_way0_name); 15810447Snilay@cs.wisc.edu portConnect(des_latch, "G", "InCK"); 15910447Snilay@cs.wisc.edu portConnect(des_latch, "D", "In"); 16010447Snilay@cs.wisc.edu portConnect(des_latch, "Q", mid_way0_name); 16110447Snilay@cs.wisc.edu portConnect(des_dff_way1, "CK", "InCK"); 16210447Snilay@cs.wisc.edu portConnect(des_dff_way1, "D", "In"); 16310447Snilay@cs.wisc.edu portConnect(des_dff_way1, "Q", out_way1_name); 16410447Snilay@cs.wisc.edu portConnect(ck_dff, "CK", "InCK"); 16510447Snilay@cs.wisc.edu portConnect(ck_dff, "D", ck_div2_b_name); 16610447Snilay@cs.wisc.edu portConnect(ck_dff, "Q", ck_div2_name); 16710447Snilay@cs.wisc.edu portConnect(ck_inv, "A", ck_div2_name); 16810447Snilay@cs.wisc.edu portConnect(ck_inv, "Y", ck_div2_b_name); 16910447Snilay@cs.wisc.edu 17010447Snilay@cs.wisc.edu // Add sub instances 17110447Snilay@cs.wisc.edu addSubInstances(des_dff_way0, 1.0); 17210447Snilay@cs.wisc.edu addElectricalSubResults(des_dff_way0, 1.0); 17310447Snilay@cs.wisc.edu addSubInstances(des_dff_way1, 1.0); 17410447Snilay@cs.wisc.edu addElectricalSubResults(des_dff_way1, 1.0); 17510447Snilay@cs.wisc.edu addSubInstances(des_latch, 1.0); 17610447Snilay@cs.wisc.edu addElectricalSubResults(des_latch, 1.0); 17710447Snilay@cs.wisc.edu addSubInstances(ck_dff, 1.0); 17810447Snilay@cs.wisc.edu addElectricalSubResults(ck_dff, 1.0); 17910447Snilay@cs.wisc.edu addSubInstances(ck_inv, 1.0); 18010447Snilay@cs.wisc.edu addElectricalSubResults(ck_inv, 1.0); 18110447Snilay@cs.wisc.edu 18210447Snilay@cs.wisc.edu Result* deserialize = getEventResult("Deserialize"); 18310447Snilay@cs.wisc.edu deserialize->addSubResult(des_dff_way0->getEventResult("CK"), des_dff_way0_name, 1.0); 18410447Snilay@cs.wisc.edu deserialize->addSubResult(des_dff_way0->getEventResult("DFFD"), des_dff_way0_name, 1.0); 18510447Snilay@cs.wisc.edu deserialize->addSubResult(des_dff_way0->getEventResult("DFFQ"), des_dff_way0_name, 1.0); 18610447Snilay@cs.wisc.edu deserialize->addSubResult(des_dff_way1->getEventResult("CK"), des_dff_way1_name, 1.0); 18710447Snilay@cs.wisc.edu deserialize->addSubResult(des_dff_way1->getEventResult("DFFD"), des_dff_way1_name, 1.0); 18810447Snilay@cs.wisc.edu deserialize->addSubResult(des_dff_way1->getEventResult("DFFQ"), des_dff_way1_name, 1.0); 18910447Snilay@cs.wisc.edu deserialize->addSubResult(des_latch->getEventResult("G"), des_latch_name, 1.0); 19010447Snilay@cs.wisc.edu deserialize->addSubResult(des_latch->getEventResult("LATD"), des_latch_name, 1.0); 19110447Snilay@cs.wisc.edu deserialize->addSubResult(des_latch->getEventResult("LATQ"), des_latch_name, 1.0); 19210447Snilay@cs.wisc.edu deserialize->addSubResult(ck_dff->getEventResult("CK"), ck_dff_name, 1.0); 19310447Snilay@cs.wisc.edu deserialize->addSubResult(ck_dff->getEventResult("DFFD"), ck_dff_name, 1.0); 19410447Snilay@cs.wisc.edu deserialize->addSubResult(ck_dff->getEventResult("DFFQ"), ck_dff_name, 1.0); 19510447Snilay@cs.wisc.edu deserialize->addSubResult(ck_inv->getEventResult("INV"), ck_inv_name, 1.0); 19610447Snilay@cs.wisc.edu //----------------------------------------------------------------- 19710447Snilay@cs.wisc.edu 19810447Snilay@cs.wisc.edu //----------------------------------------------------------------- 19910447Snilay@cs.wisc.edu // Create Sub-deserializers 20010447Snilay@cs.wisc.edu //----------------------------------------------------------------- 20110447Snilay@cs.wisc.edu // Create sub-deserializers 20210447Snilay@cs.wisc.edu const String& demux_way0_name = "DemuxTree_way0_" + (String) deserialization_ratio + "_to_1"; 20310447Snilay@cs.wisc.edu const String& demux_way1_name = "DemuxTree_way1_" + (String) deserialization_ratio + "_to_1"; 20410447Snilay@cs.wisc.edu 20510447Snilay@cs.wisc.edu DemuxTreeDeserializer* demux_way0 = new DemuxTreeDeserializer(demux_way0_name, getTechModel()); 20610447Snilay@cs.wisc.edu demux_way0->setParameter("InDataRate", in_data_rate / 2.0); 20710447Snilay@cs.wisc.edu demux_way0->setParameter("OutDataRate", out_data_rate); 20810447Snilay@cs.wisc.edu demux_way0->setParameter("OutBits", out_bits / 2); 20910447Snilay@cs.wisc.edu demux_way0->setParameter("BitDuplicate", "TRUE"); 21010447Snilay@cs.wisc.edu demux_way0->construct(); 21110447Snilay@cs.wisc.edu 21210447Snilay@cs.wisc.edu DemuxTreeDeserializer* demux_way1 = new DemuxTreeDeserializer(demux_way1_name, getTechModel()); 21310447Snilay@cs.wisc.edu demux_way1->setParameter("InDataRate", in_data_rate / 2.0); 21410447Snilay@cs.wisc.edu demux_way1->setParameter("OutDataRate", out_data_rate); 21510447Snilay@cs.wisc.edu demux_way1->setParameter("OutBits", out_bits / 2); 21610447Snilay@cs.wisc.edu demux_way1->setParameter("BitDuplicate", "TRUE"); 21710447Snilay@cs.wisc.edu demux_way1->construct(); 21810447Snilay@cs.wisc.edu 21910447Snilay@cs.wisc.edu // Connect ports 22010447Snilay@cs.wisc.edu portConnect(demux_way0, "In", out_way0_name); 22110447Snilay@cs.wisc.edu portConnect(demux_way0, "InCK", ck_div2_name); 22210447Snilay@cs.wisc.edu portConnect(demux_way0, "Out", "Out", makeNetIndex(0, out_bits/2-1)); 22310447Snilay@cs.wisc.edu 22410447Snilay@cs.wisc.edu portConnect(demux_way1, "In", out_way1_name); 22510447Snilay@cs.wisc.edu portConnect(demux_way1, "InCK", ck_div2_name); 22610447Snilay@cs.wisc.edu portConnect(demux_way1, "Out", "Out", makeNetIndex(out_bits/2, out_bits-1)); 22710447Snilay@cs.wisc.edu 22810447Snilay@cs.wisc.edu // Add subinstances and area results 22910447Snilay@cs.wisc.edu addSubInstances(demux_way0, 1.0); 23010447Snilay@cs.wisc.edu addElectricalSubResults(demux_way0, 1.0); 23110447Snilay@cs.wisc.edu addSubInstances(demux_way1, 1.0); 23210447Snilay@cs.wisc.edu addElectricalSubResults(demux_way1, 1.0); 23310447Snilay@cs.wisc.edu 23410447Snilay@cs.wisc.edu deserialize->addSubResult(demux_way0->getEventResult("Deserialize"), demux_way0_name, 1.0); 23510447Snilay@cs.wisc.edu deserialize->addSubResult(demux_way1->getEventResult("Deserialize"), demux_way1_name, 1.0); 23610447Snilay@cs.wisc.edu //----------------------------------------------------------------- 23710447Snilay@cs.wisc.edu 23810447Snilay@cs.wisc.edu } 23910447Snilay@cs.wisc.edu else if (bit_duplicate) 24010447Snilay@cs.wisc.edu { 24110447Snilay@cs.wisc.edu const String& demux_name = "DemuxTree_" + (String) deserialization_ratio + "_to_1"; 24210447Snilay@cs.wisc.edu 24310447Snilay@cs.wisc.edu DemuxTreeDeserializer* des_bit = new DemuxTreeDeserializer(demux_name, getTechModel()); 24410447Snilay@cs.wisc.edu des_bit->setParameter("InDataRate", in_data_rate); 24510447Snilay@cs.wisc.edu des_bit->setParameter("OutDataRate", out_data_rate); 24610447Snilay@cs.wisc.edu des_bit->setParameter("OutBits", deserialization_ratio); 24710447Snilay@cs.wisc.edu des_bit->setParameter("BitDuplicate", "TRUE"); 24810447Snilay@cs.wisc.edu des_bit->construct(); 24910447Snilay@cs.wisc.edu 25010447Snilay@cs.wisc.edu // Create VFI and VFO nets 25110447Snilay@cs.wisc.edu createNet("InVFI"); 25210447Snilay@cs.wisc.edu createNet("OutVFO", makeNetIndex(0, deserialization_ratio-1)); 25310447Snilay@cs.wisc.edu 25410447Snilay@cs.wisc.edu // Connect ports 25510447Snilay@cs.wisc.edu portConnect(des_bit, "In", "InVFI"); 25610447Snilay@cs.wisc.edu portConnect(des_bit, "Out", "OutVFO"); 25710447Snilay@cs.wisc.edu 25810447Snilay@cs.wisc.edu // Do VFI and VFO 25910447Snilay@cs.wisc.edu assignVirtualFanin("InVFI", "In"); 26010447Snilay@cs.wisc.edu for (unsigned int i = 0; i < input_bits; ++i) 26110447Snilay@cs.wisc.edu { 26210447Snilay@cs.wisc.edu portConnect(des_bit, "InCK", "InCK"); 26310447Snilay@cs.wisc.edu for (unsigned int j = 0; j < deserialization_ratio; ++j) 26410447Snilay@cs.wisc.edu assignVirtualFanout("Out", makeNetIndex(i*deserialization_ratio + j), "OutVFO", makeNetIndex(j)); 26510447Snilay@cs.wisc.edu } 26610447Snilay@cs.wisc.edu // Add subinstances and area results 26710447Snilay@cs.wisc.edu addSubInstances(des_bit, input_bits); 26810447Snilay@cs.wisc.edu addElectricalSubResults(des_bit, input_bits); 26910447Snilay@cs.wisc.edu getEventResult("Deserialize")->addSubResult(des_bit->getEventResult("Deserialize"), demux_name, input_bits); 27010447Snilay@cs.wisc.edu } 27110447Snilay@cs.wisc.edu else 27210447Snilay@cs.wisc.edu { 27310447Snilay@cs.wisc.edu //Instantiate a bunch of 1 input bit deserializers 27410447Snilay@cs.wisc.edu for (unsigned int i = 0; i < input_bits; ++i) 27510447Snilay@cs.wisc.edu { 27610447Snilay@cs.wisc.edu const String& demux_name = "DemuxTree_" + (String) deserialization_ratio + "_to_1_bit" + (String) i; 27710447Snilay@cs.wisc.edu 27810447Snilay@cs.wisc.edu DemuxTreeDeserializer* des_bit = new DemuxTreeDeserializer(demux_name, getTechModel()); 27910447Snilay@cs.wisc.edu des_bit->setParameter("InDataRate", in_data_rate); 28010447Snilay@cs.wisc.edu des_bit->setParameter("OutDataRate", out_data_rate); 28110447Snilay@cs.wisc.edu des_bit->setParameter("OutBits", deserialization_ratio); 28210447Snilay@cs.wisc.edu des_bit->setParameter("BitDuplicate", "TRUE"); 28310447Snilay@cs.wisc.edu des_bit->construct(); 28410447Snilay@cs.wisc.edu 28510447Snilay@cs.wisc.edu portConnect(des_bit, "In", "In", makeNetIndex(i)); 28610447Snilay@cs.wisc.edu portConnect(des_bit, "InCK", "InCK"); 28710447Snilay@cs.wisc.edu portConnect(des_bit, "Out", "Out", makeNetIndex(i*deserialization_ratio, (i+1)*deserialization_ratio-1)); 28810447Snilay@cs.wisc.edu 28910447Snilay@cs.wisc.edu addSubInstances(des_bit, 1.0); 29010447Snilay@cs.wisc.edu addElectricalSubResults(des_bit, 1.0); 29110447Snilay@cs.wisc.edu getEventResult("Deserialize")->addSubResult(des_bit->getEventResult("Deserialize"), demux_name, 1.0); 29210447Snilay@cs.wisc.edu } 29310447Snilay@cs.wisc.edu } 29410447Snilay@cs.wisc.edu 29510447Snilay@cs.wisc.edu return; 29610447Snilay@cs.wisc.edu } 29710447Snilay@cs.wisc.edu 29810447Snilay@cs.wisc.edu void DemuxTreeDeserializer::propagateTransitionInfo() 29910447Snilay@cs.wisc.edu { 30010447Snilay@cs.wisc.edu // Get parameters 30110447Snilay@cs.wisc.edu bool bit_duplicate = getParameter("BitDuplicate"); 30210447Snilay@cs.wisc.edu // Get generated properties 30310447Snilay@cs.wisc.edu unsigned int deserialization_ratio = getGenProperties()->get("DeserializationRatio"); 30410447Snilay@cs.wisc.edu unsigned int input_bits = getGenProperties()->get("InputBits"); 30510447Snilay@cs.wisc.edu 30610447Snilay@cs.wisc.edu // Calculate output transitions and activities 30710447Snilay@cs.wisc.edu if (deserialization_ratio == 1) 30810447Snilay@cs.wisc.edu { 30910447Snilay@cs.wisc.edu // If no deserialization, then just propagate input transition info to output port 31010447Snilay@cs.wisc.edu propagatePortTransitionInfo("Out", "In"); 31110447Snilay@cs.wisc.edu } 31210447Snilay@cs.wisc.edu else if (input_bits == 1) 31310447Snilay@cs.wisc.edu { 31410447Snilay@cs.wisc.edu const String& des_dff_way0_name = "DesDFFWay0"; 31510447Snilay@cs.wisc.edu const String& des_dff_way1_name = "DesDFFWay1"; 31610447Snilay@cs.wisc.edu const String& des_latch_name = "DesLatch"; 31710447Snilay@cs.wisc.edu const String& ck_dff_name = "CKDFF"; 31810447Snilay@cs.wisc.edu const String& ck_inv_name = "CKINV"; 31910447Snilay@cs.wisc.edu 32010447Snilay@cs.wisc.edu // Sub-deserializer names 32110447Snilay@cs.wisc.edu const String& demux_way0_name = "DemuxTree_way0_" + (String) deserialization_ratio + "_to_1"; 32210447Snilay@cs.wisc.edu const String& demux_way1_name = "DemuxTree_way1_" + (String) deserialization_ratio + "_to_1"; 32310447Snilay@cs.wisc.edu 32410447Snilay@cs.wisc.edu // Update transition info for deserialization registers/latches 32510447Snilay@cs.wisc.edu ElectricalModel* des_latch = (ElectricalModel*) getSubInstance(des_latch_name); 32610447Snilay@cs.wisc.edu propagatePortTransitionInfo(des_latch, "G", "InCK"); 32710447Snilay@cs.wisc.edu propagatePortTransitionInfo(des_latch, "D", "In"); 32810447Snilay@cs.wisc.edu des_latch->use(); 32910447Snilay@cs.wisc.edu 33010447Snilay@cs.wisc.edu ElectricalModel* des_dff_way0 = (ElectricalModel*) getSubInstance(des_dff_way0_name); 33110447Snilay@cs.wisc.edu propagatePortTransitionInfo(des_dff_way0, "CK", "InCK"); 33210447Snilay@cs.wisc.edu propagatePortTransitionInfo(des_dff_way0, "D", des_latch, "Q"); 33310447Snilay@cs.wisc.edu des_dff_way0->use(); 33410447Snilay@cs.wisc.edu 33510447Snilay@cs.wisc.edu ElectricalModel* des_dff_way1 = (ElectricalModel*) getSubInstance(des_dff_way1_name); 33610447Snilay@cs.wisc.edu propagatePortTransitionInfo(des_dff_way1, "CK", "InCK"); 33710447Snilay@cs.wisc.edu propagatePortTransitionInfo(des_dff_way1, "D", "In"); 33810447Snilay@cs.wisc.edu des_dff_way1->use(); 33910447Snilay@cs.wisc.edu 34010447Snilay@cs.wisc.edu // Get input transitions of input clock 34110447Snilay@cs.wisc.edu double P01_CK = getInputPort("InCK")->getTransitionInfo().getNumberTransitions01(); 34210447Snilay@cs.wisc.edu // Update transition info for clk division DFF 34310447Snilay@cs.wisc.edu ElectricalModel* ck_dff = (ElectricalModel*) getSubInstance(ck_dff_name); 34410447Snilay@cs.wisc.edu propagatePortTransitionInfo(ck_dff, "CK", "InCK"); 34510447Snilay@cs.wisc.edu // Since it is a clock divider, P01 is D and Q are simply half the P01 of D and Q of 34610447Snilay@cs.wisc.edu // the input clock 34710447Snilay@cs.wisc.edu if (P01_CK != 0) ck_dff->getInputPort("D")->setTransitionInfo(TransitionInfo(0.0, P01_CK * 0.5, 0.0)); 34810447Snilay@cs.wisc.edu else ck_dff->getInputPort("D")->setTransitionInfo(TransitionInfo(0.5, 0.0, 0.5)); 34910447Snilay@cs.wisc.edu 35010447Snilay@cs.wisc.edu ck_dff->use(); 35110447Snilay@cs.wisc.edu // Update transition info of clk divided inverter 35210447Snilay@cs.wisc.edu ElectricalModel* ck_inv = (ElectricalModel*) getSubInstance(ck_inv_name); 35310447Snilay@cs.wisc.edu propagatePortTransitionInfo(ck_inv, "A", ck_dff, "Q"); 35410447Snilay@cs.wisc.edu ck_inv->use(); 35510447Snilay@cs.wisc.edu 35610447Snilay@cs.wisc.edu // Update transition info for next demux stages 35710447Snilay@cs.wisc.edu ElectricalModel* demux_way0 = (ElectricalModel*) getSubInstance(demux_way0_name); 35810447Snilay@cs.wisc.edu propagatePortTransitionInfo(demux_way0, "In", des_dff_way0, "Q"); 35910447Snilay@cs.wisc.edu propagatePortTransitionInfo(demux_way0, "InCK", ck_dff, "Q"); 36010447Snilay@cs.wisc.edu demux_way0->use(); 36110447Snilay@cs.wisc.edu ElectricalModel* demux_way1 = (ElectricalModel*) getSubInstance(demux_way1_name); 36210447Snilay@cs.wisc.edu propagatePortTransitionInfo(demux_way1, "In", des_dff_way1, "Q"); 36310447Snilay@cs.wisc.edu propagatePortTransitionInfo(demux_way1, "InCK", ck_dff, "Q"); 36410447Snilay@cs.wisc.edu demux_way1->use(); 36510447Snilay@cs.wisc.edu 36610447Snilay@cs.wisc.edu propagatePortTransitionInfo("Out", demux_way0, "Out"); 36710447Snilay@cs.wisc.edu } 36810447Snilay@cs.wisc.edu else if (bit_duplicate) 36910447Snilay@cs.wisc.edu { 37010447Snilay@cs.wisc.edu // Propagate transition info 37110447Snilay@cs.wisc.edu const String& demux_name = "DemuxTree_" + (String) deserialization_ratio + "_to_1"; 37210447Snilay@cs.wisc.edu ElectricalModel* demux = (ElectricalModel*) getSubInstance(demux_name); 37310447Snilay@cs.wisc.edu propagatePortTransitionInfo(demux, "In", "In"); 37410447Snilay@cs.wisc.edu propagatePortTransitionInfo(demux, "InCK", "InCK"); 37510447Snilay@cs.wisc.edu demux->use(); 37610447Snilay@cs.wisc.edu 37710447Snilay@cs.wisc.edu propagatePortTransitionInfo("Out", demux, "Out"); 37810447Snilay@cs.wisc.edu } 37910447Snilay@cs.wisc.edu else 38010447Snilay@cs.wisc.edu { 38110447Snilay@cs.wisc.edu // Set output probability to be average that of probabilties of each output bit 38210447Snilay@cs.wisc.edu // Update all 1 bit deserializers 38310447Snilay@cs.wisc.edu for (unsigned int i = 0; i < input_bits; ++i) 38410447Snilay@cs.wisc.edu { 38510447Snilay@cs.wisc.edu const String& demux_name = "DemuxTree_" + (String) deserialization_ratio + "_to_1_bit" + (String) i; 38610447Snilay@cs.wisc.edu ElectricalModel* demux_bit = (ElectricalModel*) getSubInstance(demux_name); 38710447Snilay@cs.wisc.edu propagatePortTransitionInfo(demux_bit, "In", "In"); 38810447Snilay@cs.wisc.edu propagatePortTransitionInfo(demux_bit, "InCK", "InCK"); 38910447Snilay@cs.wisc.edu demux_bit->use(); 39010447Snilay@cs.wisc.edu 39110447Snilay@cs.wisc.edu propagatePortTransitionInfo("Out", demux_bit, "Out"); 39210447Snilay@cs.wisc.edu } 39310447Snilay@cs.wisc.edu } 39410447Snilay@cs.wisc.edu 39510447Snilay@cs.wisc.edu return; 39610447Snilay@cs.wisc.edu } 39710447Snilay@cs.wisc.edu 39810447Snilay@cs.wisc.edu} // namespace DSENT 39910447Snilay@cs.wisc.edu 400