ElectricalModel.h revision 10447
110447Snilay@cs.wisc.edu#ifndef __DSENT_MODEL_ELECTRICALMODEL_H__
210447Snilay@cs.wisc.edu#define __DSENT_MODEL_ELECTRICALMODEL_H__
310447Snilay@cs.wisc.edu
410447Snilay@cs.wisc.edu#include "util/CommonType.h"
510447Snilay@cs.wisc.edu#include "model/Model.h"
610447Snilay@cs.wisc.edu#include "model/TransitionInfo.h"
710447Snilay@cs.wisc.edu
810447Snilay@cs.wisc.edunamespace DSENT
910447Snilay@cs.wisc.edu{
1010447Snilay@cs.wisc.edu    class PortInfo;
1110447Snilay@cs.wisc.edu    class EventInfo;
1210447Snilay@cs.wisc.edu    class ElectricalDriver;
1310447Snilay@cs.wisc.edu    class ElectricalDriverMultiplier;
1410447Snilay@cs.wisc.edu    class ElectricalNet;
1510447Snilay@cs.wisc.edu    class ElectricalLoad;
1610447Snilay@cs.wisc.edu    class ElectricalDelay;
1710447Snilay@cs.wisc.edu
1810447Snilay@cs.wisc.edu    // A Net index consisting of a start and end index
1910447Snilay@cs.wisc.edu    typedef std::pair<int, int> NetIndex;
2010447Snilay@cs.wisc.edu
2110447Snilay@cs.wisc.edu    // Helper function to make net index
2210447Snilay@cs.wisc.edu    inline NetIndex makeNetIndex(int start_index_, int end_index_)
2310447Snilay@cs.wisc.edu    {
2410447Snilay@cs.wisc.edu        ASSERT((end_index_ >= start_index_), (String)"[Error] Invalid net index range " +
2510447Snilay@cs.wisc.edu
2610447Snilay@cs.wisc.edu                "[" + (String)start_index_ + ":" + (String)end_index_ + "]");
2710447Snilay@cs.wisc.edu
2810447Snilay@cs.wisc.edu        return NetIndex(start_index_, end_index_);
2910447Snilay@cs.wisc.edu    }
3010447Snilay@cs.wisc.edu
3110447Snilay@cs.wisc.edu    // Helper function to make net index
3210447Snilay@cs.wisc.edu    inline NetIndex makeNetIndex(int index_)
3310447Snilay@cs.wisc.edu    {
3410447Snilay@cs.wisc.edu        return makeNetIndex(index_, index_);
3510447Snilay@cs.wisc.edu    }
3610447Snilay@cs.wisc.edu
3710447Snilay@cs.wisc.edu    // Helper function to trun NetIndex to String
3810447Snilay@cs.wisc.edu    inline String toString(const NetIndex& net_index_)
3910447Snilay@cs.wisc.edu    {
4010447Snilay@cs.wisc.edu        return "[" + String(net_index_.second) + ":" + String(net_index_.first) + "]";
4110447Snilay@cs.wisc.edu    }
4210447Snilay@cs.wisc.edu
4310447Snilay@cs.wisc.edu    // ElectricalModel specifies physical connectivity to other models as well as the port
4410447Snilay@cs.wisc.edu    // parameters for the current model
4510447Snilay@cs.wisc.edu    class ElectricalModel : public Model
4610447Snilay@cs.wisc.edu    {
4710447Snilay@cs.wisc.edu        public:
4810447Snilay@cs.wisc.edu            ElectricalModel(const String& instance_name_, const TechModel* tech_model_);
4910447Snilay@cs.wisc.edu            virtual ~ElectricalModel();
5010447Snilay@cs.wisc.edu
5110447Snilay@cs.wisc.edu        public:
5210447Snilay@cs.wisc.edu            // Check if all properties needed exist in the m_properties_
5310447Snilay@cs.wisc.edu            virtual void checkProperties() const;
5410447Snilay@cs.wisc.edu            // Set available driving strength vector from string
5510447Snilay@cs.wisc.edu            void setAvailableDrivingStrengths(const String& driving_strengths_);
5610447Snilay@cs.wisc.edu
5710447Snilay@cs.wisc.edu            //-----------------------------------------------------------------
5810447Snilay@cs.wisc.edu            // Connectivity specification
5910447Snilay@cs.wisc.edu            //-----------------------------------------------------------------
6010447Snilay@cs.wisc.edu            // Net Indices
6110447Snilay@cs.wisc.edu            const Map<NetIndex>* getNetReferences() const;
6210447Snilay@cs.wisc.edu            const NetIndex getNetReference(const String& name_) const;
6310447Snilay@cs.wisc.edu            // Input Ports
6410447Snilay@cs.wisc.edu            void createInputPort(const String& name_, const NetIndex& net_indices_ = NetIndex(0, 0));
6510447Snilay@cs.wisc.edu            const Map<PortInfo*>* getInputs() const;
6610447Snilay@cs.wisc.edu            PortInfo* getInputPort(const String& name_);
6710447Snilay@cs.wisc.edu            const PortInfo* getInputPort(const String& name_) const;
6810447Snilay@cs.wisc.edu            // Output Ports
6910447Snilay@cs.wisc.edu            void createOutputPort(const String& name_, const NetIndex& net_indices_ = NetIndex(0, 0));
7010447Snilay@cs.wisc.edu            const Map<PortInfo*>* getOutputs() const;
7110447Snilay@cs.wisc.edu            PortInfo* getOutputPort(const String& name_);
7210447Snilay@cs.wisc.edu            const PortInfo* getOutputPort(const String& name_) const;
7310447Snilay@cs.wisc.edu            // Electrical Nets
7410447Snilay@cs.wisc.edu            void createNet(const String& name_);
7510447Snilay@cs.wisc.edu            void createNet(const String& name_, const NetIndex& net_indices_);
7610447Snilay@cs.wisc.edu            const Map<ElectricalNet*>* getNets() const;
7710447Snilay@cs.wisc.edu            ElectricalNet* getNet(const String& name_);
7810447Snilay@cs.wisc.edu            ElectricalNet* getNet(const String& name_, const NetIndex& index_);
7910447Snilay@cs.wisc.edu
8010447Snilay@cs.wisc.edu            // Assign a net to be downstream from another net
8110447Snilay@cs.wisc.edu            // case 1: 'assign downstream_net_name_ = upstream_net_name_'
8210447Snilay@cs.wisc.edu            void assign(const String& downstream_net_name_, const String& upstream_net_name_);
8310447Snilay@cs.wisc.edu            // case 2: 'assign downstream_net_name_[end:begin] = upstream_net_name_'
8410447Snilay@cs.wisc.edu            void assign(const String& downstream_net_name_, const NetIndex& downstream_net_indices_, const String& upstream_net_name_);
8510447Snilay@cs.wisc.edu            // case 3: 'assign downstream_net_name_ = upstream_net_name_[end:begin]'
8610447Snilay@cs.wisc.edu            void assign(const String& downstream_net_name_, const String& upstream_net_name_, const NetIndex& upstream_net_indices_);
8710447Snilay@cs.wisc.edu            // case 4: 'assign downstream_net_name_[end:begin] = upstream_net_name_[end:begin]'
8810447Snilay@cs.wisc.edu            void assign(const String& downstream_net_name_, const NetIndex& downstream_net_indices_, const String& upstream_net_name_, const NetIndex& upstream_net_indices_);
8910447Snilay@cs.wisc.edu
9010447Snilay@cs.wisc.edu            // Connect a port (input or output) to some ElectricalNet
9110447Snilay@cs.wisc.edu            // case 1: .connect_port_name_(connect_net_name_)
9210447Snilay@cs.wisc.edu            void portConnect(ElectricalModel* connect_model_, const String& connect_port_name_, const String& connect_net_name_);
9310447Snilay@cs.wisc.edu            // case 2: .connect_port_name_(connect_net_name[end:begin])
9410447Snilay@cs.wisc.edu            void portConnect(ElectricalModel* connect_model_, const String& connect_port_name_, const String& connect_net_name_, const NetIndex& connect_net_indices_);
9510447Snilay@cs.wisc.edu
9610447Snilay@cs.wisc.edu            // Assign a net to be downstream from another net through a driver multipliers
9710447Snilay@cs.wisc.edu            void assignVirtualFanout(const String& downstream_net_name_, const String& upstream_net_name_);
9810447Snilay@cs.wisc.edu            void assignVirtualFanout(const String& downstream_net_name_, const NetIndex& downstream_net_indices_, const String& upstream_net_name_, const NetIndex& upstream_net_indices_);
9910447Snilay@cs.wisc.edu            // Assign a net to be downstream from another net
10010447Snilay@cs.wisc.edu            // This is used to enable bit_duplication
10110447Snilay@cs.wisc.edu            void assignVirtualFanin(const String& downstream_net_name_, const String& upstream_net_name_);
10210447Snilay@cs.wisc.edu            void assignVirtualFanin(const String& downstream_net_name_, const NetIndex& downstream_net_indices_, const String& upstream_net_name_, const NetIndex& upstream_net_indices_);
10310447Snilay@cs.wisc.edu            //-----------------------------------------------------------------
10410447Snilay@cs.wisc.edu
10510447Snilay@cs.wisc.edu            //-----------------------------------------------------------------
10610447Snilay@cs.wisc.edu            // Timing Model Components
10710447Snilay@cs.wisc.edu            //-----------------------------------------------------------------
10810447Snilay@cs.wisc.edu            // Electrical Drivers
10910447Snilay@cs.wisc.edu            void createDriver(const String& name_, bool sizable_);
11010447Snilay@cs.wisc.edu            //void createDriver(const String& name_, bool sizable_, int start_index_, int end_index_);
11110447Snilay@cs.wisc.edu            const Map<ElectricalDriver*>* getDrivers() const;
11210447Snilay@cs.wisc.edu            ElectricalDriver* getDriver(const String& name_);
11310447Snilay@cs.wisc.edu            // Electrical Driver Multipliers
11410447Snilay@cs.wisc.edu            void createDriverMultiplier(const String& name_);
11510447Snilay@cs.wisc.edu            const Map<ElectricalDriverMultiplier*>* getDriverMultipliers() const;
11610447Snilay@cs.wisc.edu            ElectricalDriverMultiplier* getDriverMultiplier(const String& name_);
11710447Snilay@cs.wisc.edu
11810447Snilay@cs.wisc.edu
11910447Snilay@cs.wisc.edu            // Electrical Loads
12010447Snilay@cs.wisc.edu            void createLoad(const String& name_);
12110447Snilay@cs.wisc.edu            //void createLoad(const String& name_, int start_index_, int end_index_);
12210447Snilay@cs.wisc.edu            const Map<ElectricalLoad*>* getLoads() const;
12310447Snilay@cs.wisc.edu            ElectricalLoad* getLoad(const String& name_);
12410447Snilay@cs.wisc.edu            // Electrical Delay creation
12510447Snilay@cs.wisc.edu            void createDelay(const String& name_);
12610447Snilay@cs.wisc.edu            //void createDelay(const String& name_, int start_index_, int end_index_);
12710447Snilay@cs.wisc.edu            const Map<ElectricalDelay*>* getDelays() const;
12810447Snilay@cs.wisc.edu            ElectricalDelay* getDelay(const String& name_);
12910447Snilay@cs.wisc.edu            //-----------------------------------------------------------------
13010447Snilay@cs.wisc.edu
13110447Snilay@cs.wisc.edu            // Get current driving strength
13210447Snilay@cs.wisc.edu            double getDrivingStrength() const;
13310447Snilay@cs.wisc.edu            // Get current driving strength index
13410447Snilay@cs.wisc.edu            int getDrivingStrengthIdx() const;
13510447Snilay@cs.wisc.edu            // Set driving strength by index
13610447Snilay@cs.wisc.edu            void setDrivingStrengthIdx(int idx_);
13710447Snilay@cs.wisc.edu            // Set the instance to minimum driving strength
13810447Snilay@cs.wisc.edu            void setMinDrivingStrength();
13910447Snilay@cs.wisc.edu            // Return true if the instance has minimum driving strength
14010447Snilay@cs.wisc.edu            bool hasMinDrivingStrength() const;
14110447Snilay@cs.wisc.edu            // Return true if the instance has maximum driving strength
14210447Snilay@cs.wisc.edu            bool hasMaxDrivingStrength() const;
14310447Snilay@cs.wisc.edu            // Increase driving strength index by 1
14410447Snilay@cs.wisc.edu            void increaseDrivingStrength();
14510447Snilay@cs.wisc.edu            // Decrease driving strength index by 1
14610447Snilay@cs.wisc.edu            void decreaseDrivingStrength();
14710447Snilay@cs.wisc.edu
14810447Snilay@cs.wisc.edu            // Create the default sets of the electrical results
14910447Snilay@cs.wisc.edu            void createElectricalResults();
15010447Snilay@cs.wisc.edu            // Add the default sets of the electrical results from a model
15110447Snilay@cs.wisc.edu            void addElectricalSubResults(const ElectricalModel* model_, double number_models_);
15210447Snilay@cs.wisc.edu            // Add extra wire sub results
15310447Snilay@cs.wisc.edu            void addElectricalWireSubResult(const String& wire_layer_, const Result* result_, const String& producer_, double number_results_);
15410447Snilay@cs.wisc.edu            // Create the default sets of the electrical atomic results
15510447Snilay@cs.wisc.edu            void createElectricalAtomicResults();
15610447Snilay@cs.wisc.edu            // Accumulate the electrical atomic results' values
15710447Snilay@cs.wisc.edu            void addElecticalAtomicResultValues(const ElectricalModel* model_, double number_models_);
15810447Snilay@cs.wisc.edu            // Add extra wire sub results
15910447Snilay@cs.wisc.edu            void addElecticalWireAtomicResultValue(const String& wire_layer_, double value_);
16010447Snilay@cs.wisc.edu            // Reset the electrical atomic results' values
16110447Snilay@cs.wisc.edu            void resetElectricalAtomicResults();
16210447Snilay@cs.wisc.edu            // Create an electrical event result. This will add an event associate to all input/output ports
16310447Snilay@cs.wisc.edu            void createElectricalEventResult(const String& name_);
16410447Snilay@cs.wisc.edu            // Create an electrical event atomic result
16510447Snilay@cs.wisc.edu            void createElectricalEventAtomicResult(const String& name_);
16610447Snilay@cs.wisc.edu
16710447Snilay@cs.wisc.edu            //-----------------------------------------------------------------
16810447Snilay@cs.wisc.edu            // Helper functions to propagate transition information
16910447Snilay@cs.wisc.edu            //-----------------------------------------------------------------
17010447Snilay@cs.wisc.edu            void assignPortTransitionInfo(ElectricalModel* downstream_model_, const String& downstream_port_name_, const TransitionInfo& trans_info_);
17110447Snilay@cs.wisc.edu            void propagatePortTransitionInfo(const String& downstream_port_name_, const String& upstream_port_name_);
17210447Snilay@cs.wisc.edu            void propagatePortTransitionInfo(ElectricalModel* downstream_model_, const String& downstream_port_name_, const String& upstream_port_name_);
17310447Snilay@cs.wisc.edu            void propagatePortTransitionInfo(ElectricalModel* downstream_model_, const String& downstream_port_name_, const ElectricalModel* upstream_model_, const String& upstream_port_name_);
17410447Snilay@cs.wisc.edu            void propagatePortTransitionInfo(const String& downstream_port_name_, const ElectricalModel* upstream_model_, const String& upstream_port_name_);
17510447Snilay@cs.wisc.edu            virtual void propagateTransitionInfo();
17610447Snilay@cs.wisc.edu            //-----------------------------------------------------------------
17710447Snilay@cs.wisc.edu
17810447Snilay@cs.wisc.edu            //-----------------------------------------------------------------
17910447Snilay@cs.wisc.edu            // Helper functions to insert and remove buffers
18010447Snilay@cs.wisc.edu            //-----------------------------------------------------------------
18110447Snilay@cs.wisc.edu
18210447Snilay@cs.wisc.edu            //-----------------------------------------------------------------
18310447Snilay@cs.wisc.edu
18410447Snilay@cs.wisc.edu            virtual void useModel(const String& event_name_);
18510447Snilay@cs.wisc.edu            virtual void useModel();
18610447Snilay@cs.wisc.edu            // TODO - add comments
18710447Snilay@cs.wisc.edu            void applyTransitionInfo(const String& event_name_);
18810447Snilay@cs.wisc.edu            // TODO - add comments
18910447Snilay@cs.wisc.edu            EventInfo* getEventInfo(const String& event_name_);
19010447Snilay@cs.wisc.edu
19110447Snilay@cs.wisc.edu        protected:
19210447Snilay@cs.wisc.edu            // In an ElectricalModel, the complete port-to-port connectivity
19310447Snilay@cs.wisc.edu            // of all sub-instance must be specified. Addition/Removal ports or
19410447Snilay@cs.wisc.edu            // port-related nets cannot happen after this step
19510447Snilay@cs.wisc.edu            //virtual void constructModel() = 0;
19610447Snilay@cs.wisc.edu            // In an ElectricalModel, updateModel MUST finish all necessary
19710447Snilay@cs.wisc.edu            // calculations such that a timing model can be run
19810447Snilay@cs.wisc.edu            //virtual void updateModel() = 0;
19910447Snilay@cs.wisc.edu            // In an ElectricalModel, evaluateModel should calculate all
20010447Snilay@cs.wisc.edu            // event energies, now that the connectivity and timing has been
20110447Snilay@cs.wisc.edu            // completed
20210447Snilay@cs.wisc.edu            //virtual void evaluateModel() = 0;
20310447Snilay@cs.wisc.edu
20410447Snilay@cs.wisc.edu        private:
20510447Snilay@cs.wisc.edu            // Private copy constructor. Use clone to perform copy operation.
20610447Snilay@cs.wisc.edu            ElectricalModel(const ElectricalModel& model_);
20710447Snilay@cs.wisc.edu
20810447Snilay@cs.wisc.edu        private:
20910447Snilay@cs.wisc.edu            // Contains the driving strengths in increasing order
21010447Snilay@cs.wisc.edu            vector<double> m_driving_strengths_;
21110447Snilay@cs.wisc.edu            // Driving strength index in the driving strength vector
21210447Snilay@cs.wisc.edu            int m_curr_driving_strengths_idx_;
21310447Snilay@cs.wisc.edu
21410447Snilay@cs.wisc.edu            //Connectivity elements
21510447Snilay@cs.wisc.edu            // Nets can come in various bus widths. A net reference is really
21610447Snilay@cs.wisc.edu            // just a helper map mapping a referenced map name to a bunch of
21710447Snilay@cs.wisc.edu            // net indices. A net index returns the starting and end indices of
21810447Snilay@cs.wisc.edu            // a net if the net is a multi-bit bus of some sort
21910447Snilay@cs.wisc.edu            Map<NetIndex>* m_net_references_;
22010447Snilay@cs.wisc.edu            // Map of the input ports
22110447Snilay@cs.wisc.edu            Map<PortInfo*>* m_input_ports_;
22210447Snilay@cs.wisc.edu            // Map of the output ports
22310447Snilay@cs.wisc.edu            Map<PortInfo*>* m_output_ports_;
22410447Snilay@cs.wisc.edu            // Map of all our electrical nets
22510447Snilay@cs.wisc.edu            Map<ElectricalNet*>* m_nets_;
22610447Snilay@cs.wisc.edu
22710447Snilay@cs.wisc.edu            //Timing model elements
22810447Snilay@cs.wisc.edu            // Map of all our electrical drivers
22910447Snilay@cs.wisc.edu            Map<ElectricalDriver*>* m_drivers_;
23010447Snilay@cs.wisc.edu            // Map of all our driver multipliers
23110447Snilay@cs.wisc.edu            Map<ElectricalDriverMultiplier*>* m_driver_multipliers_;
23210447Snilay@cs.wisc.edu            // Map of all our electrical loads
23310447Snilay@cs.wisc.edu            Map<ElectricalLoad*>* m_loads_;
23410447Snilay@cs.wisc.edu            // Map of all our idealized delays
23510447Snilay@cs.wisc.edu            Map<ElectricalDelay*>* m_delays_;
23610447Snilay@cs.wisc.edu
23710447Snilay@cs.wisc.edu            // Map of the event infos
23810447Snilay@cs.wisc.edu            Map<EventInfo*>* m_event_infos_;
23910447Snilay@cs.wisc.edu
24010447Snilay@cs.wisc.edu    }; // class ElectricalModel
24110447Snilay@cs.wisc.edu} // namespace DSENT
24210447Snilay@cs.wisc.edu
24310447Snilay@cs.wisc.edu#endif // __DSENT_MODEL_ELECTRICALMODEL_H__
24410447Snilay@cs.wisc.edu
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