CommandAnalysis.cc revision 11555
110428Sandreas.hansson@arm.com/* 210428Sandreas.hansson@arm.com * Copyright (c) 2012-2014, TU Delft 310428Sandreas.hansson@arm.com * Copyright (c) 2012-2014, TU Eindhoven 410428Sandreas.hansson@arm.com * Copyright (c) 2012-2014, TU Kaiserslautern 510428Sandreas.hansson@arm.com * All rights reserved. 610428Sandreas.hansson@arm.com * 710428Sandreas.hansson@arm.com * Redistribution and use in source and binary forms, with or without 810428Sandreas.hansson@arm.com * modification, are permitted provided that the following conditions are 910428Sandreas.hansson@arm.com * met: 1010428Sandreas.hansson@arm.com * 1110428Sandreas.hansson@arm.com * 1. Redistributions of source code must retain the above copyright 1210428Sandreas.hansson@arm.com * notice, this list of conditions and the following disclaimer. 1310428Sandreas.hansson@arm.com * 1410428Sandreas.hansson@arm.com * 2. Redistributions in binary form must reproduce the above copyright 1510428Sandreas.hansson@arm.com * notice, this list of conditions and the following disclaimer in the 1610428Sandreas.hansson@arm.com * documentation and/or other materials provided with the distribution. 1710428Sandreas.hansson@arm.com * 1810428Sandreas.hansson@arm.com * 3. Neither the name of the copyright holder nor the names of its 1910428Sandreas.hansson@arm.com * contributors may be used to endorse or promote products derived from 2010428Sandreas.hansson@arm.com * this software without specific prior written permission. 2110428Sandreas.hansson@arm.com * 2210428Sandreas.hansson@arm.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS 2310428Sandreas.hansson@arm.com * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 2410428Sandreas.hansson@arm.com * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A 2510428Sandreas.hansson@arm.com * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2610428Sandreas.hansson@arm.com * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2710428Sandreas.hansson@arm.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 2810428Sandreas.hansson@arm.com * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 2910428Sandreas.hansson@arm.com * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 3010428Sandreas.hansson@arm.com * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 3110428Sandreas.hansson@arm.com * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 3210428Sandreas.hansson@arm.com * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 3310428Sandreas.hansson@arm.com * 3410428Sandreas.hansson@arm.com * Authors: Karthik Chandrasekar, Matthias Jung, Omar Naji, Sven Goossens 3510428Sandreas.hansson@arm.com * 3610428Sandreas.hansson@arm.com */ 3710428Sandreas.hansson@arm.com 3810428Sandreas.hansson@arm.com#include <fstream> 3910428Sandreas.hansson@arm.com#include <algorithm> 4010428Sandreas.hansson@arm.com#include <sstream> 4110428Sandreas.hansson@arm.com 4210428Sandreas.hansson@arm.com#include "CommandAnalysis.h" 4310428Sandreas.hansson@arm.com#include "CmdScheduler.h" 4410428Sandreas.hansson@arm.com 4510428Sandreas.hansson@arm.comusing namespace Data; 4610428Sandreas.hansson@arm.comusing namespace std; 4710428Sandreas.hansson@arm.com 4811555Sjungma@eit.uni-kl.debool commandSorter(const MemCommand& i, const MemCommand& j) 4910428Sandreas.hansson@arm.com{ 5011555Sjungma@eit.uni-kl.de if (i.getTimeInt64() == j.getTimeInt64()) { 5111555Sjungma@eit.uni-kl.de return i.getType() == MemCommand::PRE && j.getType() != MemCommand::PRE; 5211555Sjungma@eit.uni-kl.de } else { 5311555Sjungma@eit.uni-kl.de return i.getTimeInt64() < j.getTimeInt64(); 5411555Sjungma@eit.uni-kl.de } 5510428Sandreas.hansson@arm.com} 5610428Sandreas.hansson@arm.com 5711555Sjungma@eit.uni-kl.deCommandAnalysis::CommandAnalysis(const int64_t nbrofBanks) 5810428Sandreas.hansson@arm.com{ 5910428Sandreas.hansson@arm.com // Initializing all counters and variables 6011555Sjungma@eit.uni-kl.de clearStats(0); 6111555Sjungma@eit.uni-kl.de zero = 0; 6211555Sjungma@eit.uni-kl.de 6311555Sjungma@eit.uni-kl.de bankstate.resize(static_cast<size_t>(nbrofBanks), 0); 6411555Sjungma@eit.uni-kl.de last_states.resize(static_cast<size_t>(nbrofBanks)); 6511555Sjungma@eit.uni-kl.de mem_state = 0; 6611555Sjungma@eit.uni-kl.de num_active_banks = 0; 6711555Sjungma@eit.uni-kl.de 6811555Sjungma@eit.uni-kl.de cmd_list.clear(); 6911555Sjungma@eit.uni-kl.de cached_cmd.clear(); 7011555Sjungma@eit.uni-kl.de activation_cycle.resize(static_cast<size_t>(nbrofBanks), 0); 7111555Sjungma@eit.uni-kl.de} 7211555Sjungma@eit.uni-kl.de 7311555Sjungma@eit.uni-kl.de// function to clear counters 7411555Sjungma@eit.uni-kl.devoid CommandAnalysis::clearStats(const int64_t timestamp) 7511555Sjungma@eit.uni-kl.de{ 7610428Sandreas.hansson@arm.com 7710428Sandreas.hansson@arm.com numberofacts = 0; 7810428Sandreas.hansson@arm.com numberofpres = 0; 7910428Sandreas.hansson@arm.com numberofreads = 0; 8010428Sandreas.hansson@arm.com numberofwrites = 0; 8110428Sandreas.hansson@arm.com numberofrefs = 0; 8210428Sandreas.hansson@arm.com f_act_pdns = 0; 8310428Sandreas.hansson@arm.com s_act_pdns = 0; 8410428Sandreas.hansson@arm.com f_pre_pdns = 0; 8510428Sandreas.hansson@arm.com s_pre_pdns = 0; 8610428Sandreas.hansson@arm.com numberofsrefs = 0; 8710428Sandreas.hansson@arm.com 8810428Sandreas.hansson@arm.com actcycles = 0; 8910428Sandreas.hansson@arm.com precycles = 0; 9010428Sandreas.hansson@arm.com f_act_pdcycles = 0; 9110428Sandreas.hansson@arm.com s_act_pdcycles = 0; 9210428Sandreas.hansson@arm.com f_pre_pdcycles = 0; 9310428Sandreas.hansson@arm.com s_pre_pdcycles = 0; 9410428Sandreas.hansson@arm.com pup_act_cycles = 0; 9510428Sandreas.hansson@arm.com pup_pre_cycles = 0; 9610428Sandreas.hansson@arm.com sref_cycles = 0; 9710428Sandreas.hansson@arm.com spup_cycles = 0; 9810428Sandreas.hansson@arm.com sref_ref_act_cycles = 0; 9910428Sandreas.hansson@arm.com sref_ref_pre_cycles = 0; 10010428Sandreas.hansson@arm.com spup_ref_act_cycles = 0; 10110428Sandreas.hansson@arm.com spup_ref_pre_cycles = 0; 10210428Sandreas.hansson@arm.com idlecycles_act = 0; 10310428Sandreas.hansson@arm.com idlecycles_pre = 0; 10410428Sandreas.hansson@arm.com 10511555Sjungma@eit.uni-kl.de // reset count references to timestamp so that they are moved 10611555Sjungma@eit.uni-kl.de // to start of next stats generation 10711555Sjungma@eit.uni-kl.de first_act_cycle = timestamp; 10811555Sjungma@eit.uni-kl.de last_pre_cycle = timestamp; 10911555Sjungma@eit.uni-kl.de pdn_cycle = timestamp; 11011555Sjungma@eit.uni-kl.de sref_cycle = timestamp; 11111555Sjungma@eit.uni-kl.de end_act_op = timestamp; 11211555Sjungma@eit.uni-kl.de end_read_op = timestamp; 11311555Sjungma@eit.uni-kl.de end_write_op = timestamp; 11411555Sjungma@eit.uni-kl.de 11510428Sandreas.hansson@arm.com latest_act_cycle = -1; 11610428Sandreas.hansson@arm.com latest_read_cycle = -1; 11710428Sandreas.hansson@arm.com latest_write_cycle = -1; 11810428Sandreas.hansson@arm.com 11911555Sjungma@eit.uni-kl.de if (timestamp == 0) { 12011555Sjungma@eit.uni-kl.de // set to -1 at beginning of simulation 12111555Sjungma@eit.uni-kl.de latest_pre_cycle = -1; 12211555Sjungma@eit.uni-kl.de } else { 12311555Sjungma@eit.uni-kl.de // NOTE: reference is adjusted by tRP (PRE delay) when updating counter 12411555Sjungma@eit.uni-kl.de // could remove tRP to ensure counter starts at beginning of next block; 12511555Sjungma@eit.uni-kl.de // currently simply setting to timestamp for simplicity 12611555Sjungma@eit.uni-kl.de latest_pre_cycle = timestamp; 12711555Sjungma@eit.uni-kl.de } 12810428Sandreas.hansson@arm.com} 12910428Sandreas.hansson@arm.com 13010428Sandreas.hansson@arm.com// function to clear all arrays 13110428Sandreas.hansson@arm.comvoid CommandAnalysis::clear() 13210428Sandreas.hansson@arm.com{ 13310428Sandreas.hansson@arm.com cached_cmd.clear(); 13410428Sandreas.hansson@arm.com cmd_list.clear(); 13510428Sandreas.hansson@arm.com last_states.clear(); 13610428Sandreas.hansson@arm.com bankstate.clear(); 13710428Sandreas.hansson@arm.com} 13810428Sandreas.hansson@arm.com 13910428Sandreas.hansson@arm.com// Reads through the trace file, identifies the timestamp, command and bank 14010428Sandreas.hansson@arm.com// If the issued command includes an auto-precharge, adds an explicit 14110428Sandreas.hansson@arm.com// precharge to a cached command list and computes the precharge offset from the 14210428Sandreas.hansson@arm.com// issued command timestamp, when the auto-precharge would kick in 14310428Sandreas.hansson@arm.com 14410428Sandreas.hansson@arm.comvoid CommandAnalysis::getCommands(const Data::MemorySpecification& memSpec, 14511555Sjungma@eit.uni-kl.de std::vector<MemCommand>& list, bool lastupdate) 14610428Sandreas.hansson@arm.com{ 14711555Sjungma@eit.uni-kl.de for (size_t i = 0; i < list.size(); ++i) { 14811555Sjungma@eit.uni-kl.de MemCommand& cmd = list[i]; 14910428Sandreas.hansson@arm.com MemCommand::cmds cmdType = cmd.getType(); 15010428Sandreas.hansson@arm.com if (cmdType == MemCommand::ACT) { 15110428Sandreas.hansson@arm.com activation_cycle[cmd.getBank()] = cmd.getTimeInt64(); 15210428Sandreas.hansson@arm.com } else if (cmdType == MemCommand::RDA || cmdType == MemCommand::WRA) { 15310428Sandreas.hansson@arm.com // Remove auto-precharge flag from command 15411555Sjungma@eit.uni-kl.de cmd.setType(cmd.typeWithoutAutoPrechargeFlag()); 15510428Sandreas.hansson@arm.com 15610428Sandreas.hansson@arm.com // Add the auto precharge to the list of cached_cmds 15710428Sandreas.hansson@arm.com int64_t preTime = max(cmd.getTimeInt64() + cmd.getPrechargeOffset(memSpec, cmdType), 15810428Sandreas.hansson@arm.com activation_cycle[cmd.getBank()] + memSpec.memTimingSpec.RAS); 15911555Sjungma@eit.uni-kl.de list.push_back(MemCommand(MemCommand::PRE, cmd.getBank(), preTime)); 16010428Sandreas.hansson@arm.com } 16110428Sandreas.hansson@arm.com } 16211555Sjungma@eit.uni-kl.de sort(list.begin(), list.end(), commandSorter); 16311555Sjungma@eit.uni-kl.de 16411555Sjungma@eit.uni-kl.de if (lastupdate && list.empty() == false) { 16511555Sjungma@eit.uni-kl.de // Add cycles at the end of the list 16611555Sjungma@eit.uni-kl.de int64_t t = timeToCompletion(memSpec, list.back().getType()) + list.back().getTimeInt64() - 1; 16711555Sjungma@eit.uni-kl.de list.push_back(MemCommand(MemCommand::NOP, 0, t)); 16811555Sjungma@eit.uni-kl.de } 16911555Sjungma@eit.uni-kl.de 17011555Sjungma@eit.uni-kl.de evaluate(memSpec, list); 17110428Sandreas.hansson@arm.com} // CommandAnalysis::getCommands 17210428Sandreas.hansson@arm.com 17310428Sandreas.hansson@arm.com 17410428Sandreas.hansson@arm.com// To get the time of completion of the issued command 17510428Sandreas.hansson@arm.com// Derived based on JEDEC specifications 17610428Sandreas.hansson@arm.com 17711555Sjungma@eit.uni-kl.deint64_t CommandAnalysis::timeToCompletion(const MemorySpecification& 17810428Sandreas.hansson@arm.com memSpec, MemCommand::cmds type) 17910428Sandreas.hansson@arm.com{ 18011555Sjungma@eit.uni-kl.de int64_t offset = 0; 18110428Sandreas.hansson@arm.com const MemTimingSpec& memTimingSpec = memSpec.memTimingSpec; 18210428Sandreas.hansson@arm.com const MemArchitectureSpec& memArchSpec = memSpec.memArchSpec; 18310428Sandreas.hansson@arm.com 18410428Sandreas.hansson@arm.com if (type == MemCommand::RD) { 18511555Sjungma@eit.uni-kl.de offset = memTimingSpec.RL + 18610428Sandreas.hansson@arm.com memTimingSpec.DQSCK + 1 + (memArchSpec.burstLength / 18711555Sjungma@eit.uni-kl.de memArchSpec.dataRate); 18810428Sandreas.hansson@arm.com } else if (type == MemCommand::WR) { 18911555Sjungma@eit.uni-kl.de offset = memTimingSpec.WL + 19010428Sandreas.hansson@arm.com (memArchSpec.burstLength / memArchSpec.dataRate) + 19111555Sjungma@eit.uni-kl.de memTimingSpec.WR; 19210428Sandreas.hansson@arm.com } else if (type == MemCommand::ACT) { 19311555Sjungma@eit.uni-kl.de offset = memTimingSpec.RCD; 19410428Sandreas.hansson@arm.com } else if ((type == MemCommand::PRE) || (type == MemCommand::PREA)) { 19511555Sjungma@eit.uni-kl.de offset = memTimingSpec.RP; 19610428Sandreas.hansson@arm.com } 19710428Sandreas.hansson@arm.com return offset; 19810428Sandreas.hansson@arm.com} // CommandAnalysis::timeToCompletion 19910428Sandreas.hansson@arm.com 20010428Sandreas.hansson@arm.com// Used to analyse a given list of commands and identify command timings 20110428Sandreas.hansson@arm.com// and memory state transitions 20210428Sandreas.hansson@arm.comvoid CommandAnalysis::evaluate(const MemorySpecification& memSpec, 20311555Sjungma@eit.uni-kl.de vector<MemCommand>& cmd_list) 20410428Sandreas.hansson@arm.com{ 20510428Sandreas.hansson@arm.com // for each command identify timestamp, type and bank 20611555Sjungma@eit.uni-kl.de for (auto cmd : cmd_list) { 20710428Sandreas.hansson@arm.com // For command type 20811555Sjungma@eit.uni-kl.de int type = cmd.getType(); 20910428Sandreas.hansson@arm.com // For command bank 21011555Sjungma@eit.uni-kl.de int bank = static_cast<int>(cmd.getBank()); 21110428Sandreas.hansson@arm.com // Command Issue timestamp in clock cycles (cc) 21211555Sjungma@eit.uni-kl.de int64_t timestamp = cmd.getTimeInt64(); 21310428Sandreas.hansson@arm.com 21410428Sandreas.hansson@arm.com if (type == MemCommand::ACT) { 21511555Sjungma@eit.uni-kl.de printWarningIfPoweredDown("Command issued while in power-down mode.", type, timestamp, bank); 21610428Sandreas.hansson@arm.com // If command is ACT - update number of acts, bank state of the 21710428Sandreas.hansson@arm.com // target bank, first and latest activation cycle and the memory 21810428Sandreas.hansson@arm.com // state. Update the number of precharged/idle-precharged cycles. 21910428Sandreas.hansson@arm.com numberofacts++; 22011555Sjungma@eit.uni-kl.de if (bankstate[static_cast<size_t>(bank)] == 1) { 22110428Sandreas.hansson@arm.com printWarning("Bank is already active!", type, timestamp, bank); 22210428Sandreas.hansson@arm.com } 22311555Sjungma@eit.uni-kl.de bankstate[static_cast<size_t>(bank)] = 1; 22411555Sjungma@eit.uni-kl.de if (num_active_banks == 0) { 22510428Sandreas.hansson@arm.com first_act_cycle = timestamp; 22610428Sandreas.hansson@arm.com precycles += max(zero, timestamp - last_pre_cycle); 22710428Sandreas.hansson@arm.com idle_pre_update(memSpec, timestamp, latest_pre_cycle); 22810428Sandreas.hansson@arm.com } 22910428Sandreas.hansson@arm.com latest_act_cycle = timestamp; 23011555Sjungma@eit.uni-kl.de num_active_banks++; 23110428Sandreas.hansson@arm.com } else if (type == MemCommand::RD) { 23211555Sjungma@eit.uni-kl.de printWarningIfPoweredDown("Command issued while in power-down mode.", type, timestamp, bank); 23310428Sandreas.hansson@arm.com // If command is RD - update number of reads and read cycle. Check 23410428Sandreas.hansson@arm.com // for active idle cycles (if any). 23511555Sjungma@eit.uni-kl.de if (bankstate[static_cast<size_t>(bank)] == 0) { 23610428Sandreas.hansson@arm.com printWarning("Bank is not active!", type, timestamp, bank); 23710428Sandreas.hansson@arm.com } 23810428Sandreas.hansson@arm.com numberofreads++; 23910428Sandreas.hansson@arm.com idle_act_update(memSpec, latest_read_cycle, latest_write_cycle, 24010428Sandreas.hansson@arm.com latest_act_cycle, timestamp); 24110428Sandreas.hansson@arm.com latest_read_cycle = timestamp; 24210428Sandreas.hansson@arm.com } else if (type == MemCommand::WR) { 24311555Sjungma@eit.uni-kl.de printWarningIfPoweredDown("Command issued while in power-down mode.", type, timestamp, bank); 24410428Sandreas.hansson@arm.com // If command is WR - update number of writes and write cycle. Check 24510428Sandreas.hansson@arm.com // for active idle cycles (if any). 24611555Sjungma@eit.uni-kl.de if (bankstate[static_cast<size_t>(bank)] == 0) { 24710428Sandreas.hansson@arm.com printWarning("Bank is not active!", type, timestamp, bank); 24810428Sandreas.hansson@arm.com } 24910428Sandreas.hansson@arm.com numberofwrites++; 25010428Sandreas.hansson@arm.com idle_act_update(memSpec, latest_read_cycle, latest_write_cycle, 25110428Sandreas.hansson@arm.com latest_act_cycle, timestamp); 25210428Sandreas.hansson@arm.com latest_write_cycle = timestamp; 25310428Sandreas.hansson@arm.com } else if (type == MemCommand::REF) { 25411555Sjungma@eit.uni-kl.de printWarningIfPoweredDown("Command issued while in power-down mode.", type, timestamp, bank); 25510428Sandreas.hansson@arm.com // If command is REF - update number of refreshes, set bank state of 25610428Sandreas.hansson@arm.com // all banks to ACT, set the last PRE cycles at RFC-RP cycles from 25710428Sandreas.hansson@arm.com // timestamp, set the number of active cycles to RFC-RP and check 25810428Sandreas.hansson@arm.com // for active and precharged cycles and idle active and idle 25910428Sandreas.hansson@arm.com // precharged cycles before refresh. Change memory state to 0. 26010428Sandreas.hansson@arm.com printWarningIfActive("One or more banks are active! REF requires all banks to be precharged.", type, timestamp, bank); 26110428Sandreas.hansson@arm.com numberofrefs++; 26210428Sandreas.hansson@arm.com idle_pre_update(memSpec, timestamp, latest_pre_cycle); 26310428Sandreas.hansson@arm.com first_act_cycle = timestamp; 26410428Sandreas.hansson@arm.com precycles += max(zero, timestamp - last_pre_cycle); 26510428Sandreas.hansson@arm.com last_pre_cycle = timestamp + memSpec.memTimingSpec.RFC - 26610428Sandreas.hansson@arm.com memSpec.memTimingSpec.RP; 26710428Sandreas.hansson@arm.com latest_pre_cycle = last_pre_cycle; 26810428Sandreas.hansson@arm.com actcycles += memSpec.memTimingSpec.RFC - memSpec.memTimingSpec.RP; 26911555Sjungma@eit.uni-kl.de num_active_banks = 0; 27011555Sjungma@eit.uni-kl.de for (auto& b : bankstate) { 27111555Sjungma@eit.uni-kl.de b = 0; 27210428Sandreas.hansson@arm.com } 27310428Sandreas.hansson@arm.com } else if (type == MemCommand::PRE) { 27411555Sjungma@eit.uni-kl.de printWarningIfPoweredDown("Command issued while in power-down mode.", type, timestamp, bank); 27510428Sandreas.hansson@arm.com // If command is explicit PRE - update number of precharges, bank 27610428Sandreas.hansson@arm.com // state of the target bank and last and latest precharge cycle. 27710428Sandreas.hansson@arm.com // Calculate the number of active cycles if the memory was in the 27810428Sandreas.hansson@arm.com // active state before, but there is a state transition to PRE now. 27910428Sandreas.hansson@arm.com // If not, update the number of precharged cycles and idle cycles. 28010428Sandreas.hansson@arm.com // Update memory state if needed. 28111555Sjungma@eit.uni-kl.de if (bankstate[static_cast<size_t>(bank)] == 1) { 28210428Sandreas.hansson@arm.com numberofpres++; 28310428Sandreas.hansson@arm.com } 28411555Sjungma@eit.uni-kl.de bankstate[static_cast<size_t>(bank)] = 0; 28510428Sandreas.hansson@arm.com 28611555Sjungma@eit.uni-kl.de if (num_active_banks == 1) { 28710428Sandreas.hansson@arm.com actcycles += max(zero, timestamp - first_act_cycle); 28810428Sandreas.hansson@arm.com last_pre_cycle = timestamp; 28910428Sandreas.hansson@arm.com idle_act_update(memSpec, latest_read_cycle, latest_write_cycle, 29010428Sandreas.hansson@arm.com latest_act_cycle, timestamp); 29111555Sjungma@eit.uni-kl.de } else if (num_active_banks == 0) { 29210428Sandreas.hansson@arm.com precycles += max(zero, timestamp - last_pre_cycle); 29310428Sandreas.hansson@arm.com idle_pre_update(memSpec, timestamp, latest_pre_cycle); 29410428Sandreas.hansson@arm.com last_pre_cycle = timestamp; 29510428Sandreas.hansson@arm.com } 29610428Sandreas.hansson@arm.com latest_pre_cycle = timestamp; 29711555Sjungma@eit.uni-kl.de if (num_active_banks > 0) { 29811555Sjungma@eit.uni-kl.de num_active_banks--; 29910428Sandreas.hansson@arm.com } else { 30011555Sjungma@eit.uni-kl.de num_active_banks = 0; 30110428Sandreas.hansson@arm.com } 30210428Sandreas.hansson@arm.com } else if (type == MemCommand::PREA) { 30311555Sjungma@eit.uni-kl.de printWarningIfPoweredDown("Command issued while in power-down mode.", type, timestamp, bank); 30410428Sandreas.hansson@arm.com // If command is explicit PREA (precharge all banks) - update 30510428Sandreas.hansson@arm.com // number of precharges by the number of banks, update the bank 30610428Sandreas.hansson@arm.com // state of all banks to PRE and set the precharge cycle. 30710428Sandreas.hansson@arm.com // Calculate the number of active cycles if the memory was in the 30810428Sandreas.hansson@arm.com // active state before, but there is a state transition to PRE now. 30910428Sandreas.hansson@arm.com // If not, update the number of precharged cycles and idle cycles. 31011555Sjungma@eit.uni-kl.de numberofpres += num_active_banks; 31110428Sandreas.hansson@arm.com 31211555Sjungma@eit.uni-kl.de if (num_active_banks > 0) { 31310428Sandreas.hansson@arm.com actcycles += max(zero, timestamp - first_act_cycle); 31410428Sandreas.hansson@arm.com idle_act_update(memSpec, latest_read_cycle, latest_write_cycle, 31510428Sandreas.hansson@arm.com latest_act_cycle, timestamp); 31611555Sjungma@eit.uni-kl.de } else if (num_active_banks == 0) { 31710428Sandreas.hansson@arm.com precycles += max(zero, timestamp - last_pre_cycle); 31810428Sandreas.hansson@arm.com idle_pre_update(memSpec, timestamp, latest_pre_cycle); 31910428Sandreas.hansson@arm.com } 32010428Sandreas.hansson@arm.com 32110428Sandreas.hansson@arm.com latest_pre_cycle = timestamp; 32210428Sandreas.hansson@arm.com last_pre_cycle = timestamp; 32310428Sandreas.hansson@arm.com 32411555Sjungma@eit.uni-kl.de num_active_banks = 0; 32510428Sandreas.hansson@arm.com 32611555Sjungma@eit.uni-kl.de for (auto& b : bankstate) { 32711555Sjungma@eit.uni-kl.de b = 0; 32810428Sandreas.hansson@arm.com } 32910428Sandreas.hansson@arm.com } else if (type == MemCommand::PDN_F_ACT) { 33010428Sandreas.hansson@arm.com // If command is fast-exit active power-down - update number of 33110428Sandreas.hansson@arm.com // power-downs, set the power-down cycle and the memory mode to 33210428Sandreas.hansson@arm.com // fast-exit active power-down. Save states of all the banks from 33310428Sandreas.hansson@arm.com // the cycle before entering active power-down, to be returned to 33410428Sandreas.hansson@arm.com // after powering-up. Update active and active idle cycles. 33510428Sandreas.hansson@arm.com printWarningIfNotActive("All banks are precharged! Incorrect use of Active Power-Down.", type, timestamp, bank); 33610428Sandreas.hansson@arm.com f_act_pdns++; 33711555Sjungma@eit.uni-kl.de last_states = bankstate; 33810428Sandreas.hansson@arm.com pdn_cycle = timestamp; 33910428Sandreas.hansson@arm.com actcycles += max(zero, timestamp - first_act_cycle); 34010428Sandreas.hansson@arm.com idle_act_update(memSpec, latest_read_cycle, latest_write_cycle, 34110428Sandreas.hansson@arm.com latest_act_cycle, timestamp); 34210428Sandreas.hansson@arm.com mem_state = CommandAnalysis::MS_PDN_F_ACT; 34310428Sandreas.hansson@arm.com } else if (type == MemCommand::PDN_S_ACT) { 34410428Sandreas.hansson@arm.com // If command is slow-exit active power-down - update number of 34510428Sandreas.hansson@arm.com // power-downs, set the power-down cycle and the memory mode to 34610428Sandreas.hansson@arm.com // slow-exit active power-down. Save states of all the banks from 34710428Sandreas.hansson@arm.com // the cycle before entering active power-down, to be returned to 34810428Sandreas.hansson@arm.com // after powering-up. Update active and active idle cycles. 34910428Sandreas.hansson@arm.com printWarningIfNotActive("All banks are precharged! Incorrect use of Active Power-Down.", type, timestamp, bank); 35010428Sandreas.hansson@arm.com s_act_pdns++; 35111555Sjungma@eit.uni-kl.de last_states = bankstate; 35210428Sandreas.hansson@arm.com pdn_cycle = timestamp; 35310428Sandreas.hansson@arm.com actcycles += max(zero, timestamp - first_act_cycle); 35410428Sandreas.hansson@arm.com idle_act_update(memSpec, latest_read_cycle, latest_write_cycle, 35510428Sandreas.hansson@arm.com latest_act_cycle, timestamp); 35610428Sandreas.hansson@arm.com mem_state = CommandAnalysis::MS_PDN_S_ACT; 35710428Sandreas.hansson@arm.com } else if (type == MemCommand::PDN_F_PRE) { 35810428Sandreas.hansson@arm.com // If command is fast-exit precharged power-down - update number of 35910428Sandreas.hansson@arm.com // power-downs, set the power-down cycle and the memory mode to 36010428Sandreas.hansson@arm.com // fast-exit precahrged power-down. Update precharged and precharged 36110428Sandreas.hansson@arm.com // idle cycles. 36210428Sandreas.hansson@arm.com printWarningIfActive("One or more banks are active! Incorrect use of Precharged Power-Down.", type, timestamp, bank); 36310428Sandreas.hansson@arm.com f_pre_pdns++; 36410428Sandreas.hansson@arm.com pdn_cycle = timestamp; 36510428Sandreas.hansson@arm.com precycles += max(zero, timestamp - last_pre_cycle); 36610428Sandreas.hansson@arm.com idle_pre_update(memSpec, timestamp, latest_pre_cycle); 36710428Sandreas.hansson@arm.com mem_state = CommandAnalysis::MS_PDN_F_PRE; 36810428Sandreas.hansson@arm.com } else if (type == MemCommand::PDN_S_PRE) { 36910428Sandreas.hansson@arm.com // If command is slow-exit precharged power-down - update number of 37010428Sandreas.hansson@arm.com // power-downs, set the power-down cycle and the memory mode to 37110428Sandreas.hansson@arm.com // slow-exit precahrged power-down. Update precharged and precharged 37210428Sandreas.hansson@arm.com // idle cycles. 37310428Sandreas.hansson@arm.com printWarningIfActive("One or more banks are active! Incorrect use of Precharged Power-Down.", type, timestamp, bank); 37410428Sandreas.hansson@arm.com s_pre_pdns++; 37510428Sandreas.hansson@arm.com pdn_cycle = timestamp; 37610428Sandreas.hansson@arm.com precycles += max(zero, timestamp - last_pre_cycle); 37710428Sandreas.hansson@arm.com idle_pre_update(memSpec, timestamp, latest_pre_cycle); 37810428Sandreas.hansson@arm.com mem_state = CommandAnalysis::MS_PDN_S_PRE; 37910428Sandreas.hansson@arm.com } else if (type == MemCommand::PUP_ACT) { 38010428Sandreas.hansson@arm.com // If command is power-up in the active mode - check the power-down 38110428Sandreas.hansson@arm.com // exit-mode employed (fast or slow), update the number of power-down 38210428Sandreas.hansson@arm.com // and power-up cycles and the latest and first act cycle. Also, reset 38310428Sandreas.hansson@arm.com // all the individual bank states to the respective saved states 38410428Sandreas.hansson@arm.com // before entering power-down. 38510428Sandreas.hansson@arm.com if (mem_state == CommandAnalysis::MS_PDN_F_ACT) { 38610428Sandreas.hansson@arm.com f_act_pdcycles += max(zero, timestamp - pdn_cycle); 38710428Sandreas.hansson@arm.com pup_act_cycles += memSpec.memTimingSpec.XP; 38810428Sandreas.hansson@arm.com latest_act_cycle = max(timestamp, timestamp + 38910428Sandreas.hansson@arm.com memSpec.memTimingSpec.XP - memSpec.memTimingSpec.RCD); 39010428Sandreas.hansson@arm.com } else if (mem_state == CommandAnalysis::MS_PDN_S_ACT) { 39110428Sandreas.hansson@arm.com s_act_pdcycles += max(zero, timestamp - pdn_cycle); 39210428Sandreas.hansson@arm.com if (memSpec.memArchSpec.dll == false) { 39310428Sandreas.hansson@arm.com pup_act_cycles += memSpec.memTimingSpec.XP; 39410428Sandreas.hansson@arm.com latest_act_cycle = max(timestamp, timestamp + 39510428Sandreas.hansson@arm.com memSpec.memTimingSpec.XP - memSpec.memTimingSpec.RCD); 39610428Sandreas.hansson@arm.com } else { 39710428Sandreas.hansson@arm.com pup_act_cycles += memSpec.memTimingSpec.XPDLL - 39810428Sandreas.hansson@arm.com memSpec.memTimingSpec.RCD; 39910428Sandreas.hansson@arm.com latest_act_cycle = max(timestamp, timestamp + 40010428Sandreas.hansson@arm.com memSpec.memTimingSpec.XPDLL - 40110428Sandreas.hansson@arm.com (2 * memSpec.memTimingSpec.RCD)); 40210428Sandreas.hansson@arm.com } 40311555Sjungma@eit.uni-kl.de } else if (mem_state != CommandAnalysis::MS_PDN_S_ACT || mem_state != CommandAnalysis::MS_PDN_F_ACT) { 40410428Sandreas.hansson@arm.com cerr << "Incorrect use of Active Power-Up!" << endl; 40510428Sandreas.hansson@arm.com } 40611555Sjungma@eit.uni-kl.de num_active_banks = 0; 40710428Sandreas.hansson@arm.com mem_state = 0; 40811555Sjungma@eit.uni-kl.de bankstate = last_states; 40911555Sjungma@eit.uni-kl.de for (auto& a : last_states) { 41011555Sjungma@eit.uni-kl.de num_active_banks += static_cast<unsigned int>(a); 41110428Sandreas.hansson@arm.com } 41210428Sandreas.hansson@arm.com first_act_cycle = timestamp; 41310428Sandreas.hansson@arm.com } else if (type == MemCommand::PUP_PRE) { 41410428Sandreas.hansson@arm.com // If command is power-up in the precharged mode - check the power-down 41510428Sandreas.hansson@arm.com // exit-mode employed (fast or slow), update the number of power-down 41610428Sandreas.hansson@arm.com // and power-up cycles and the latest and last pre cycle. 41710428Sandreas.hansson@arm.com if (mem_state == CommandAnalysis::MS_PDN_F_PRE) { 41810428Sandreas.hansson@arm.com f_pre_pdcycles += max(zero, timestamp - pdn_cycle); 41910428Sandreas.hansson@arm.com pup_pre_cycles += memSpec.memTimingSpec.XP; 42010428Sandreas.hansson@arm.com latest_pre_cycle = max(timestamp, timestamp + 42110428Sandreas.hansson@arm.com memSpec.memTimingSpec.XP - memSpec.memTimingSpec.RP); 42210428Sandreas.hansson@arm.com } else if (mem_state == CommandAnalysis::MS_PDN_S_PRE) { 42310428Sandreas.hansson@arm.com s_pre_pdcycles += max(zero, timestamp - pdn_cycle); 42410428Sandreas.hansson@arm.com if (memSpec.memArchSpec.dll == false) { 42510428Sandreas.hansson@arm.com pup_pre_cycles += memSpec.memTimingSpec.XP; 42610428Sandreas.hansson@arm.com latest_pre_cycle = max(timestamp, timestamp + 42710428Sandreas.hansson@arm.com memSpec.memTimingSpec.XP - memSpec.memTimingSpec.RP); 42810428Sandreas.hansson@arm.com } else { 42910428Sandreas.hansson@arm.com pup_pre_cycles += memSpec.memTimingSpec.XPDLL - 43010428Sandreas.hansson@arm.com memSpec.memTimingSpec.RCD; 43110428Sandreas.hansson@arm.com latest_pre_cycle = max(timestamp, timestamp + 43210428Sandreas.hansson@arm.com memSpec.memTimingSpec.XPDLL - memSpec.memTimingSpec.RCD - 43310428Sandreas.hansson@arm.com memSpec.memTimingSpec.RP); 43410428Sandreas.hansson@arm.com } 43511555Sjungma@eit.uni-kl.de } else if (mem_state != CommandAnalysis::MS_PDN_S_PRE || mem_state != CommandAnalysis::MS_PDN_F_PRE) { 43610428Sandreas.hansson@arm.com cerr << "Incorrect use of Precharged Power-Up!" << endl; 43710428Sandreas.hansson@arm.com } 43810428Sandreas.hansson@arm.com mem_state = 0; 43911555Sjungma@eit.uni-kl.de num_active_banks = 0; 44010428Sandreas.hansson@arm.com last_pre_cycle = timestamp; 44110428Sandreas.hansson@arm.com } else if (type == MemCommand::SREN) { 44210428Sandreas.hansson@arm.com // If command is self-refresh - update number of self-refreshes, 44310428Sandreas.hansson@arm.com // set memory state to SREF, update precharge and idle precharge 44410428Sandreas.hansson@arm.com // cycles and set the self-refresh cycle. 44510428Sandreas.hansson@arm.com printWarningIfActive("One or more banks are active! SREF requires all banks to be precharged.", type, timestamp, bank); 44610428Sandreas.hansson@arm.com numberofsrefs++; 44710428Sandreas.hansson@arm.com sref_cycle = timestamp; 44810428Sandreas.hansson@arm.com precycles += max(zero, timestamp - last_pre_cycle); 44910428Sandreas.hansson@arm.com idle_pre_update(memSpec, timestamp, latest_pre_cycle); 45010428Sandreas.hansson@arm.com mem_state = CommandAnalysis::MS_SREF; 45110428Sandreas.hansson@arm.com } else if (type == MemCommand::SREX) { 45210428Sandreas.hansson@arm.com // If command is self-refresh exit - update the number of self-refresh 45310428Sandreas.hansson@arm.com // clock cycles, number of active and precharged auto-refresh clock 45410428Sandreas.hansson@arm.com // cycles during self-refresh and self-refresh exit based on the number 45510428Sandreas.hansson@arm.com // of cycles in the self-refresh mode and auto-refresh duration (RFC). 45610428Sandreas.hansson@arm.com // Set the last and latest precharge cycle accordingly and set the 45710428Sandreas.hansson@arm.com // memory state to 0. 45810428Sandreas.hansson@arm.com if (mem_state != CommandAnalysis::MS_SREF) { 45910428Sandreas.hansson@arm.com cerr << "Incorrect use of Self-Refresh Power-Up!" << endl; 46010428Sandreas.hansson@arm.com } 46110428Sandreas.hansson@arm.com if (max(zero, timestamp - sref_cycle) >= memSpec.memTimingSpec.RFC) { 46210428Sandreas.hansson@arm.com sref_cycles += max(zero, timestamp - sref_cycle 46310428Sandreas.hansson@arm.com - memSpec.memTimingSpec.RFC); 46410428Sandreas.hansson@arm.com sref_ref_act_cycles += memSpec.memTimingSpec.RFC - 46510428Sandreas.hansson@arm.com memSpec.memTimingSpec.RP; 46610428Sandreas.hansson@arm.com sref_ref_pre_cycles += memSpec.memTimingSpec.RP; 46710428Sandreas.hansson@arm.com last_pre_cycle = timestamp; 46810428Sandreas.hansson@arm.com if (memSpec.memArchSpec.dll == false) { 46910428Sandreas.hansson@arm.com spup_cycles += memSpec.memTimingSpec.XS; 47010428Sandreas.hansson@arm.com latest_pre_cycle = max(timestamp, timestamp + 47110428Sandreas.hansson@arm.com memSpec.memTimingSpec.XS - memSpec.memTimingSpec.RP); 47210428Sandreas.hansson@arm.com } else { 47310428Sandreas.hansson@arm.com spup_cycles += memSpec.memTimingSpec.XSDLL - 47410428Sandreas.hansson@arm.com memSpec.memTimingSpec.RCD; 47510428Sandreas.hansson@arm.com latest_pre_cycle = max(timestamp, timestamp + 47610428Sandreas.hansson@arm.com memSpec.memTimingSpec.XSDLL - memSpec.memTimingSpec.RCD 47710428Sandreas.hansson@arm.com - memSpec.memTimingSpec.RP); 47810428Sandreas.hansson@arm.com } 47910428Sandreas.hansson@arm.com } else { 48010428Sandreas.hansson@arm.com int64_t sref_diff = memSpec.memTimingSpec.RFC - memSpec.memTimingSpec.RP; 48110428Sandreas.hansson@arm.com int64_t sref_pre = max(zero, timestamp - sref_cycle - sref_diff); 48210428Sandreas.hansson@arm.com int64_t spup_pre = memSpec.memTimingSpec.RP - sref_pre; 48310428Sandreas.hansson@arm.com int64_t sref_act = max(zero, timestamp - sref_cycle); 48410428Sandreas.hansson@arm.com int64_t spup_act = memSpec.memTimingSpec.RFC - sref_act; 48510428Sandreas.hansson@arm.com 48610428Sandreas.hansson@arm.com if (max(zero, timestamp - sref_cycle) >= sref_diff) { 48710428Sandreas.hansson@arm.com sref_ref_act_cycles += sref_diff; 48810428Sandreas.hansson@arm.com sref_ref_pre_cycles += sref_pre; 48910428Sandreas.hansson@arm.com spup_ref_pre_cycles += spup_pre; 49010428Sandreas.hansson@arm.com last_pre_cycle = timestamp + spup_pre; 49110428Sandreas.hansson@arm.com if (memSpec.memArchSpec.dll == false) { 49210428Sandreas.hansson@arm.com spup_cycles += memSpec.memTimingSpec.XS - spup_pre; 49310428Sandreas.hansson@arm.com latest_pre_cycle = max(timestamp, timestamp + 49410428Sandreas.hansson@arm.com memSpec.memTimingSpec.XS - spup_pre - 49510428Sandreas.hansson@arm.com memSpec.memTimingSpec.RP); 49610428Sandreas.hansson@arm.com } else { 49710428Sandreas.hansson@arm.com spup_cycles += memSpec.memTimingSpec.XSDLL - 49810428Sandreas.hansson@arm.com memSpec.memTimingSpec.RCD - spup_pre; 49910428Sandreas.hansson@arm.com latest_pre_cycle = max(timestamp, timestamp + 50010428Sandreas.hansson@arm.com memSpec.memTimingSpec.XSDLL - memSpec.memTimingSpec.RCD - 50110428Sandreas.hansson@arm.com spup_pre - memSpec.memTimingSpec.RP); 50210428Sandreas.hansson@arm.com } 50310428Sandreas.hansson@arm.com } else { 50410428Sandreas.hansson@arm.com sref_ref_act_cycles += sref_act; 50510428Sandreas.hansson@arm.com spup_ref_act_cycles += spup_act; 50610428Sandreas.hansson@arm.com spup_ref_pre_cycles += memSpec.memTimingSpec.RP; 50710428Sandreas.hansson@arm.com last_pre_cycle = timestamp + spup_act + memSpec.memTimingSpec.RP; 50810428Sandreas.hansson@arm.com if (memSpec.memArchSpec.dll == false) { 50910428Sandreas.hansson@arm.com spup_cycles += memSpec.memTimingSpec.XS - spup_act - 51010428Sandreas.hansson@arm.com memSpec.memTimingSpec.RP; 51110428Sandreas.hansson@arm.com latest_pre_cycle = max(timestamp, timestamp + 51210428Sandreas.hansson@arm.com memSpec.memTimingSpec.XS - spup_act - 51310428Sandreas.hansson@arm.com (2 * memSpec.memTimingSpec.RP)); 51410428Sandreas.hansson@arm.com } else { 51510428Sandreas.hansson@arm.com spup_cycles += memSpec.memTimingSpec.XSDLL - 51610428Sandreas.hansson@arm.com memSpec.memTimingSpec.RCD - spup_act - 51710428Sandreas.hansson@arm.com memSpec.memTimingSpec.RP; 51810428Sandreas.hansson@arm.com latest_pre_cycle = max(timestamp, timestamp + 51910428Sandreas.hansson@arm.com memSpec.memTimingSpec.XSDLL - memSpec.memTimingSpec.RCD - 52010428Sandreas.hansson@arm.com spup_act - (2 * memSpec.memTimingSpec.RP)); 52110428Sandreas.hansson@arm.com } 52210428Sandreas.hansson@arm.com } 52310428Sandreas.hansson@arm.com } 52410428Sandreas.hansson@arm.com mem_state = 0; 52511555Sjungma@eit.uni-kl.de num_active_banks = 0; 52611555Sjungma@eit.uni-kl.de } else if (type == MemCommand::END || type == MemCommand::NOP) { 52710428Sandreas.hansson@arm.com // May be optionally used at the end of memory trace for better accuracy 52810428Sandreas.hansson@arm.com // Update all counters based on completion of operations. 52911555Sjungma@eit.uni-kl.de if (num_active_banks > 0 && mem_state == 0) { 53010428Sandreas.hansson@arm.com actcycles += max(zero, timestamp - first_act_cycle); 53110428Sandreas.hansson@arm.com idle_act_update(memSpec, latest_read_cycle, latest_write_cycle, 53210428Sandreas.hansson@arm.com latest_act_cycle, timestamp); 53311555Sjungma@eit.uni-kl.de } else if (num_active_banks == 0 && mem_state == 0) { 53410428Sandreas.hansson@arm.com precycles += max(zero, timestamp - last_pre_cycle); 53510428Sandreas.hansson@arm.com idle_pre_update(memSpec, timestamp, latest_pre_cycle); 53610428Sandreas.hansson@arm.com } else if (mem_state == CommandAnalysis::MS_PDN_F_ACT) { 53710428Sandreas.hansson@arm.com f_act_pdcycles += max(zero, timestamp - pdn_cycle); 53810428Sandreas.hansson@arm.com } else if (mem_state == CommandAnalysis::MS_PDN_S_ACT) { 53910428Sandreas.hansson@arm.com s_act_pdcycles += max(zero, timestamp - pdn_cycle); 54010428Sandreas.hansson@arm.com } else if (mem_state == CommandAnalysis::MS_PDN_F_PRE) { 54110428Sandreas.hansson@arm.com f_pre_pdcycles += max(zero, timestamp - pdn_cycle); 54210428Sandreas.hansson@arm.com } else if (mem_state == CommandAnalysis::MS_PDN_S_PRE) { 54310428Sandreas.hansson@arm.com s_pre_pdcycles += max(zero, timestamp - pdn_cycle); 54410428Sandreas.hansson@arm.com } else if (mem_state == CommandAnalysis::MS_SREF) { 54510428Sandreas.hansson@arm.com sref_cycles += max(zero, timestamp - sref_cycle); 54610428Sandreas.hansson@arm.com } 54711555Sjungma@eit.uni-kl.de } else { 54811555Sjungma@eit.uni-kl.de printWarning("Unknown command given, exiting.", type, timestamp, bank); 54911555Sjungma@eit.uni-kl.de exit(-1); 55010428Sandreas.hansson@arm.com } 55110428Sandreas.hansson@arm.com } 55210428Sandreas.hansson@arm.com} // CommandAnalysis::evaluate 55310428Sandreas.hansson@arm.com 55410428Sandreas.hansson@arm.com// To update idle period information whenever active cycles may be idle 55510428Sandreas.hansson@arm.comvoid CommandAnalysis::idle_act_update(const MemorySpecification& memSpec, 55610428Sandreas.hansson@arm.com int64_t latest_read_cycle, int64_t latest_write_cycle, 55710428Sandreas.hansson@arm.com int64_t latest_act_cycle, int64_t timestamp) 55810428Sandreas.hansson@arm.com{ 55910428Sandreas.hansson@arm.com if (latest_read_cycle >= 0) { 56010428Sandreas.hansson@arm.com end_read_op = latest_read_cycle + timeToCompletion(memSpec, 56110428Sandreas.hansson@arm.com MemCommand::RD) - 1; 56210428Sandreas.hansson@arm.com } 56310428Sandreas.hansson@arm.com 56410428Sandreas.hansson@arm.com if (latest_write_cycle >= 0) { 56510428Sandreas.hansson@arm.com end_write_op = latest_write_cycle + timeToCompletion(memSpec, 56610428Sandreas.hansson@arm.com MemCommand::WR) - 1; 56710428Sandreas.hansson@arm.com } 56810428Sandreas.hansson@arm.com 56910428Sandreas.hansson@arm.com if (latest_act_cycle >= 0) { 57010428Sandreas.hansson@arm.com end_act_op = latest_act_cycle + timeToCompletion(memSpec, 57110428Sandreas.hansson@arm.com MemCommand::ACT) - 1; 57210428Sandreas.hansson@arm.com } 57310428Sandreas.hansson@arm.com 57410428Sandreas.hansson@arm.com idlecycles_act += max(zero, timestamp - max(max(end_read_op, end_write_op), 57510428Sandreas.hansson@arm.com end_act_op)); 57610428Sandreas.hansson@arm.com} // CommandAnalysis::idle_act_update 57710428Sandreas.hansson@arm.com 57810428Sandreas.hansson@arm.com// To update idle period information whenever precharged cycles may be idle 57910428Sandreas.hansson@arm.comvoid CommandAnalysis::idle_pre_update(const MemorySpecification& memSpec, 58010428Sandreas.hansson@arm.com int64_t timestamp, int64_t latest_pre_cycle) 58110428Sandreas.hansson@arm.com{ 58210428Sandreas.hansson@arm.com if (latest_pre_cycle > 0) { 58310428Sandreas.hansson@arm.com idlecycles_pre += max(zero, timestamp - latest_pre_cycle - 58410428Sandreas.hansson@arm.com memSpec.memTimingSpec.RP); 58510428Sandreas.hansson@arm.com } else if (latest_pre_cycle == 0) { 58610428Sandreas.hansson@arm.com idlecycles_pre += max(zero, timestamp - latest_pre_cycle); 58710428Sandreas.hansson@arm.com } 58810428Sandreas.hansson@arm.com} 58910428Sandreas.hansson@arm.com 59010428Sandreas.hansson@arm.comvoid CommandAnalysis::printWarningIfActive(const string& warning, int type, int64_t timestamp, int bank) 59110428Sandreas.hansson@arm.com{ 59211555Sjungma@eit.uni-kl.de if (num_active_banks != 0) { 59310428Sandreas.hansson@arm.com printWarning(warning, type, timestamp, bank); 59410428Sandreas.hansson@arm.com } 59510428Sandreas.hansson@arm.com} 59610428Sandreas.hansson@arm.com 59710428Sandreas.hansson@arm.comvoid CommandAnalysis::printWarningIfNotActive(const string& warning, int type, int64_t timestamp, int bank) 59810428Sandreas.hansson@arm.com{ 59911555Sjungma@eit.uni-kl.de if (num_active_banks == 0) { 60011555Sjungma@eit.uni-kl.de printWarning(warning, type, timestamp, bank); 60111555Sjungma@eit.uni-kl.de } 60211555Sjungma@eit.uni-kl.de} 60311555Sjungma@eit.uni-kl.de 60411555Sjungma@eit.uni-kl.devoid CommandAnalysis::printWarningIfPoweredDown(const string& warning, int type, int64_t timestamp, int bank) 60511555Sjungma@eit.uni-kl.de{ 60611555Sjungma@eit.uni-kl.de if (mem_state != 0) { 60710428Sandreas.hansson@arm.com printWarning(warning, type, timestamp, bank); 60810428Sandreas.hansson@arm.com } 60910428Sandreas.hansson@arm.com} 61010428Sandreas.hansson@arm.com 61110428Sandreas.hansson@arm.comvoid CommandAnalysis::printWarning(const string& warning, int type, int64_t timestamp, int bank) 61210428Sandreas.hansson@arm.com{ 61310428Sandreas.hansson@arm.com cerr << "WARNING: " << warning << endl; 61410428Sandreas.hansson@arm.com cerr << "Command: " << type << ", Timestamp: " << timestamp << 61510428Sandreas.hansson@arm.com ", Bank: " << bank << endl; 61610428Sandreas.hansson@arm.com} 617