Mesh_XY.py revision 13885
111663Stushar@ece.gatech.edu# Copyright (c) 2010 Advanced Micro Devices, Inc. 211663Stushar@ece.gatech.edu# 2016 Georgia Institute of Technology 311663Stushar@ece.gatech.edu# All rights reserved. 411663Stushar@ece.gatech.edu# 511663Stushar@ece.gatech.edu# Redistribution and use in source and binary forms, with or without 611663Stushar@ece.gatech.edu# modification, are permitted provided that the following conditions are 711663Stushar@ece.gatech.edu# met: redistributions of source code must retain the above copyright 811663Stushar@ece.gatech.edu# notice, this list of conditions and the following disclaimer; 911663Stushar@ece.gatech.edu# redistributions in binary form must reproduce the above copyright 1011663Stushar@ece.gatech.edu# notice, this list of conditions and the following disclaimer in the 1111663Stushar@ece.gatech.edu# documentation and/or other materials provided with the distribution; 1211663Stushar@ece.gatech.edu# neither the name of the copyright holders nor the names of its 1311663Stushar@ece.gatech.edu# contributors may be used to endorse or promote products derived from 1411663Stushar@ece.gatech.edu# this software without specific prior written permission. 1511663Stushar@ece.gatech.edu# 1611663Stushar@ece.gatech.edu# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 1711663Stushar@ece.gatech.edu# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 1811663Stushar@ece.gatech.edu# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 1911663Stushar@ece.gatech.edu# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2011663Stushar@ece.gatech.edu# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2111663Stushar@ece.gatech.edu# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 2211663Stushar@ece.gatech.edu# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2311663Stushar@ece.gatech.edu# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2411663Stushar@ece.gatech.edu# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2511663Stushar@ece.gatech.edu# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 2611663Stushar@ece.gatech.edu# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2711663Stushar@ece.gatech.edu# 2811663Stushar@ece.gatech.edu# Authors: Brad Beckmann 2911663Stushar@ece.gatech.edu# Tushar Krishna 3011663Stushar@ece.gatech.edu 3113774Sandreas.sandberg@arm.comfrom __future__ import print_function 3213774Sandreas.sandberg@arm.comfrom __future__ import absolute_import 3313774Sandreas.sandberg@arm.com 3411663Stushar@ece.gatech.edufrom m5.params import * 3511663Stushar@ece.gatech.edufrom m5.objects import * 3611663Stushar@ece.gatech.edu 3713885Sdavid.hashe@amd.comfrom common import FileSystemConfig 3813885Sdavid.hashe@amd.com 3913774Sandreas.sandberg@arm.comfrom .BaseTopology import SimpleTopology 4011663Stushar@ece.gatech.edu 4111663Stushar@ece.gatech.edu# Creates a generic Mesh assuming an equal number of cache 4211663Stushar@ece.gatech.edu# and directory controllers. 4311663Stushar@ece.gatech.edu# XY routing is enforced (using link weights) 4411663Stushar@ece.gatech.edu# to guarantee deadlock freedom. 4511663Stushar@ece.gatech.edu 4611663Stushar@ece.gatech.educlass Mesh_XY(SimpleTopology): 4711663Stushar@ece.gatech.edu description='Mesh_XY' 4811663Stushar@ece.gatech.edu 4911663Stushar@ece.gatech.edu def __init__(self, controllers): 5011663Stushar@ece.gatech.edu self.nodes = controllers 5111663Stushar@ece.gatech.edu 5211663Stushar@ece.gatech.edu # Makes a generic mesh 5311663Stushar@ece.gatech.edu # assuming an equal number of cache and directory cntrls 5411663Stushar@ece.gatech.edu 5511663Stushar@ece.gatech.edu def makeTopology(self, options, network, IntLink, ExtLink, Router): 5611663Stushar@ece.gatech.edu nodes = self.nodes 5711663Stushar@ece.gatech.edu 5811663Stushar@ece.gatech.edu num_routers = options.num_cpus 5911663Stushar@ece.gatech.edu num_rows = options.mesh_rows 6011663Stushar@ece.gatech.edu 6111666Stushar@ece.gatech.edu # default values for link latency and router latency. 6211666Stushar@ece.gatech.edu # Can be over-ridden on a per link/router basis 6311666Stushar@ece.gatech.edu link_latency = options.link_latency # used by simple and garnet 6411666Stushar@ece.gatech.edu router_latency = options.router_latency # only used by garnet 6511666Stushar@ece.gatech.edu 6611666Stushar@ece.gatech.edu 6711663Stushar@ece.gatech.edu # There must be an evenly divisible number of cntrls to routers 6811663Stushar@ece.gatech.edu # Also, obviously the number or rows must be <= the number of routers 6911663Stushar@ece.gatech.edu cntrls_per_router, remainder = divmod(len(nodes), num_routers) 7011666Stushar@ece.gatech.edu assert(num_rows > 0 and num_rows <= num_routers) 7111663Stushar@ece.gatech.edu num_columns = int(num_routers / num_rows) 7211663Stushar@ece.gatech.edu assert(num_columns * num_rows == num_routers) 7311663Stushar@ece.gatech.edu 7411663Stushar@ece.gatech.edu # Create the routers in the mesh 7511666Stushar@ece.gatech.edu routers = [Router(router_id=i, latency = router_latency) \ 7611666Stushar@ece.gatech.edu for i in range(num_routers)] 7711663Stushar@ece.gatech.edu network.routers = routers 7811663Stushar@ece.gatech.edu 7911663Stushar@ece.gatech.edu # link counter to set unique link ids 8011663Stushar@ece.gatech.edu link_count = 0 8111663Stushar@ece.gatech.edu 8211663Stushar@ece.gatech.edu # Add all but the remainder nodes to the list of nodes to be uniformly 8311663Stushar@ece.gatech.edu # distributed across the network. 8411663Stushar@ece.gatech.edu network_nodes = [] 8511663Stushar@ece.gatech.edu remainder_nodes = [] 8613731Sandreas.sandberg@arm.com for node_index in range(len(nodes)): 8711663Stushar@ece.gatech.edu if node_index < (len(nodes) - remainder): 8811663Stushar@ece.gatech.edu network_nodes.append(nodes[node_index]) 8911663Stushar@ece.gatech.edu else: 9011663Stushar@ece.gatech.edu remainder_nodes.append(nodes[node_index]) 9111663Stushar@ece.gatech.edu 9211663Stushar@ece.gatech.edu # Connect each node to the appropriate router 9311663Stushar@ece.gatech.edu ext_links = [] 9411663Stushar@ece.gatech.edu for (i, n) in enumerate(network_nodes): 9511663Stushar@ece.gatech.edu cntrl_level, router_id = divmod(i, num_routers) 9611663Stushar@ece.gatech.edu assert(cntrl_level < cntrls_per_router) 9711663Stushar@ece.gatech.edu ext_links.append(ExtLink(link_id=link_count, ext_node=n, 9811666Stushar@ece.gatech.edu int_node=routers[router_id], 9911666Stushar@ece.gatech.edu latency = link_latency)) 10011663Stushar@ece.gatech.edu link_count += 1 10111663Stushar@ece.gatech.edu 10211663Stushar@ece.gatech.edu # Connect the remainding nodes to router 0. These should only be 10311663Stushar@ece.gatech.edu # DMA nodes. 10411663Stushar@ece.gatech.edu for (i, node) in enumerate(remainder_nodes): 10511663Stushar@ece.gatech.edu assert(node.type == 'DMA_Controller') 10611663Stushar@ece.gatech.edu assert(i < remainder) 10711663Stushar@ece.gatech.edu ext_links.append(ExtLink(link_id=link_count, ext_node=node, 10811666Stushar@ece.gatech.edu int_node=routers[0], 10911666Stushar@ece.gatech.edu latency = link_latency)) 11011663Stushar@ece.gatech.edu link_count += 1 11111663Stushar@ece.gatech.edu 11211663Stushar@ece.gatech.edu network.ext_links = ext_links 11311663Stushar@ece.gatech.edu 11411663Stushar@ece.gatech.edu # Create the mesh links. 11511663Stushar@ece.gatech.edu int_links = [] 11611663Stushar@ece.gatech.edu 11711663Stushar@ece.gatech.edu # East output to West input links (weight = 1) 11813731Sandreas.sandberg@arm.com for row in range(num_rows): 11913731Sandreas.sandberg@arm.com for col in range(num_columns): 12011663Stushar@ece.gatech.edu if (col + 1 < num_columns): 12111663Stushar@ece.gatech.edu east_out = col + (row * num_columns) 12211663Stushar@ece.gatech.edu west_in = (col + 1) + (row * num_columns) 12311663Stushar@ece.gatech.edu int_links.append(IntLink(link_id=link_count, 12411663Stushar@ece.gatech.edu src_node=routers[east_out], 12511663Stushar@ece.gatech.edu dst_node=routers[west_in], 12611664Stushar@ece.gatech.edu src_outport="East", 12711664Stushar@ece.gatech.edu dst_inport="West", 12811666Stushar@ece.gatech.edu latency = link_latency, 12911663Stushar@ece.gatech.edu weight=1)) 13011663Stushar@ece.gatech.edu link_count += 1 13111663Stushar@ece.gatech.edu 13211663Stushar@ece.gatech.edu # West output to East input links (weight = 1) 13313731Sandreas.sandberg@arm.com for row in range(num_rows): 13413731Sandreas.sandberg@arm.com for col in range(num_columns): 13511663Stushar@ece.gatech.edu if (col + 1 < num_columns): 13611663Stushar@ece.gatech.edu east_in = col + (row * num_columns) 13711663Stushar@ece.gatech.edu west_out = (col + 1) + (row * num_columns) 13811663Stushar@ece.gatech.edu int_links.append(IntLink(link_id=link_count, 13911663Stushar@ece.gatech.edu src_node=routers[west_out], 14011663Stushar@ece.gatech.edu dst_node=routers[east_in], 14111664Stushar@ece.gatech.edu src_outport="West", 14211664Stushar@ece.gatech.edu dst_inport="East", 14311666Stushar@ece.gatech.edu latency = link_latency, 14411663Stushar@ece.gatech.edu weight=1)) 14511663Stushar@ece.gatech.edu link_count += 1 14611663Stushar@ece.gatech.edu 14711663Stushar@ece.gatech.edu # North output to South input links (weight = 2) 14813731Sandreas.sandberg@arm.com for col in range(num_columns): 14913731Sandreas.sandberg@arm.com for row in range(num_rows): 15011663Stushar@ece.gatech.edu if (row + 1 < num_rows): 15111663Stushar@ece.gatech.edu north_out = col + (row * num_columns) 15211663Stushar@ece.gatech.edu south_in = col + ((row + 1) * num_columns) 15311663Stushar@ece.gatech.edu int_links.append(IntLink(link_id=link_count, 15411663Stushar@ece.gatech.edu src_node=routers[north_out], 15511663Stushar@ece.gatech.edu dst_node=routers[south_in], 15611664Stushar@ece.gatech.edu src_outport="North", 15711664Stushar@ece.gatech.edu dst_inport="South", 15811666Stushar@ece.gatech.edu latency = link_latency, 15911663Stushar@ece.gatech.edu weight=2)) 16011663Stushar@ece.gatech.edu link_count += 1 16111663Stushar@ece.gatech.edu 16211663Stushar@ece.gatech.edu # South output to North input links (weight = 2) 16313731Sandreas.sandberg@arm.com for col in range(num_columns): 16413731Sandreas.sandberg@arm.com for row in range(num_rows): 16511663Stushar@ece.gatech.edu if (row + 1 < num_rows): 16611663Stushar@ece.gatech.edu north_in = col + (row * num_columns) 16711663Stushar@ece.gatech.edu south_out = col + ((row + 1) * num_columns) 16811663Stushar@ece.gatech.edu int_links.append(IntLink(link_id=link_count, 16911663Stushar@ece.gatech.edu src_node=routers[south_out], 17011663Stushar@ece.gatech.edu dst_node=routers[north_in], 17111664Stushar@ece.gatech.edu src_outport="South", 17211664Stushar@ece.gatech.edu dst_inport="North", 17311666Stushar@ece.gatech.edu latency = link_latency, 17411663Stushar@ece.gatech.edu weight=2)) 17511663Stushar@ece.gatech.edu link_count += 1 17611663Stushar@ece.gatech.edu 17711663Stushar@ece.gatech.edu 17811663Stushar@ece.gatech.edu network.int_links = int_links 17913885Sdavid.hashe@amd.com 18013885Sdavid.hashe@amd.com # Register nodes with filesystem 18113885Sdavid.hashe@amd.com def registerTopology(self, options): 18213885Sdavid.hashe@amd.com for i in xrange(options.num_cpus): 18313885Sdavid.hashe@amd.com FileSystemConfig.register_node([i], 18413885Sdavid.hashe@amd.com MemorySize(options.mem_size) / options.num_cpus, i) 185