Mesh_XY.py revision 13774
1# Copyright (c) 2010 Advanced Micro Devices, Inc. 2# 2016 Georgia Institute of Technology 3# All rights reserved. 4# 5# Redistribution and use in source and binary forms, with or without 6# modification, are permitted provided that the following conditions are 7# met: redistributions of source code must retain the above copyright 8# notice, this list of conditions and the following disclaimer; 9# redistributions in binary form must reproduce the above copyright 10# notice, this list of conditions and the following disclaimer in the 11# documentation and/or other materials provided with the distribution; 12# neither the name of the copyright holders nor the names of its 13# contributors may be used to endorse or promote products derived from 14# this software without specific prior written permission. 15# 16# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27# 28# Authors: Brad Beckmann 29# Tushar Krishna 30 31from __future__ import print_function 32from __future__ import absolute_import 33 34from m5.params import * 35from m5.objects import * 36 37from .BaseTopology import SimpleTopology 38 39# Creates a generic Mesh assuming an equal number of cache 40# and directory controllers. 41# XY routing is enforced (using link weights) 42# to guarantee deadlock freedom. 43 44class Mesh_XY(SimpleTopology): 45 description='Mesh_XY' 46 47 def __init__(self, controllers): 48 self.nodes = controllers 49 50 # Makes a generic mesh 51 # assuming an equal number of cache and directory cntrls 52 53 def makeTopology(self, options, network, IntLink, ExtLink, Router): 54 nodes = self.nodes 55 56 num_routers = options.num_cpus 57 num_rows = options.mesh_rows 58 59 # default values for link latency and router latency. 60 # Can be over-ridden on a per link/router basis 61 link_latency = options.link_latency # used by simple and garnet 62 router_latency = options.router_latency # only used by garnet 63 64 65 # There must be an evenly divisible number of cntrls to routers 66 # Also, obviously the number or rows must be <= the number of routers 67 cntrls_per_router, remainder = divmod(len(nodes), num_routers) 68 assert(num_rows > 0 and num_rows <= num_routers) 69 num_columns = int(num_routers / num_rows) 70 assert(num_columns * num_rows == num_routers) 71 72 # Create the routers in the mesh 73 routers = [Router(router_id=i, latency = router_latency) \ 74 for i in range(num_routers)] 75 network.routers = routers 76 77 # link counter to set unique link ids 78 link_count = 0 79 80 # Add all but the remainder nodes to the list of nodes to be uniformly 81 # distributed across the network. 82 network_nodes = [] 83 remainder_nodes = [] 84 for node_index in range(len(nodes)): 85 if node_index < (len(nodes) - remainder): 86 network_nodes.append(nodes[node_index]) 87 else: 88 remainder_nodes.append(nodes[node_index]) 89 90 # Connect each node to the appropriate router 91 ext_links = [] 92 for (i, n) in enumerate(network_nodes): 93 cntrl_level, router_id = divmod(i, num_routers) 94 assert(cntrl_level < cntrls_per_router) 95 ext_links.append(ExtLink(link_id=link_count, ext_node=n, 96 int_node=routers[router_id], 97 latency = link_latency)) 98 link_count += 1 99 100 # Connect the remainding nodes to router 0. These should only be 101 # DMA nodes. 102 for (i, node) in enumerate(remainder_nodes): 103 assert(node.type == 'DMA_Controller') 104 assert(i < remainder) 105 ext_links.append(ExtLink(link_id=link_count, ext_node=node, 106 int_node=routers[0], 107 latency = link_latency)) 108 link_count += 1 109 110 network.ext_links = ext_links 111 112 # Create the mesh links. 113 int_links = [] 114 115 # East output to West input links (weight = 1) 116 for row in range(num_rows): 117 for col in range(num_columns): 118 if (col + 1 < num_columns): 119 east_out = col + (row * num_columns) 120 west_in = (col + 1) + (row * num_columns) 121 int_links.append(IntLink(link_id=link_count, 122 src_node=routers[east_out], 123 dst_node=routers[west_in], 124 src_outport="East", 125 dst_inport="West", 126 latency = link_latency, 127 weight=1)) 128 link_count += 1 129 130 # West output to East input links (weight = 1) 131 for row in range(num_rows): 132 for col in range(num_columns): 133 if (col + 1 < num_columns): 134 east_in = col + (row * num_columns) 135 west_out = (col + 1) + (row * num_columns) 136 int_links.append(IntLink(link_id=link_count, 137 src_node=routers[west_out], 138 dst_node=routers[east_in], 139 src_outport="West", 140 dst_inport="East", 141 latency = link_latency, 142 weight=1)) 143 link_count += 1 144 145 # North output to South input links (weight = 2) 146 for col in range(num_columns): 147 for row in range(num_rows): 148 if (row + 1 < num_rows): 149 north_out = col + (row * num_columns) 150 south_in = col + ((row + 1) * num_columns) 151 int_links.append(IntLink(link_id=link_count, 152 src_node=routers[north_out], 153 dst_node=routers[south_in], 154 src_outport="North", 155 dst_inport="South", 156 latency = link_latency, 157 weight=2)) 158 link_count += 1 159 160 # South output to North input links (weight = 2) 161 for col in range(num_columns): 162 for row in range(num_rows): 163 if (row + 1 < num_rows): 164 north_in = col + (row * num_columns) 165 south_out = col + ((row + 1) * num_columns) 166 int_links.append(IntLink(link_id=link_count, 167 src_node=routers[south_out], 168 dst_node=routers[north_in], 169 src_outport="South", 170 dst_inport="North", 171 latency = link_latency, 172 weight=2)) 173 link_count += 1 174 175 176 network.int_links = int_links 177