MeshDirCorners_XY.py revision 11666:10d59d546ea2 
1# Copyright (c) 2010 Advanced Micro Devices, Inc.
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15# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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26#
27# Authors: Brad Beckmann
28
29from m5.params import *
30from m5.objects import *
31
32from BaseTopology import SimpleTopology
33
34# Creates a Mesh topology with 4 directories, one at each corner.
35# One L1 (and L2, depending on the protocol) are connected to each router.
36# XY routing is enforced (using link weights) to guarantee deadlock freedom.
37
38class MeshDirCorners_XY(SimpleTopology):
39    description='MeshDirCorners_XY'
40
41    def __init__(self, controllers):
42        self.nodes = controllers
43
44    def makeTopology(self, options, network, IntLink, ExtLink, Router):
45        nodes = self.nodes
46
47        num_routers = options.num_cpus
48        num_rows = options.mesh_rows
49
50        # default values for link latency and router latency.
51        # Can be over-ridden on a per link/router basis
52        link_latency = options.link_latency # used by simple and garnet
53        router_latency = options.router_latency # only used by garnet
54
55
56        # First determine which nodes are cache cntrls vs. dirs vs. dma
57        cache_nodes = []
58        dir_nodes = []
59        dma_nodes = []
60        for node in nodes:
61            if node.type == 'L1Cache_Controller' or \
62            node.type == 'L2Cache_Controller':
63                cache_nodes.append(node)
64            elif node.type == 'Directory_Controller':
65                dir_nodes.append(node)
66            elif node.type == 'DMA_Controller':
67                dma_nodes.append(node)
68
69        # Obviously the number or rows must be <= the number of routers
70        # and evenly divisible.  Also the number of caches must be a
71        # multiple of the number of routers and the number of directories
72        # must be four.
73        assert(num_rows > 0 and num_rows <= num_routers)
74        num_columns = int(num_routers / num_rows)
75        assert(num_columns * num_rows == num_routers)
76        caches_per_router, remainder = divmod(len(cache_nodes), num_routers)
77        assert(remainder == 0)
78        assert(len(dir_nodes) == 4)
79
80        # Create the routers in the mesh
81        routers = [Router(router_id=i, latency = router_latency) \
82            for i in range(num_routers)]
83        network.routers = routers
84
85        # link counter to set unique link ids
86        link_count = 0
87
88        # Connect each cache controller to the appropriate router
89        ext_links = []
90        for (i, n) in enumerate(cache_nodes):
91            cntrl_level, router_id = divmod(i, num_routers)
92            assert(cntrl_level < caches_per_router)
93            ext_links.append(ExtLink(link_id=link_count, ext_node=n,
94                                    int_node=routers[router_id],
95                                    latency = link_latency))
96            link_count += 1
97
98        # Connect the dir nodes to the corners.
99        ext_links.append(ExtLink(link_id=link_count, ext_node=dir_nodes[0],
100                                int_node=routers[0],
101                                latency = link_latency))
102        link_count += 1
103        ext_links.append(ExtLink(link_id=link_count, ext_node=dir_nodes[1],
104                                int_node=routers[num_columns - 1],
105                                latency = link_latency))
106        link_count += 1
107        ext_links.append(ExtLink(link_id=link_count, ext_node=dir_nodes[2],
108                                int_node=routers[num_routers - num_columns],
109                                latency = link_latency))
110        link_count += 1
111        ext_links.append(ExtLink(link_id=link_count, ext_node=dir_nodes[3],
112                                int_node=routers[num_routers - 1],
113                                latency = link_latency))
114        link_count += 1
115
116        # Connect the dma nodes to router 0.  These should only be DMA nodes.
117        for (i, node) in enumerate(dma_nodes):
118            assert(node.type == 'DMA_Controller')
119            ext_links.append(ExtLink(link_id=link_count, ext_node=node,
120                                     int_node=routers[0],
121                                     latency = link_latency))
122
123        network.ext_links = ext_links
124
125        # Create the mesh links.
126        int_links = []
127
128        # East output to West input links (weight = 1)
129        for row in xrange(num_rows):
130            for col in xrange(num_columns):
131                if (col + 1 < num_columns):
132                    east_out = col + (row * num_columns)
133                    west_in = (col + 1) + (row * num_columns)
134                    int_links.append(IntLink(link_id=link_count,
135                                             src_node=routers[east_out],
136                                             dst_node=routers[west_in],
137                                             src_outport="East",
138                                             dst_inport="West",
139                                             latency = link_latency,
140                                             weight=1))
141                    link_count += 1
142
143        # West output to East input links (weight = 1)
144        for row in xrange(num_rows):
145            for col in xrange(num_columns):
146                if (col + 1 < num_columns):
147                    east_in = col + (row * num_columns)
148                    west_out = (col + 1) + (row * num_columns)
149                    int_links.append(IntLink(link_id=link_count,
150                                             src_node=routers[west_out],
151                                             dst_node=routers[east_in],
152                                             src_outport="West",
153                                             dst_inport="East",
154                                             latency = link_latency,
155                                             weight=1))
156                    link_count += 1
157
158        # North output to South input links (weight = 2)
159        for col in xrange(num_columns):
160            for row in xrange(num_rows):
161                if (row + 1 < num_rows):
162                    north_out = col + (row * num_columns)
163                    south_in = col + ((row + 1) * num_columns)
164                    int_links.append(IntLink(link_id=link_count,
165                                             src_node=routers[north_out],
166                                             dst_node=routers[south_in],
167                                             src_outport="North",
168                                             dst_inport="South",
169                                             latency = link_latency,
170                                             weight=2))
171                    link_count += 1
172
173        # South output to North input links (weight = 2)
174        for col in xrange(num_columns):
175            for row in xrange(num_rows):
176                if (row + 1 < num_rows):
177                    north_in = col + (row * num_columns)
178                    south_out = col + ((row + 1) * num_columns)
179                    int_links.append(IntLink(link_id=link_count,
180                                             src_node=routers[south_out],
181                                             dst_node=routers[north_in],
182                                             src_outport="South",
183                                             dst_inport="North",
184                                             latency = link_latency,
185                                             weight=2))
186                    link_count += 1
187
188
189        network.int_links = int_links
190