cluster.py revision 4876
11689SN/A# Copyright (c) 2006-2007 The Regents of The University of Michigan 21689SN/A# All rights reserved. 31689SN/A# 41689SN/A# Redistribution and use in source and binary forms, with or without 51689SN/A# modification, are permitted provided that the following conditions are 61689SN/A# met: redistributions of source code must retain the above copyright 71689SN/A# notice, this list of conditions and the following disclaimer; 81689SN/A# redistributions in binary form must reproduce the above copyright 91689SN/A# notice, this list of conditions and the following disclaimer in the 101689SN/A# documentation and/or other materials provided with the distribution; 111689SN/A# neither the name of the copyright holders nor the names of its 121689SN/A# contributors may be used to endorse or promote products derived from 131689SN/A# this software without specific prior written permission. 141689SN/A# 151689SN/A# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 161689SN/A# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 171689SN/A# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 181689SN/A# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 191689SN/A# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 201689SN/A# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 211689SN/A# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 221689SN/A# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 231689SN/A# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 241689SN/A# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 251689SN/A# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 261689SN/A# 272665Ssaidi@eecs.umich.edu# Authors: Ron Dreslinski 282665Ssaidi@eecs.umich.edu 291689SN/A# Simple test script 301689SN/A# 311755SN/A# "m5 test.py" 321755SN/A 331060SN/Aimport m5 341858SN/Afrom m5.objects import * 351717SN/Aimport os, optparse, sys 361060SN/Am5.AddToPath('../common') 371061SN/A 381060SN/A# -------------------- 391060SN/A# Define Command Line Options 401060SN/A# ==================== 411060SN/A 421060SN/Aparser = optparse.OptionParser() 431060SN/A 441060SN/Aparser.add_option("-d", "--detailed", action="store_true") 451060SN/Aparser.add_option("-t", "--timing", action="store_true") 461060SN/Aparser.add_option("-m", "--maxtick", type="int") 471061SN/Aparser.add_option("-c", "--numclusters", 481060SN/A help="Number of clusters", type="int") 491060SN/Aparser.add_option("-n", "--numcpus", 501060SN/A help="Number of cpus in total", type="int") 511060SN/Aparser.add_option("-f", "--frequency", 521060SN/A default = "1GHz", 531061SN/A help="Frequency of each CPU") 541061SN/Aparser.add_option("--l1size", 551061SN/A default = "32kB") 561060SN/Aparser.add_option("--l1latency", 571060SN/A default = 1) 581061SN/Aparser.add_option("--l2size", 591060SN/A default = "256kB") 601060SN/Aparser.add_option("--l2latency", 611060SN/A default = 10) 621061SN/Aparser.add_option("--rootdir", 631060SN/A help="ROot directory of Splash2", 641060SN/A default="/dist/splash2/codes/") 651060SN/Aparser.add_option("-b", "--benchmark", 661061SN/A help="Splash 2 benchmark to run") 671061SN/A 681061SN/A(options, args) = parser.parse_args() 691061SN/A 701061SN/Aif args: 711061SN/A print "Error: script doesn't take any positional arguments" 721061SN/A sys.exit(1) 731061SN/A 741061SN/A# -------------------- 751061SN/A# Define Splash2 Benchmarks 761061SN/A# ==================== 771061SN/Aclass Cholesky(LiveProcess): 781061SN/A executable = options.rootdir + '/kernels/cholesky/CHOLESKY' 791061SN/A cmd = 'CHOLESKY -p' + str(options.numcpus) + ' '\ 801061SN/A + options.rootdir + '/kernels/cholesky/inputs/tk23.O' 811060SN/A 821060SN/Aclass FFT(LiveProcess): 831060SN/A executable = options.rootdir + 'kernels/fft/FFT' 841061SN/A cmd = 'FFT -p' + str(options.numcpus) + ' -m18' 851060SN/A 861060SN/Aclass LU_contig(LiveProcess): 871061SN/A executable = options.rootdir + 'kernels/lu/contiguous_blocks/LU' 881060SN/A cmd = 'LU -p' + str(options.numcpus) 891060SN/A 901060SN/Aclass LU_noncontig(LiveProcess): 911061SN/A executable = options.rootdir + 'kernels/lu/non_contiguous_blocks/LU' 921060SN/A cmd = 'LU -p' + str(options.numcpus) 931060SN/A 941060SN/Aclass Radix(LiveProcess): 951061SN/A executable = options.rootdir + 'kernels/radix/RADIX' 961060SN/A cmd = 'RADIX -n524288 -p' + str(options.numcpus) 971060SN/A 981061SN/Aclass Barnes(LiveProcess): 991060SN/A executable = options.rootdir + 'apps/barnes/BARNES' 1001061SN/A cmd = 'BARNES' 1011060SN/A input = options.rootdir + 'apps/barnes/input.p' + str(options.numcpus) 1021060SN/A 1031060SN/Aclass FMM(LiveProcess): 1041060SN/A executable = options.rootdir + 'apps/fmm/FMM' 1051060SN/A cmd = 'FMM' 1061060SN/A input = options.rootdir + 'apps/fmm/inputs/input.2048.p' + str(options.numcpus) 1071060SN/A 1081060SN/Aclass Ocean_contig(LiveProcess): 1091060SN/A executable = options.rootdir + 'apps/ocean/contiguous_partitions/OCEAN' 1101060SN/A cmd = 'OCEAN -p' + str(options.numcpus) 1111060SN/A 1121060SN/Aclass Ocean_noncontig(LiveProcess): 1131060SN/A executable = options.rootdir + 'apps/ocean/non_contiguous_partitions/OCEAN' 1141060SN/A cmd = 'OCEAN -p' + str(options.numcpus) 1151060SN/A 1161060SN/Aclass Raytrace(LiveProcess): 1171060SN/A executable = options.rootdir + 'apps/raytrace/RAYTRACE' 1181060SN/A cmd = 'RAYTRACE -p' + str(options.numcpus) + ' ' \ 1191061SN/A + options.rootdir + 'apps/raytrace/inputs/teapot.env' 1201060SN/A 1211060SN/Aclass Water_nsquared(LiveProcess): 1221060SN/A executable = options.rootdir + 'apps/water-nsquared/WATER-NSQUARED' 1231060SN/A cmd = 'WATER-NSQUARED' 1241060SN/A input = options.rootdir + 'apps/water-nsquared/input.p' + str(options.numcpus) 1251060SN/A 1261060SN/Aclass Water_spatial(LiveProcess): 1271060SN/A executable = options.rootdir + 'apps/water-spatial/WATER-SPATIAL' 1281060SN/A cmd = 'WATER-SPATIAL' 1291060SN/A input = options.rootdir + 'apps/water-spatial/input.p' + str(options.numcpus) 1301060SN/A 1311060SN/A 1321060SN/A# -------------------- 1331060SN/A# Base L1 Cache Definition 1341061SN/A# ==================== 1351060SN/A 1361060SN/Aclass L1(BaseCache): 1371060SN/A latency = options.l1latency 1381060SN/A block_size = 64 1391061SN/A mshrs = 12 1401060SN/A tgts_per_mshr = 8 1411060SN/A 1421681SN/A# ---------------------- 1431060SN/A# Base L2 Cache Definition 1441060SN/A# ---------------------- 1451060SN/A 1461060SN/Aclass L2(BaseCache): 1471060SN/A block_size = 64 1481060SN/A latency = options.l2latency 1491060SN/A mshrs = 92 1501060SN/A tgts_per_mshr = 16 1511060SN/A write_buffers = 8 1521060SN/A 1531060SN/A# ---------------------- 1541060SN/A# Define the clusters with their cpus 1551060SN/A# ---------------------- 1561060SN/Aclass Cluster: 1571060SN/A pass 1581681SN/A 1591681SN/AcpusPerCluster = options.numcpus/options.numclusters 1601681SN/A 1611060SN/AbusFrequency = Frequency(options.frequency) 1621060SN/AbusFrequency *= cpusPerCluster 1631060SN/A 1641060SN/Aall_cpus = [] 1651061SN/Aall_l1s = [] 1661060SN/Aall_l1buses = [] 1671060SN/Aif options.timing: 1681060SN/A clusters = [ Cluster() for i in xrange(options.numclusters)] 1691060SN/A for j in xrange(options.numclusters): 1701062SN/A clusters[j].id = j 1711060SN/A for cluster in clusters: 1721060SN/A cluster.clusterbus = Bus(clock=busFrequency) 1731060SN/A all_l1buses += [cluster.clusterbus] 1741060SN/A cluster.cpus = [TimingSimpleCPU(cpu_id = i + cluster.id, 1751060SN/A clock=options.frequency) 1761061SN/A for i in xrange(cpusPerCluster)] 1771060SN/A all_cpus += cluster.cpus 1781060SN/A cluster.l1 = L1(size=options.l1size, assoc = 4) 1791060SN/A all_l1s += [cluster.l1] 1801060SN/Aelif options.detailed: 1811060SN/A clusters = [ Cluster() for i in xrange(options.numclusters)] 1821060SN/A for j in xrange(options.numclusters): 1831060SN/A clusters[j].id = j 1841060SN/A for cluster in clusters: 1851061SN/A cluster.clusterbus = Bus(clock=busFrequency) 1861060SN/A all_l1buses += [cluster.clusterbus] 1871060SN/A cluster.cpus = [DerivO3CPU(cpu_id = i + cluster.id, 1881060SN/A clock=options.frequency) 1891060SN/A for i in xrange(cpusPerCluster)] 1901060SN/A all_cpus += cluster.cpus 1911060SN/A cluster.l1 = L1(size=options.l1size, assoc = 4) 1921060SN/A all_l1s += [cluster.l1] 1931060SN/Aelse: 1941060SN/A clusters = [ Cluster() for i in xrange(options.numclusters)] 1951060SN/A for j in xrange(options.numclusters): 1961060SN/A clusters[j].id = j 1971060SN/A for cluster in clusters: 1981060SN/A cluster.clusterbus = Bus(clock=busFrequency) 1991060SN/A all_l1buses += [cluster.clusterbus] 2001060SN/A cluster.cpus = [AtomicSimpleCPU(cpu_id = i + cluster.id, 2011060SN/A clock=options.frequency) 2021060SN/A for i in xrange(cpusPerCluster)] 2031060SN/A all_cpus += cluster.cpus 2041060SN/A cluster.l1 = L1(size=options.l1size, assoc = 4) 2051060SN/A all_l1s += [cluster.l1] 2061060SN/A 2071060SN/A# ---------------------- 2081060SN/A# Create a system, and add system wide objects 2091061SN/A# ---------------------- 2101061SN/Asystem = System(cpu = all_cpus, l1_ = all_l1s, l1bus_ = all_l1buses, physmem = PhysicalMemory(), 2111061SN/A membus = Bus(clock = busFrequency)) 2121061SN/A 2131061SN/Asystem.toL2bus = Bus(clock = busFrequency) 2141061SN/Asystem.l2 = L2(size = options.l2size, assoc = 8) 2151858SN/A 2161060SN/A# ---------------------- 2171060SN/A# Connect the L2 cache and memory together 2181060SN/A# ---------------------- 2191060SN/A 2201060SN/Asystem.physmem.port = system.membus.port 2211060SN/Asystem.l2.cpu_side = system.toL2bus.port 2221060SN/Asystem.l2.mem_side = system.membus.port 2231060SN/A 2241060SN/A# ---------------------- 2251060SN/A# Connect the L2 cache and clusters together 2261060SN/A# ---------------------- 2271060SN/Afor cluster in clusters: 2281060SN/A cluster.l1.cpu_side = cluster.clusterbus.port 2291060SN/A cluster.l1.mem_side = system.toL2bus.port 2301060SN/A for cpu in cluster.cpus: 2311060SN/A cpu.icache_port = cluster.clusterbus.port 2321060SN/A cpu.dcache_port = cluster.clusterbus.port 2331060SN/A cpu.mem = cluster.l1 2341060SN/A 2351060SN/A# ---------------------- 2361060SN/A# Define the root 2371060SN/A# ---------------------- 2381060SN/A 2391060SN/Aroot = Root(system = system) 2401060SN/A 2411060SN/A# -------------------- 2421060SN/A# Pick the correct Splash2 Benchmarks 2431061SN/A# ==================== 2441060SN/Aif options.benchmark == 'Cholesky': 2451060SN/A root.workload = Cholesky() 2461060SN/Aelif options.benchmark == 'FFT': 2471060SN/A root.workload = FFT() 2481060SN/Aelif options.benchmark == 'LUContig': 2491060SN/A root.workload = LU_contig() 2501060SN/Aelif options.benchmark == 'LUNoncontig': 2511060SN/A root.workload = LU_noncontig() 2521060SN/Aelif options.benchmark == 'Radix': 2531060SN/A root.workload = Radix() 2541060SN/Aelif options.benchmark == 'Barnes': 2551060SN/A root.workload = Barnes() 2561060SN/Aelif options.benchmark == 'FMM': 2571060SN/A root.workload = FMM() 2581060SN/Aelif options.benchmark == 'OceanContig': 2591061SN/A root.workload = Ocean_contig() 2601060SN/Aelif options.benchmark == 'OceanNoncontig': 2611060SN/A root.workload = Ocean_noncontig() 2621060SN/Aelif options.benchmark == 'Raytrace': 2631060SN/A root.workload = Raytrace() 2641060SN/Aelif options.benchmark == 'WaterNSquared': 2651061SN/A root.workload = Water_nsquared() 2661060SN/Aelif options.benchmark == 'WaterSpatial': 2671060SN/A root.workload = Water_spatial() 2681060SN/Aelse: 2691060SN/A panic("The --benchmark environment variable was set to something" \ 2701061SN/A +" improper.\nUse Cholesky, FFT, LUContig, LUNoncontig, Radix" \ 2711060SN/A +", Barnes, FMM, OceanContig,\nOceanNoncontig, Raytrace," \ 2721060SN/A +" WaterNSquared, or WaterSpatial\n") 2731060SN/A 2741060SN/A# -------------------- 2751060SN/A# Assign the workload to the cpus 2761061SN/A# ==================== 2771060SN/A 2781060SN/Afor cluster in clusters: 2791060SN/A for cpu in cluster.cpus: 2801060SN/A cpu.workload = root.workload 2811061SN/A 2821060SN/A# ---------------------- 2831060SN/A# Run the simulation 2841060SN/A# ---------------------- 2851060SN/A 2861060SN/Aif options.timing or options.detailed: 2871060SN/A root.system.mem_mode = 'timing' 2881061SN/A 2891060SN/A# instantiate configuration 2901060SN/Am5.instantiate(root) 2911060SN/A 2921060SN/A# simulate until program terminates 2931061SN/Aif options.maxtick: 2941060SN/A exit_event = m5.simulate(options.maxtick) 2951060SN/Aelse: 2961060SN/A exit_event = m5.simulate(m5.MaxTick) 2971060SN/A 2981060SN/Aprint 'Exiting @ tick', m5.curTick(), 'because', exit_event.getCause() 2991060SN/A 3001060SN/A