cluster.py revision 11851
14876Sstever@eecs.umich.edu# Copyright (c) 2006-2007 The Regents of The University of Michigan 23646Srdreslin@umich.edu# All rights reserved. 33646Srdreslin@umich.edu# 43646Srdreslin@umich.edu# Redistribution and use in source and binary forms, with or without 53646Srdreslin@umich.edu# modification, are permitted provided that the following conditions are 63646Srdreslin@umich.edu# met: redistributions of source code must retain the above copyright 73646Srdreslin@umich.edu# notice, this list of conditions and the following disclaimer; 83646Srdreslin@umich.edu# redistributions in binary form must reproduce the above copyright 93646Srdreslin@umich.edu# notice, this list of conditions and the following disclaimer in the 103646Srdreslin@umich.edu# documentation and/or other materials provided with the distribution; 113646Srdreslin@umich.edu# neither the name of the copyright holders nor the names of its 123646Srdreslin@umich.edu# contributors may be used to endorse or promote products derived from 133646Srdreslin@umich.edu# this software without specific prior written permission. 143646Srdreslin@umich.edu# 153646Srdreslin@umich.edu# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 163646Srdreslin@umich.edu# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 173646Srdreslin@umich.edu# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 183646Srdreslin@umich.edu# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 193646Srdreslin@umich.edu# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 203646Srdreslin@umich.edu# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 213646Srdreslin@umich.edu# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 223646Srdreslin@umich.edu# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 233646Srdreslin@umich.edu# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 243646Srdreslin@umich.edu# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 253646Srdreslin@umich.edu# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 263646Srdreslin@umich.edu# 273646Srdreslin@umich.edu# Authors: Ron Dreslinski 283646Srdreslin@umich.edu 293646Srdreslin@umich.edu# Simple test script 303646Srdreslin@umich.edu# 313646Srdreslin@umich.edu# "m5 test.py" 323646Srdreslin@umich.edu 336654Snate@binkert.orgimport os 346654Snate@binkert.orgimport optparse 356654Snate@binkert.orgimport sys 366654Snate@binkert.org 373646Srdreslin@umich.eduimport m5 383646Srdreslin@umich.edufrom m5.objects import * 396654Snate@binkert.org 403646Srdreslin@umich.edu# -------------------- 413646Srdreslin@umich.edu# Define Command Line Options 423646Srdreslin@umich.edu# ==================== 433646Srdreslin@umich.edu 443646Srdreslin@umich.eduparser = optparse.OptionParser() 453646Srdreslin@umich.edu 463646Srdreslin@umich.eduparser.add_option("-d", "--detailed", action="store_true") 473646Srdreslin@umich.eduparser.add_option("-t", "--timing", action="store_true") 483646Srdreslin@umich.eduparser.add_option("-m", "--maxtick", type="int") 493646Srdreslin@umich.eduparser.add_option("-c", "--numclusters", 503646Srdreslin@umich.edu help="Number of clusters", type="int") 513646Srdreslin@umich.eduparser.add_option("-n", "--numcpus", 523646Srdreslin@umich.edu help="Number of cpus in total", type="int") 533646Srdreslin@umich.eduparser.add_option("-f", "--frequency", 543646Srdreslin@umich.edu default = "1GHz", 553646Srdreslin@umich.edu help="Frequency of each CPU") 563646Srdreslin@umich.eduparser.add_option("--l1size", 573646Srdreslin@umich.edu default = "32kB") 583646Srdreslin@umich.eduparser.add_option("--l1latency", 593646Srdreslin@umich.edu default = 1) 603646Srdreslin@umich.eduparser.add_option("--l2size", 613646Srdreslin@umich.edu default = "256kB") 623646Srdreslin@umich.eduparser.add_option("--l2latency", 633646Srdreslin@umich.edu default = 10) 643646Srdreslin@umich.eduparser.add_option("--rootdir", 653646Srdreslin@umich.edu help="ROot directory of Splash2", 663646Srdreslin@umich.edu default="/dist/splash2/codes/") 673646Srdreslin@umich.eduparser.add_option("-b", "--benchmark", 683646Srdreslin@umich.edu help="Splash 2 benchmark to run") 693646Srdreslin@umich.edu 703646Srdreslin@umich.edu(options, args) = parser.parse_args() 713646Srdreslin@umich.edu 723646Srdreslin@umich.eduif args: 733646Srdreslin@umich.edu print "Error: script doesn't take any positional arguments" 743646Srdreslin@umich.edu sys.exit(1) 753646Srdreslin@umich.edu 763646Srdreslin@umich.edu# -------------------- 773646Srdreslin@umich.edu# Define Splash2 Benchmarks 783646Srdreslin@umich.edu# ==================== 7911851Sbrandon.potter@amd.comclass Cholesky(Process): 803646Srdreslin@umich.edu executable = options.rootdir + '/kernels/cholesky/CHOLESKY' 813646Srdreslin@umich.edu cmd = 'CHOLESKY -p' + str(options.numcpus) + ' '\ 823646Srdreslin@umich.edu + options.rootdir + '/kernels/cholesky/inputs/tk23.O' 833646Srdreslin@umich.edu 8411851Sbrandon.potter@amd.comclass FFT(Process): 853646Srdreslin@umich.edu executable = options.rootdir + 'kernels/fft/FFT' 863646Srdreslin@umich.edu cmd = 'FFT -p' + str(options.numcpus) + ' -m18' 873646Srdreslin@umich.edu 8811851Sbrandon.potter@amd.comclass LU_contig(Process): 893646Srdreslin@umich.edu executable = options.rootdir + 'kernels/lu/contiguous_blocks/LU' 903646Srdreslin@umich.edu cmd = 'LU -p' + str(options.numcpus) 913646Srdreslin@umich.edu 9211851Sbrandon.potter@amd.comclass LU_noncontig(Process): 933646Srdreslin@umich.edu executable = options.rootdir + 'kernels/lu/non_contiguous_blocks/LU' 943646Srdreslin@umich.edu cmd = 'LU -p' + str(options.numcpus) 953646Srdreslin@umich.edu 9611851Sbrandon.potter@amd.comclass Radix(Process): 973646Srdreslin@umich.edu executable = options.rootdir + 'kernels/radix/RADIX' 983646Srdreslin@umich.edu cmd = 'RADIX -n524288 -p' + str(options.numcpus) 993646Srdreslin@umich.edu 10011851Sbrandon.potter@amd.comclass Barnes(Process): 1013646Srdreslin@umich.edu executable = options.rootdir + 'apps/barnes/BARNES' 1023646Srdreslin@umich.edu cmd = 'BARNES' 1033646Srdreslin@umich.edu input = options.rootdir + 'apps/barnes/input.p' + str(options.numcpus) 1043646Srdreslin@umich.edu 10511851Sbrandon.potter@amd.comclass FMM(Process): 1063646Srdreslin@umich.edu executable = options.rootdir + 'apps/fmm/FMM' 1073646Srdreslin@umich.edu cmd = 'FMM' 1083646Srdreslin@umich.edu input = options.rootdir + 'apps/fmm/inputs/input.2048.p' + str(options.numcpus) 1093646Srdreslin@umich.edu 11011851Sbrandon.potter@amd.comclass Ocean_contig(Process): 1113646Srdreslin@umich.edu executable = options.rootdir + 'apps/ocean/contiguous_partitions/OCEAN' 1123646Srdreslin@umich.edu cmd = 'OCEAN -p' + str(options.numcpus) 1133646Srdreslin@umich.edu 11411851Sbrandon.potter@amd.comclass Ocean_noncontig(Process): 1153646Srdreslin@umich.edu executable = options.rootdir + 'apps/ocean/non_contiguous_partitions/OCEAN' 1163646Srdreslin@umich.edu cmd = 'OCEAN -p' + str(options.numcpus) 1173646Srdreslin@umich.edu 11811851Sbrandon.potter@amd.comclass Raytrace(Process): 1193646Srdreslin@umich.edu executable = options.rootdir + 'apps/raytrace/RAYTRACE' 1203646Srdreslin@umich.edu cmd = 'RAYTRACE -p' + str(options.numcpus) + ' ' \ 1213646Srdreslin@umich.edu + options.rootdir + 'apps/raytrace/inputs/teapot.env' 1223646Srdreslin@umich.edu 12311851Sbrandon.potter@amd.comclass Water_nsquared(Process): 1243646Srdreslin@umich.edu executable = options.rootdir + 'apps/water-nsquared/WATER-NSQUARED' 1253646Srdreslin@umich.edu cmd = 'WATER-NSQUARED' 1263646Srdreslin@umich.edu input = options.rootdir + 'apps/water-nsquared/input.p' + str(options.numcpus) 1273646Srdreslin@umich.edu 12811851Sbrandon.potter@amd.comclass Water_spatial(Process): 1293646Srdreslin@umich.edu executable = options.rootdir + 'apps/water-spatial/WATER-SPATIAL' 1303646Srdreslin@umich.edu cmd = 'WATER-SPATIAL' 1313646Srdreslin@umich.edu input = options.rootdir + 'apps/water-spatial/input.p' + str(options.numcpus) 1323646Srdreslin@umich.edu 1333646Srdreslin@umich.edu 1343646Srdreslin@umich.edu# -------------------- 1353646Srdreslin@umich.edu# Base L1 Cache Definition 1363646Srdreslin@umich.edu# ==================== 1373646Srdreslin@umich.edu 13811053Sandreas.hansson@arm.comclass L1(Cache): 1393646Srdreslin@umich.edu latency = options.l1latency 1403646Srdreslin@umich.edu mshrs = 12 1413646Srdreslin@umich.edu tgts_per_mshr = 8 1423646Srdreslin@umich.edu 1433646Srdreslin@umich.edu# ---------------------- 1443646Srdreslin@umich.edu# Base L2 Cache Definition 1453646Srdreslin@umich.edu# ---------------------- 1463646Srdreslin@umich.edu 14711053Sandreas.hansson@arm.comclass L2(Cache): 1483646Srdreslin@umich.edu latency = options.l2latency 1493646Srdreslin@umich.edu mshrs = 92 1503646Srdreslin@umich.edu tgts_per_mshr = 16 1513646Srdreslin@umich.edu write_buffers = 8 1523646Srdreslin@umich.edu 1533646Srdreslin@umich.edu# ---------------------- 1543646Srdreslin@umich.edu# Define the clusters with their cpus 1553646Srdreslin@umich.edu# ---------------------- 1563646Srdreslin@umich.educlass Cluster: 1573646Srdreslin@umich.edu pass 1583646Srdreslin@umich.edu 1593646Srdreslin@umich.educpusPerCluster = options.numcpus/options.numclusters 1603646Srdreslin@umich.edu 1613646Srdreslin@umich.edubusFrequency = Frequency(options.frequency) 1623646Srdreslin@umich.edubusFrequency *= cpusPerCluster 1633646Srdreslin@umich.edu 1643646Srdreslin@umich.eduall_cpus = [] 1653646Srdreslin@umich.eduall_l1s = [] 1663646Srdreslin@umich.eduall_l1buses = [] 1673646Srdreslin@umich.eduif options.timing: 1683646Srdreslin@umich.edu clusters = [ Cluster() for i in xrange(options.numclusters)] 1693646Srdreslin@umich.edu for j in xrange(options.numclusters): 1703646Srdreslin@umich.edu clusters[j].id = j 1713646Srdreslin@umich.edu for cluster in clusters: 17210720Sandreas.hansson@arm.com cluster.clusterbus = L2XBar(clock=busFrequency) 1733646Srdreslin@umich.edu all_l1buses += [cluster.clusterbus] 1743646Srdreslin@umich.edu cluster.cpus = [TimingSimpleCPU(cpu_id = i + cluster.id, 1753646Srdreslin@umich.edu clock=options.frequency) 1763646Srdreslin@umich.edu for i in xrange(cpusPerCluster)] 1773646Srdreslin@umich.edu all_cpus += cluster.cpus 1783646Srdreslin@umich.edu cluster.l1 = L1(size=options.l1size, assoc = 4) 1793646Srdreslin@umich.edu all_l1s += [cluster.l1] 1803646Srdreslin@umich.eduelif options.detailed: 1813646Srdreslin@umich.edu clusters = [ Cluster() for i in xrange(options.numclusters)] 1823646Srdreslin@umich.edu for j in xrange(options.numclusters): 1833646Srdreslin@umich.edu clusters[j].id = j 1843646Srdreslin@umich.edu for cluster in clusters: 18510720Sandreas.hansson@arm.com cluster.clusterbus = L2XBar(clock=busFrequency) 1863646Srdreslin@umich.edu all_l1buses += [cluster.clusterbus] 1873646Srdreslin@umich.edu cluster.cpus = [DerivO3CPU(cpu_id = i + cluster.id, 1883646Srdreslin@umich.edu clock=options.frequency) 1893646Srdreslin@umich.edu for i in xrange(cpusPerCluster)] 1903646Srdreslin@umich.edu all_cpus += cluster.cpus 1913646Srdreslin@umich.edu cluster.l1 = L1(size=options.l1size, assoc = 4) 1923646Srdreslin@umich.edu all_l1s += [cluster.l1] 1933646Srdreslin@umich.eduelse: 1943646Srdreslin@umich.edu clusters = [ Cluster() for i in xrange(options.numclusters)] 1953646Srdreslin@umich.edu for j in xrange(options.numclusters): 1963646Srdreslin@umich.edu clusters[j].id = j 1973646Srdreslin@umich.edu for cluster in clusters: 19810720Sandreas.hansson@arm.com cluster.clusterbus = L2XBar(clock=busFrequency) 1993646Srdreslin@umich.edu all_l1buses += [cluster.clusterbus] 2003646Srdreslin@umich.edu cluster.cpus = [AtomicSimpleCPU(cpu_id = i + cluster.id, 2013646Srdreslin@umich.edu clock=options.frequency) 2023646Srdreslin@umich.edu for i in xrange(cpusPerCluster)] 2033646Srdreslin@umich.edu all_cpus += cluster.cpus 2043646Srdreslin@umich.edu cluster.l1 = L1(size=options.l1size, assoc = 4) 2053646Srdreslin@umich.edu all_l1s += [cluster.l1] 2063646Srdreslin@umich.edu 2073646Srdreslin@umich.edu# ---------------------- 2083646Srdreslin@umich.edu# Create a system, and add system wide objects 2093646Srdreslin@umich.edu# ---------------------- 2108931Sandreas.hansson@arm.comsystem = System(cpu = all_cpus, l1_ = all_l1s, l1bus_ = all_l1buses, 2119036Sandreas.hansson@arm.com physmem = SimpleMemory(), 21210720Sandreas.hansson@arm.com membus = SystemXBar(clock = busFrequency)) 2139790Sakash.bagdia@arm.comsystem.clock = '1GHz' 2143646Srdreslin@umich.edu 21510720Sandreas.hansson@arm.comsystem.toL2bus = L2XBar(clock = busFrequency) 2163646Srdreslin@umich.edusystem.l2 = L2(size = options.l2size, assoc = 8) 2173646Srdreslin@umich.edu 2183646Srdreslin@umich.edu# ---------------------- 2193646Srdreslin@umich.edu# Connect the L2 cache and memory together 2203646Srdreslin@umich.edu# ---------------------- 2213646Srdreslin@umich.edu 2228847Sandreas.hansson@arm.comsystem.physmem.port = system.membus.master 2238847Sandreas.hansson@arm.comsystem.l2.cpu_side = system.toL2bus.slave 2248847Sandreas.hansson@arm.comsystem.l2.mem_side = system.membus.master 2253646Srdreslin@umich.edu 2263646Srdreslin@umich.edu# ---------------------- 2273646Srdreslin@umich.edu# Connect the L2 cache and clusters together 2283646Srdreslin@umich.edu# ---------------------- 2293646Srdreslin@umich.edufor cluster in clusters: 2308847Sandreas.hansson@arm.com cluster.l1.cpu_side = cluster.clusterbus.master 2318847Sandreas.hansson@arm.com cluster.l1.mem_side = system.toL2bus.slave 2323646Srdreslin@umich.edu for cpu in cluster.cpus: 2338847Sandreas.hansson@arm.com cpu.icache_port = cluster.clusterbus.slave 2348847Sandreas.hansson@arm.com cpu.dcache_port = cluster.clusterbus.slave 2353646Srdreslin@umich.edu 2363646Srdreslin@umich.edu# ---------------------- 2373646Srdreslin@umich.edu# Define the root 2383646Srdreslin@umich.edu# ---------------------- 2393646Srdreslin@umich.edu 2408801Sgblack@eecs.umich.eduroot = Root(full_system = False, system = system) 2413646Srdreslin@umich.edu 2423646Srdreslin@umich.edu# -------------------- 2433646Srdreslin@umich.edu# Pick the correct Splash2 Benchmarks 2443646Srdreslin@umich.edu# ==================== 2453646Srdreslin@umich.eduif options.benchmark == 'Cholesky': 2463646Srdreslin@umich.edu root.workload = Cholesky() 2473646Srdreslin@umich.eduelif options.benchmark == 'FFT': 2483646Srdreslin@umich.edu root.workload = FFT() 2493646Srdreslin@umich.eduelif options.benchmark == 'LUContig': 2503646Srdreslin@umich.edu root.workload = LU_contig() 2513646Srdreslin@umich.eduelif options.benchmark == 'LUNoncontig': 2523646Srdreslin@umich.edu root.workload = LU_noncontig() 2533646Srdreslin@umich.eduelif options.benchmark == 'Radix': 2543646Srdreslin@umich.edu root.workload = Radix() 2553646Srdreslin@umich.eduelif options.benchmark == 'Barnes': 2563646Srdreslin@umich.edu root.workload = Barnes() 2573646Srdreslin@umich.eduelif options.benchmark == 'FMM': 2583646Srdreslin@umich.edu root.workload = FMM() 2593646Srdreslin@umich.eduelif options.benchmark == 'OceanContig': 2603646Srdreslin@umich.edu root.workload = Ocean_contig() 2613646Srdreslin@umich.eduelif options.benchmark == 'OceanNoncontig': 2623646Srdreslin@umich.edu root.workload = Ocean_noncontig() 2633646Srdreslin@umich.eduelif options.benchmark == 'Raytrace': 2643646Srdreslin@umich.edu root.workload = Raytrace() 2653646Srdreslin@umich.eduelif options.benchmark == 'WaterNSquared': 2663646Srdreslin@umich.edu root.workload = Water_nsquared() 2673646Srdreslin@umich.eduelif options.benchmark == 'WaterSpatial': 2683646Srdreslin@umich.edu root.workload = Water_spatial() 2693646Srdreslin@umich.eduelse: 2706654Snate@binkert.org m5.util.panic(""" 2716654Snate@binkert.orgThe --benchmark environment variable was set to something improper. 2726654Snate@binkert.orgUse Cholesky, FFT, LUContig, LUNoncontig, Radix, Barnes, FMM, OceanContig, 2736654Snate@binkert.orgOceanNoncontig, Raytrace, WaterNSquared, or WaterSpatial 2746654Snate@binkert.org""") 2753646Srdreslin@umich.edu 2763646Srdreslin@umich.edu# -------------------- 2773646Srdreslin@umich.edu# Assign the workload to the cpus 2783646Srdreslin@umich.edu# ==================== 2793646Srdreslin@umich.edu 2803646Srdreslin@umich.edufor cluster in clusters: 2813646Srdreslin@umich.edu for cpu in cluster.cpus: 2823646Srdreslin@umich.edu cpu.workload = root.workload 2833646Srdreslin@umich.edu 2843646Srdreslin@umich.edu# ---------------------- 2853646Srdreslin@umich.edu# Run the simulation 2863646Srdreslin@umich.edu# ---------------------- 2873646Srdreslin@umich.edu 2883646Srdreslin@umich.eduif options.timing or options.detailed: 2893646Srdreslin@umich.edu root.system.mem_mode = 'timing' 2903646Srdreslin@umich.edu 2913646Srdreslin@umich.edu# instantiate configuration 2927525Ssteve.reinhardt@amd.comm5.instantiate() 2933646Srdreslin@umich.edu 2943646Srdreslin@umich.edu# simulate until program terminates 2953646Srdreslin@umich.eduif options.maxtick: 2963646Srdreslin@umich.edu exit_event = m5.simulate(options.maxtick) 2973646Srdreslin@umich.eduelse: 2983646Srdreslin@umich.edu exit_event = m5.simulate(m5.MaxTick) 2993646Srdreslin@umich.edu 3003646Srdreslin@umich.eduprint 'Exiting @ tick', m5.curTick(), 'because', exit_event.getCause() 3013646Srdreslin@umich.edu 302