Ruby.py revision 9791
14876Sstever@eecs.umich.edu# Copyright (c) 2012 ARM Limited
23646Srdreslin@umich.edu# All rights reserved.
33646Srdreslin@umich.edu#
43646Srdreslin@umich.edu# The license below extends only to copyright in the software and shall
53646Srdreslin@umich.edu# not be construed as granting a license to any other intellectual
63646Srdreslin@umich.edu# property including but not limited to intellectual property relating
73646Srdreslin@umich.edu# to a hardware implementation of the functionality of the software
83646Srdreslin@umich.edu# licensed hereunder.  You may use the software subject to the license
93646Srdreslin@umich.edu# terms below provided that you ensure that this notice is replicated
103646Srdreslin@umich.edu# unmodified and in its entirety in all distributions of the software,
113646Srdreslin@umich.edu# modified or unmodified, in source code or in binary form.
123646Srdreslin@umich.edu#
133646Srdreslin@umich.edu# Copyright (c) 2006-2007 The Regents of The University of Michigan
143646Srdreslin@umich.edu# Copyright (c) 2009 Advanced Micro Devices, Inc.
153646Srdreslin@umich.edu# All rights reserved.
163646Srdreslin@umich.edu#
173646Srdreslin@umich.edu# Redistribution and use in source and binary forms, with or without
183646Srdreslin@umich.edu# modification, are permitted provided that the following conditions are
193646Srdreslin@umich.edu# met: redistributions of source code must retain the above copyright
203646Srdreslin@umich.edu# notice, this list of conditions and the following disclaimer;
213646Srdreslin@umich.edu# redistributions in binary form must reproduce the above copyright
223646Srdreslin@umich.edu# notice, this list of conditions and the following disclaimer in the
233646Srdreslin@umich.edu# documentation and/or other materials provided with the distribution;
243646Srdreslin@umich.edu# neither the name of the copyright holders nor the names of its
253646Srdreslin@umich.edu# contributors may be used to endorse or promote products derived from
263646Srdreslin@umich.edu# this software without specific prior written permission.
273646Srdreslin@umich.edu#
283646Srdreslin@umich.edu# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
293646Srdreslin@umich.edu# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
303646Srdreslin@umich.edu# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
313646Srdreslin@umich.edu# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
323646Srdreslin@umich.edu# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
336654Snate@binkert.org# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
346654Snate@binkert.org# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
356654Snate@binkert.org# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
366654Snate@binkert.org# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
373646Srdreslin@umich.edu# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
383646Srdreslin@umich.edu# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
396654Snate@binkert.org#
406654Snate@binkert.org# Authors: Brad Beckmann
413646Srdreslin@umich.edu
423646Srdreslin@umich.eduimport math
433646Srdreslin@umich.eduimport m5
443646Srdreslin@umich.edufrom m5.objects import *
453646Srdreslin@umich.edufrom m5.defines import buildEnv
463646Srdreslin@umich.edu
473646Srdreslin@umich.edudef define_options(parser):
483646Srdreslin@umich.edu    # By default, ruby uses the simple timing cpu
493646Srdreslin@umich.edu    parser.set_defaults(cpu_type="timing")
503646Srdreslin@umich.edu
513646Srdreslin@umich.edu    parser.add_option("--ruby-clock", action="store", type="string",
523646Srdreslin@umich.edu                      default='2GHz',
533646Srdreslin@umich.edu                      help="Clock for blocks running at Ruby system's speed")
543646Srdreslin@umich.edu
553646Srdreslin@umich.edu    # ruby network options
563646Srdreslin@umich.edu    parser.add_option("--topology", type="string", default="Crossbar",
573646Srdreslin@umich.edu                 help="check src/mem/ruby/network/topologies for complete set")
583646Srdreslin@umich.edu    parser.add_option("--mesh-rows", type="int", default=1,
593646Srdreslin@umich.edu                      help="the number of rows in the mesh topology")
603646Srdreslin@umich.edu    parser.add_option("--garnet-network", type="choice",
613646Srdreslin@umich.edu                      choices=['fixed', 'flexible'], help="'fixed'|'flexible'")
623646Srdreslin@umich.edu    parser.add_option("--network-fault-model", action="store_true", default=False,
633646Srdreslin@umich.edu                      help="enable network fault model: see src/mem/ruby/network/fault_model/")
643646Srdreslin@umich.edu
653646Srdreslin@umich.edu    # ruby mapping options
663646Srdreslin@umich.edu    parser.add_option("--numa-high-bit", type="int", default=0,
673646Srdreslin@umich.edu                      help="high order address bit to use for numa mapping. " \
683646Srdreslin@umich.edu                           "0 = highest bit, not specified = lowest bit")
693646Srdreslin@umich.edu
703646Srdreslin@umich.edu    # ruby sparse memory options
713646Srdreslin@umich.edu    parser.add_option("--use-map", action="store_true", default=False)
723646Srdreslin@umich.edu    parser.add_option("--map-levels", type="int", default=4)
733646Srdreslin@umich.edu
743646Srdreslin@umich.edu    parser.add_option("--recycle-latency", type="int", default=10,
753646Srdreslin@umich.edu                      help="Recycle latency for ruby controller input buffers")
763646Srdreslin@umich.edu
773646Srdreslin@umich.edu    parser.add_option("--random_seed", type="int", default=1234,
783646Srdreslin@umich.edu                      help="Used for seeding the random number generator")
793646Srdreslin@umich.edu
803646Srdreslin@umich.edu    parser.add_option("--ruby_stats", type="string", default="ruby.stats")
813646Srdreslin@umich.edu
823646Srdreslin@umich.edu    protocol = buildEnv['PROTOCOL']
833646Srdreslin@umich.edu    exec "import %s" % protocol
843646Srdreslin@umich.edu    eval("%s.define_options(parser)" % protocol)
853646Srdreslin@umich.edu
863646Srdreslin@umich.edudef create_topology(controllers, options):
873646Srdreslin@umich.edu    """ Called from create_system in configs/ruby/<protocol>.py
883646Srdreslin@umich.edu        Must return an object which is a subclass of BaseTopology
893646Srdreslin@umich.edu        found in configs/topologies/BaseTopology.py
903646Srdreslin@umich.edu        This is a wrapper for the legacy topologies.
913646Srdreslin@umich.edu    """
923646Srdreslin@umich.edu    exec "import %s as Topo" % options.topology
933646Srdreslin@umich.edu    topology = eval("Topo.%s(controllers)" % options.topology)
943646Srdreslin@umich.edu    return topology
953646Srdreslin@umich.edu
963646Srdreslin@umich.edudef create_system(options, system, piobus = None, dma_ports = []):
973646Srdreslin@umich.edu
983646Srdreslin@umich.edu    system.ruby = RubySystem(clock = options.ruby_clock,
993646Srdreslin@umich.edu                             stats_filename = options.ruby_stats,
1003646Srdreslin@umich.edu                             no_mem_vec = options.use_map)
1013646Srdreslin@umich.edu    ruby = system.ruby
1023646Srdreslin@umich.edu
1033646Srdreslin@umich.edu    protocol = buildEnv['PROTOCOL']
1043646Srdreslin@umich.edu    exec "import %s" % protocol
1053646Srdreslin@umich.edu    try:
1063646Srdreslin@umich.edu        (cpu_sequencers, dir_cntrls, topology) = \
1073646Srdreslin@umich.edu             eval("%s.create_system(options, system, piobus, dma_ports, ruby)"
1083646Srdreslin@umich.edu                  % protocol)
1093646Srdreslin@umich.edu    except:
1103646Srdreslin@umich.edu        print "Error: could not create sytem for ruby protocol %s" % protocol
1113646Srdreslin@umich.edu        raise
1123646Srdreslin@umich.edu
1133646Srdreslin@umich.edu    # Create a port proxy for connecting the system port. This is
1143646Srdreslin@umich.edu    # independent of the protocol and kept in the protocol-agnostic
1153646Srdreslin@umich.edu    # part (i.e. here).
1163646Srdreslin@umich.edu    sys_port_proxy = RubyPortProxy(ruby_system = ruby)
1173646Srdreslin@umich.edu    # Give the system port proxy a SimObject parent without creating a
1183646Srdreslin@umich.edu    # full-fledged controller
1193646Srdreslin@umich.edu    system.sys_port_proxy = sys_port_proxy
1203646Srdreslin@umich.edu
1213646Srdreslin@umich.edu    # Connect the system port for loading of binaries etc
1223646Srdreslin@umich.edu    system.system_port = system.sys_port_proxy.slave
1233646Srdreslin@umich.edu
1243646Srdreslin@umich.edu
1253646Srdreslin@umich.edu    #
1263646Srdreslin@umich.edu    # Set the network classes based on the command line options
1273646Srdreslin@umich.edu    #
1283646Srdreslin@umich.edu    if options.garnet_network == "fixed":
1293646Srdreslin@umich.edu        class NetworkClass(GarnetNetwork_d): pass
1303646Srdreslin@umich.edu        class IntLinkClass(GarnetIntLink_d): pass
1313646Srdreslin@umich.edu        class ExtLinkClass(GarnetExtLink_d): pass
1323646Srdreslin@umich.edu        class RouterClass(GarnetRouter_d): pass
1333646Srdreslin@umich.edu    elif options.garnet_network == "flexible":
1343646Srdreslin@umich.edu        class NetworkClass(GarnetNetwork): pass
1353646Srdreslin@umich.edu        class IntLinkClass(GarnetIntLink): pass
1363646Srdreslin@umich.edu        class ExtLinkClass(GarnetExtLink): pass
1373646Srdreslin@umich.edu        class RouterClass(GarnetRouter): pass
1383646Srdreslin@umich.edu    else:
1393646Srdreslin@umich.edu        class NetworkClass(SimpleNetwork): pass
1403646Srdreslin@umich.edu        class IntLinkClass(SimpleIntLink): pass
1413646Srdreslin@umich.edu        class ExtLinkClass(SimpleExtLink): pass
1423646Srdreslin@umich.edu        class RouterClass(Switch): pass
1433646Srdreslin@umich.edu
1443646Srdreslin@umich.edu    #
1453646Srdreslin@umich.edu    # Important: the topology must be instantiated before the network and after
1463646Srdreslin@umich.edu    # the controllers. Hence the separation between topology definition and
1473646Srdreslin@umich.edu    # instantiation.
1483646Srdreslin@umich.edu    #
1493646Srdreslin@umich.edu
1503646Srdreslin@umich.edu    routers, int_links, ext_links = topology.makeTopology(options,
1513646Srdreslin@umich.edu                                    IntLinkClass, ExtLinkClass, RouterClass)
1523646Srdreslin@umich.edu    network = NetworkClass(ruby_system = ruby, routers = routers,
1533646Srdreslin@umich.edu                           int_links = int_links, ext_links = ext_links,
1543646Srdreslin@umich.edu                           topology = topology.description)
1553646Srdreslin@umich.edu
1563646Srdreslin@umich.edu    if options.network_fault_model:
1573646Srdreslin@umich.edu        assert(options.garnet_network == "fixed")
1583646Srdreslin@umich.edu        network.enable_fault_model = True
1593646Srdreslin@umich.edu        network.fault_model = FaultModel()
1603646Srdreslin@umich.edu
1613646Srdreslin@umich.edu    #
1623646Srdreslin@umich.edu    # Loop through the directory controlers.
1633646Srdreslin@umich.edu    # Determine the total memory size of the ruby system and verify it is equal
1643646Srdreslin@umich.edu    # to physmem.  However, if Ruby memory is using sparse memory in SE
1653646Srdreslin@umich.edu    # mode, then the system should not back-up the memory state with
1663646Srdreslin@umich.edu    # the Memory Vector and thus the memory size bytes should stay at 0.
1673646Srdreslin@umich.edu    # Also set the numa bits to the appropriate values.
1683646Srdreslin@umich.edu    #
1693646Srdreslin@umich.edu    total_mem_size = MemorySize('0B')
1703646Srdreslin@umich.edu
1713646Srdreslin@umich.edu    dir_bits = int(math.log(options.num_dirs, 2))
1723646Srdreslin@umich.edu    ruby.block_size_bytes = options.cacheline_size
1733646Srdreslin@umich.edu    block_size_bits = int(math.log(options.cacheline_size, 2))
1743646Srdreslin@umich.edu
1753646Srdreslin@umich.edu    if options.numa_high_bit:
1769036Sandreas.hansson@arm.com        numa_bit = options.numa_high_bit
1773646Srdreslin@umich.edu    else:
1783646Srdreslin@umich.edu        # if the numa_bit is not specified, set the directory bits as the
1793646Srdreslin@umich.edu        # lowest bits above the block offset bits, and the numa_bit as the
1803646Srdreslin@umich.edu        # highest of those directory bits
1813646Srdreslin@umich.edu        numa_bit = block_size_bits + dir_bits - 1
1823646Srdreslin@umich.edu
1833646Srdreslin@umich.edu    for dir_cntrl in dir_cntrls:
1843646Srdreslin@umich.edu        total_mem_size.value += dir_cntrl.directory.size.value
1853646Srdreslin@umich.edu        dir_cntrl.directory.numa_high_bit = numa_bit
1863646Srdreslin@umich.edu
1873646Srdreslin@umich.edu    phys_mem_size = sum(map(lambda mem: mem.range.size(),
1883646Srdreslin@umich.edu                            system.memories.unproxy(system)))
1899036Sandreas.hansson@arm.com    assert(total_mem_size.value == phys_mem_size)
1903646Srdreslin@umich.edu
1913646Srdreslin@umich.edu    ruby_profiler = RubyProfiler(ruby_system = ruby,
1923646Srdreslin@umich.edu                                 num_of_sequencers = len(cpu_sequencers))
1933646Srdreslin@umich.edu    ruby.network = network
1943646Srdreslin@umich.edu    ruby.profiler = ruby_profiler
1953646Srdreslin@umich.edu    ruby.mem_size = total_mem_size
1963646Srdreslin@umich.edu    ruby._cpu_ruby_ports = cpu_sequencers
1973646Srdreslin@umich.edu    ruby.random_seed    = options.random_seed
1983646Srdreslin@umich.edu