MOESI_CMP_token.py revision 7561
16908SBrad.Beckmann@amd.com# Copyright (c) 2006-2007 The Regents of The University of Michigan 26908SBrad.Beckmann@amd.com# Copyright (c) 2009 Advanced Micro Devices, Inc. 36908SBrad.Beckmann@amd.com# All rights reserved. 46908SBrad.Beckmann@amd.com# 56908SBrad.Beckmann@amd.com# Redistribution and use in source and binary forms, with or without 66908SBrad.Beckmann@amd.com# modification, are permitted provided that the following conditions are 76908SBrad.Beckmann@amd.com# met: redistributions of source code must retain the above copyright 86908SBrad.Beckmann@amd.com# notice, this list of conditions and the following disclaimer; 96908SBrad.Beckmann@amd.com# redistributions in binary form must reproduce the above copyright 106908SBrad.Beckmann@amd.com# notice, this list of conditions and the following disclaimer in the 116908SBrad.Beckmann@amd.com# documentation and/or other materials provided with the distribution; 126908SBrad.Beckmann@amd.com# neither the name of the copyright holders nor the names of its 136908SBrad.Beckmann@amd.com# contributors may be used to endorse or promote products derived from 146908SBrad.Beckmann@amd.com# this software without specific prior written permission. 156908SBrad.Beckmann@amd.com# 166908SBrad.Beckmann@amd.com# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 176908SBrad.Beckmann@amd.com# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 186908SBrad.Beckmann@amd.com# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 196908SBrad.Beckmann@amd.com# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 206908SBrad.Beckmann@amd.com# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 216908SBrad.Beckmann@amd.com# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 226908SBrad.Beckmann@amd.com# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 236908SBrad.Beckmann@amd.com# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 246908SBrad.Beckmann@amd.com# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 256908SBrad.Beckmann@amd.com# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 266908SBrad.Beckmann@amd.com# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 276908SBrad.Beckmann@amd.com# 286908SBrad.Beckmann@amd.com# Authors: Brad Beckmann 296908SBrad.Beckmann@amd.com 306908SBrad.Beckmann@amd.comimport math 316908SBrad.Beckmann@amd.comimport m5 326908SBrad.Beckmann@amd.comfrom m5.objects import * 336908SBrad.Beckmann@amd.comfrom m5.defines import buildEnv 346908SBrad.Beckmann@amd.com 356908SBrad.Beckmann@amd.com# 366908SBrad.Beckmann@amd.com# Note: the L1 Cache latency is only used by the sequencer on fast path hits 376908SBrad.Beckmann@amd.com# 386908SBrad.Beckmann@amd.comclass L1Cache(RubyCache): 397551SBrad.Beckmann@amd.com latency = 2 406908SBrad.Beckmann@amd.com 416908SBrad.Beckmann@amd.com# 426908SBrad.Beckmann@amd.com# Note: the L2 Cache latency is not currently used 436908SBrad.Beckmann@amd.com# 446908SBrad.Beckmann@amd.comclass L2Cache(RubyCache): 457551SBrad.Beckmann@amd.com latency = 10 466908SBrad.Beckmann@amd.com 477538SBrad.Beckmann@amd.comdef define_options(parser): 487539SBrad.Beckmann@amd.com parser.add_option("--l1-retries", type="int", default=1, 497539SBrad.Beckmann@amd.com help="Token_CMP: # of l1 retries before going persistent") 507539SBrad.Beckmann@amd.com parser.add_option("--timeout-latency", type="int", default=300, 517539SBrad.Beckmann@amd.com help="Token_CMP: cycles until issuing again"); 527539SBrad.Beckmann@amd.com parser.add_option("--disable-dyn-timeouts", action="store_true", 537539SBrad.Beckmann@amd.com help="Token_CMP: disable dyanimc timeouts, use fixed latency instead") 547561SBrad.Beckmann@amd.com parser.add_option("--allow-atomic-migration", action="store_true", 557561SBrad.Beckmann@amd.com help="allow migratory sharing for atomic only accessed blocks") 567561SBrad.Beckmann@amd.com 577541SBrad.Beckmann@amd.comdef create_system(options, system, piobus, dma_devices): 586908SBrad.Beckmann@amd.com 596908SBrad.Beckmann@amd.com if buildEnv['PROTOCOL'] != 'MOESI_CMP_token': 606908SBrad.Beckmann@amd.com panic("This script requires the MOESI_CMP_token protocol to be built.") 616908SBrad.Beckmann@amd.com 626908SBrad.Beckmann@amd.com # 636908SBrad.Beckmann@amd.com # number of tokens that the owner passes to requests so that shared blocks can 646908SBrad.Beckmann@amd.com # respond to read requests 656908SBrad.Beckmann@amd.com # 666908SBrad.Beckmann@amd.com n_tokens = options.num_cpus + 1 676908SBrad.Beckmann@amd.com 686908SBrad.Beckmann@amd.com cpu_sequencers = [] 696908SBrad.Beckmann@amd.com 706908SBrad.Beckmann@amd.com # 716908SBrad.Beckmann@amd.com # The ruby network creation expects the list of nodes in the system to be 726908SBrad.Beckmann@amd.com # consistent with the NetDest list. Therefore the l1 controller nodes must be 736908SBrad.Beckmann@amd.com # listed before the directory nodes and directory nodes before dma nodes, etc. 746908SBrad.Beckmann@amd.com # 756908SBrad.Beckmann@amd.com l1_cntrl_nodes = [] 766908SBrad.Beckmann@amd.com l2_cntrl_nodes = [] 776908SBrad.Beckmann@amd.com dir_cntrl_nodes = [] 786908SBrad.Beckmann@amd.com dma_cntrl_nodes = [] 796908SBrad.Beckmann@amd.com 806908SBrad.Beckmann@amd.com # 816908SBrad.Beckmann@amd.com # Must create the individual controllers before the network to ensure the 826908SBrad.Beckmann@amd.com # controller constructors are called before the network constructor 836908SBrad.Beckmann@amd.com # 846908SBrad.Beckmann@amd.com 856908SBrad.Beckmann@amd.com for i in xrange(options.num_cpus): 866908SBrad.Beckmann@amd.com # 876908SBrad.Beckmann@amd.com # First create the Ruby objects associated with this cpu 886908SBrad.Beckmann@amd.com # 896908SBrad.Beckmann@amd.com l1i_cache = L1Cache(size = options.l1i_size, 906908SBrad.Beckmann@amd.com assoc = options.l1i_assoc) 916908SBrad.Beckmann@amd.com l1d_cache = L1Cache(size = options.l1d_size, 926908SBrad.Beckmann@amd.com assoc = options.l1d_assoc) 936908SBrad.Beckmann@amd.com 947015SBrad.Beckmann@amd.com cpu_seq = RubySequencer(version = i, 957015SBrad.Beckmann@amd.com icache = l1i_cache, 966908SBrad.Beckmann@amd.com dcache = l1d_cache, 977541SBrad.Beckmann@amd.com physMemPort = system.physmem.port, 987541SBrad.Beckmann@amd.com physmem = system.physmem) 996908SBrad.Beckmann@amd.com 1006908SBrad.Beckmann@amd.com if piobus != None: 1016908SBrad.Beckmann@amd.com cpu_seq.pio_port = piobus.port 1026908SBrad.Beckmann@amd.com 1036908SBrad.Beckmann@amd.com l1_cntrl = L1Cache_Controller(version = i, 1046908SBrad.Beckmann@amd.com sequencer = cpu_seq, 1056908SBrad.Beckmann@amd.com L1IcacheMemory = l1i_cache, 1066908SBrad.Beckmann@amd.com L1DcacheMemory = l1d_cache, 1076908SBrad.Beckmann@amd.com l2_select_num_bits = \ 1087541SBrad.Beckmann@amd.com math.log(options.num_l2caches, 1097541SBrad.Beckmann@amd.com 2), 1107539SBrad.Beckmann@amd.com N_tokens = n_tokens, 1117541SBrad.Beckmann@amd.com retry_threshold = \ 1127541SBrad.Beckmann@amd.com options.l1_retries, 1137539SBrad.Beckmann@amd.com fixed_timeout_latency = \ 1147539SBrad.Beckmann@amd.com options.timeout_latency, 1157539SBrad.Beckmann@amd.com dynamic_timeout_enabled = \ 1167561SBrad.Beckmann@amd.com not options.disable_dyn_timeouts, 1177561SBrad.Beckmann@amd.com no_mig_atomic = not \ 1187561SBrad.Beckmann@amd.com options.allow_atomic_migration) 1197539SBrad.Beckmann@amd.com 1207541SBrad.Beckmann@amd.com exec("system.l1_cntrl%d = l1_cntrl" % i) 1216908SBrad.Beckmann@amd.com # 1226908SBrad.Beckmann@amd.com # Add controllers and sequencers to the appropriate lists 1236908SBrad.Beckmann@amd.com # 1246908SBrad.Beckmann@amd.com cpu_sequencers.append(cpu_seq) 1256908SBrad.Beckmann@amd.com l1_cntrl_nodes.append(l1_cntrl) 1266908SBrad.Beckmann@amd.com 1276908SBrad.Beckmann@amd.com for i in xrange(options.num_l2caches): 1286908SBrad.Beckmann@amd.com # 1296908SBrad.Beckmann@amd.com # First create the Ruby objects associated with this cpu 1306908SBrad.Beckmann@amd.com # 1316908SBrad.Beckmann@amd.com l2_cache = L2Cache(size = options.l2_size, 1326908SBrad.Beckmann@amd.com assoc = options.l2_assoc) 1336908SBrad.Beckmann@amd.com 1346908SBrad.Beckmann@amd.com l2_cntrl = L2Cache_Controller(version = i, 1356908SBrad.Beckmann@amd.com L2cacheMemory = l2_cache, 1366908SBrad.Beckmann@amd.com N_tokens = n_tokens) 1376908SBrad.Beckmann@amd.com 1387541SBrad.Beckmann@amd.com exec("system.l2_cntrl%d = l2_cntrl" % i) 1396908SBrad.Beckmann@amd.com l2_cntrl_nodes.append(l2_cntrl) 1406908SBrad.Beckmann@amd.com 1417541SBrad.Beckmann@amd.com phys_mem_size = long(system.physmem.range.second) - \ 1427541SBrad.Beckmann@amd.com long(system.physmem.range.first) + 1 1436908SBrad.Beckmann@amd.com mem_module_size = phys_mem_size / options.num_dirs 1446908SBrad.Beckmann@amd.com 1456908SBrad.Beckmann@amd.com for i in xrange(options.num_dirs): 1466908SBrad.Beckmann@amd.com # 1476908SBrad.Beckmann@amd.com # Create the Ruby objects associated with the directory controller 1486908SBrad.Beckmann@amd.com # 1496908SBrad.Beckmann@amd.com 1506908SBrad.Beckmann@amd.com mem_cntrl = RubyMemoryControl(version = i) 1516908SBrad.Beckmann@amd.com 1526908SBrad.Beckmann@amd.com dir_size = MemorySize('0B') 1536908SBrad.Beckmann@amd.com dir_size.value = mem_module_size 1546908SBrad.Beckmann@amd.com 1556908SBrad.Beckmann@amd.com dir_cntrl = Directory_Controller(version = i, 1566908SBrad.Beckmann@amd.com directory = \ 1576908SBrad.Beckmann@amd.com RubyDirectoryMemory(version = i, 1587541SBrad.Beckmann@amd.com size = \ 1597541SBrad.Beckmann@amd.com dir_size), 1606908SBrad.Beckmann@amd.com memBuffer = mem_cntrl, 1616908SBrad.Beckmann@amd.com l2_select_num_bits = \ 1627541SBrad.Beckmann@amd.com math.log(options.num_l2caches, 1637541SBrad.Beckmann@amd.com 2)) 1646908SBrad.Beckmann@amd.com 1657541SBrad.Beckmann@amd.com exec("system.dir_cntrl%d = dir_cntrl" % i) 1666908SBrad.Beckmann@amd.com dir_cntrl_nodes.append(dir_cntrl) 1676908SBrad.Beckmann@amd.com 1686908SBrad.Beckmann@amd.com for i, dma_device in enumerate(dma_devices): 1696908SBrad.Beckmann@amd.com # 1706908SBrad.Beckmann@amd.com # Create the Ruby objects associated with the dma controller 1716908SBrad.Beckmann@amd.com # 1726908SBrad.Beckmann@amd.com dma_seq = DMASequencer(version = i, 1737541SBrad.Beckmann@amd.com physMemPort = system.physmem.port, 1747541SBrad.Beckmann@amd.com physmem = system.physmem) 1756908SBrad.Beckmann@amd.com 1766908SBrad.Beckmann@amd.com dma_cntrl = DMA_Controller(version = i, 1776908SBrad.Beckmann@amd.com dma_sequencer = dma_seq) 1786908SBrad.Beckmann@amd.com 1797541SBrad.Beckmann@amd.com exec("system.dma_cntrl%d = dma_cntrl" % i) 1807544SBrad.Beckmann@amd.com if dma_device.type == 'MemTest': 1817544SBrad.Beckmann@amd.com system.dma_cntrl.dma_sequencer.port = dma_device.test 1827544SBrad.Beckmann@amd.com else: 1837544SBrad.Beckmann@amd.com system.dma_cntrl.dma_sequencer.port = dma_device.dma 1846908SBrad.Beckmann@amd.com dma_cntrl.dma_sequencer.port = dma_device.dma 1856908SBrad.Beckmann@amd.com dma_cntrl_nodes.append(dma_cntrl) 1866908SBrad.Beckmann@amd.com 1876908SBrad.Beckmann@amd.com all_cntrls = l1_cntrl_nodes + \ 1886908SBrad.Beckmann@amd.com l2_cntrl_nodes + \ 1896908SBrad.Beckmann@amd.com dir_cntrl_nodes + \ 1906908SBrad.Beckmann@amd.com dma_cntrl_nodes 1916908SBrad.Beckmann@amd.com 1926908SBrad.Beckmann@amd.com return (cpu_sequencers, dir_cntrl_nodes, all_cntrls) 193