se.py revision 5822
14202Sbinkertn@umich.edu# Copyright (c) 2006-2008 The Regents of The University of Michigan 24202Sbinkertn@umich.edu# All rights reserved. 34202Sbinkertn@umich.edu# 44202Sbinkertn@umich.edu# Redistribution and use in source and binary forms, with or without 54202Sbinkertn@umich.edu# modification, are permitted provided that the following conditions are 64202Sbinkertn@umich.edu# met: redistributions of source code must retain the above copyright 74202Sbinkertn@umich.edu# notice, this list of conditions and the following disclaimer; 84202Sbinkertn@umich.edu# redistributions in binary form must reproduce the above copyright 94202Sbinkertn@umich.edu# notice, this list of conditions and the following disclaimer in the 104202Sbinkertn@umich.edu# documentation and/or other materials provided with the distribution; 114202Sbinkertn@umich.edu# neither the name of the copyright holders nor the names of its 124202Sbinkertn@umich.edu# contributors may be used to endorse or promote products derived from 134202Sbinkertn@umich.edu# this software without specific prior written permission. 144202Sbinkertn@umich.edu# 154202Sbinkertn@umich.edu# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 164202Sbinkertn@umich.edu# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 174202Sbinkertn@umich.edu# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 184202Sbinkertn@umich.edu# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 194202Sbinkertn@umich.edu# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 204202Sbinkertn@umich.edu# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 214202Sbinkertn@umich.edu# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 224202Sbinkertn@umich.edu# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 234202Sbinkertn@umich.edu# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 244202Sbinkertn@umich.edu# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 254202Sbinkertn@umich.edu# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 264202Sbinkertn@umich.edu# 274202Sbinkertn@umich.edu# Authors: Steve Reinhardt 284202Sbinkertn@umich.edu 294202Sbinkertn@umich.edu# Simple test script 304202Sbinkertn@umich.edu# 314202Sbinkertn@umich.edu# "m5 test.py" 324202Sbinkertn@umich.edu 334486Sbinkertn@umich.eduimport m5 344486Sbinkertn@umich.edu 356165Ssanchezd@stanford.eduif m5.build_env['FULL_SYSTEM']: 366168Snate@binkert.org m5.fatal("This script requires syscall emulation mode (*_SE).") 374202Sbinkertn@umich.edu 384202Sbinkertn@umich.edufrom m5.objects import * 394202Sbinkertn@umich.eduimport os, optparse, sys 404202Sbinkertn@umich.edufrom os.path import join as joinpath 414202Sbinkertn@umich.edum5.AddToPath('../common') 424202Sbinkertn@umich.eduimport Simulation 435650Sgblack@eecs.umich.edufrom Caches import * 446168Snate@binkert.orgfrom cpu2000 import * 457768SAli.Saidi@ARM.com 467768SAli.Saidi@ARM.com# Get paths we might need. It's expected this file is in m5/configs/example. 477768SAli.Saidi@ARM.comconfig_path = os.path.dirname(os.path.abspath(__file__)) 487768SAli.Saidi@ARM.comconfig_root = os.path.dirname(config_path) 497768SAli.Saidi@ARM.comm5_root = os.path.dirname(config_root) 504202Sbinkertn@umich.edu 514202Sbinkertn@umich.eduparser = optparse.OptionParser() 527768SAli.Saidi@ARM.com 534202Sbinkertn@umich.edu# Benchmark options 544202Sbinkertn@umich.eduparser.add_option("-c", "--cmd", 555192Ssaidi@eecs.umich.edu default=joinpath(m5_root, "tests/test-progs/hello/bin/alpha/linux/hello"), 565192Ssaidi@eecs.umich.edu help="The binary to run in syscall emulation mode.") 575192Ssaidi@eecs.umich.eduparser.add_option("-o", "--options", default="", 585192Ssaidi@eecs.umich.edu help='The options to pass to the binary, use " " around the entire string') 595192Ssaidi@eecs.umich.eduparser.add_option("-i", "--input", default="", help="Read stdin from a file.") 605192Ssaidi@eecs.umich.eduparser.add_option("--output", default="", help="Redirect stdout to a file.") 615192Ssaidi@eecs.umich.eduparser.add_option("--errout", default="", help="Redirect stderr to a file.") 627780Snilay@cs.wisc.edu 637832Snate@binkert.orgexecfile(os.path.join(config_root, "common", "Options.py")) 647780Snilay@cs.wisc.edu 657780Snilay@cs.wisc.edu(options, args) = parser.parse_args() 667780Snilay@cs.wisc.edu 677780Snilay@cs.wisc.eduif args: 687780Snilay@cs.wisc.edu print "Error: script doesn't take any positional arguments" 697780Snilay@cs.wisc.edu sys.exit(1) 707780Snilay@cs.wisc.edu 717780Snilay@cs.wisc.eduif options.bench: 727780Snilay@cs.wisc.edu try: 737780Snilay@cs.wisc.edu if m5.build_env['TARGET_ISA'] != 'alpha': 747780Snilay@cs.wisc.edu print >>sys.stderr, "Simpoints code only works for Alpha ISA at this time" 757780Snilay@cs.wisc.edu sys.exit(1) 767780Snilay@cs.wisc.edu exec("workload = %s('alpha', 'tru64', 'ref')" % options.bench) 777780Snilay@cs.wisc.edu process = workload.makeLiveProcess() 78 except: 79 print >>sys.stderr, "Unable to find workload for %s" % options.bench 80 sys.exit(1) 81else: 82 process = LiveProcess() 83 process.executable = options.cmd 84 process.cmd = [options.cmd] + options.options.split() 85 86 87if options.input != "": 88 process.input = options.input 89if options.output != "": 90 process.output = options.output 91if options.errout != "": 92 process.errout = options.errout 93 94if options.detailed: 95 #check for SMT workload 96 workloads = options.cmd.split(';') 97 if len(workloads) > 1: 98 process = [] 99 smt_idx = 0 100 inputs = [] 101 outputs = [] 102 errouts = [] 103 104 if options.input != "": 105 inputs = options.input.split(';') 106 if options.output != "": 107 outputs = options.output.split(';') 108 if options.errout != "": 109 errouts = options.errout.split(';') 110 111 for wrkld in workloads: 112 smt_process = LiveProcess() 113 smt_process.executable = wrkld 114 smt_process.cmd = wrkld + " " + options.options 115 if inputs and inputs[smt_idx]: 116 smt_process.input = inputs[smt_idx] 117 if outputs and outputs[smt_idx]: 118 smt_process.output = outputs[smt_idx] 119 if errouts and errouts[smt_idx]: 120 smt_process.errout = errouts[smt_idx] 121 process += [smt_process, ] 122 smt_idx += 1 123 124(CPUClass, test_mem_mode, FutureClass) = Simulation.setCPUClass(options) 125 126CPUClass.clock = '2GHz' 127 128np = options.num_cpus 129 130system = System(cpu = [CPUClass(cpu_id=i) for i in xrange(np)], 131 physmem = PhysicalMemory(range=AddrRange("512MB")), 132 membus = Bus(), mem_mode = test_mem_mode) 133 134system.physmem.port = system.membus.port 135 136if options.l2cache: 137 system.l2 = L2Cache(size='2MB') 138 system.tol2bus = Bus() 139 system.l2.cpu_side = system.tol2bus.port 140 system.l2.mem_side = system.membus.port 141 142for i in xrange(np): 143 if options.caches: 144 system.cpu[i].addPrivateSplitL1Caches(L1Cache(size = '32kB'), 145 L1Cache(size = '64kB')) 146 if options.l2cache: 147 system.cpu[i].connectMemPorts(system.tol2bus) 148 else: 149 system.cpu[i].connectMemPorts(system.membus) 150 system.cpu[i].workload = process 151 152 if options.fastmem: 153 system.cpu[0].physmem_port = system.physmem.port 154 155root = Root(system = system) 156 157Simulation.run(options, root, system, FutureClass) 158