se.py revision 3448 
1# Copyright (c) 2006 The Regents of The University of Michigan
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright
9# notice, this list of conditions and the following disclaimer in the
10# documentation and/or other materials provided with the distribution;
11# neither the name of the copyright holders nor the names of its
12# contributors may be used to endorse or promote products derived from
13# this software without specific prior written permission.
14#
15# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
18# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
19# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
20# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
21# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26#
27# Authors: Steve Reinhardt
28
29# Simple test script
30#
31# "m5 test.py"
32
33import m5
34from m5.objects import *
35import os, optparse, sys
36m5.AddToPath('../common')
37import Simulation
38from Caches import *
39
40# Get paths we might need.  It's expected this file is in m5/configs/example.
41config_path = os.path.dirname(os.path.abspath(__file__))
42config_root = os.path.dirname(config_path)
43m5_root = os.path.dirname(config_root)
44print m5_root
45print config_path
46print config_root
47
48
49parser = optparse.OptionParser()
50
51# Benchmark options
52parser.add_option("-c", "--cmd",
53                  default=os.path.join(m5_root, "tests/test-progs/hello/bin/alpha/linux/hello"),
54                  help="The binary to run in syscall emulation mode.")
55parser.add_option("-o", "--options", default="",
56                  help="The options to pass to the binary, use \" \" around the entire\
57                        string.")
58parser.add_option("-i", "--input", default="",
59                  help="A file of input to give to the binary.")
60
61execfile(os.path.join(config_root, "common", "Options.py"))
62
63(options, args) = parser.parse_args()
64
65if args:
66    print "Error: script doesn't take any positional arguments"
67    sys.exit(1)
68
69process = LiveProcess()
70process.executable = options.cmd
71process.cmd = options.cmd + " " + options.options
72if options.input != "":
73    process.input = options.input
74
75if options.detailed:
76    #check for SMT workload
77    workloads = options.cmd.split(';')
78    if len(workloads) > 1:
79        process = []
80        smt_idx = 0
81        inputs = []
82
83        if options.input != "":
84            inputs = options.input.split(';')
85
86        for wrkld in workloads:
87            smt_process = LiveProcess()
88            smt_process.executable = wrkld
89            smt_process.cmd = wrkld + " " + options.options
90            if inputs and inputs[smt_idx]:
91                smt_process.input = inputs[smt_idx]
92            process += [smt_process, ]
93            smt_idx += 1
94
95
96if options.timing:
97    CPUClass = TimingSimpleCPU
98    test_mem_mode = 'timing'
99elif options.detailed:
100    CPUClass = DerivO3CPU
101    test_mem_mode = 'timing'
102else:
103    CPUClass = AtomicSimpleCPU
104    test_mem_mode = 'atomic'
105
106CPUClass.clock = '2GHz'
107
108np = options.num_cpus
109
110system = System(cpu = [CPUClass(cpu_id=i) for i in xrange(np)],
111                physmem = PhysicalMemory(range=AddrRange("512MB")),
112                membus = Bus(), mem_mode = test_mem_mode)
113
114system.physmem.port = system.membus.port
115
116for i in xrange(np):
117    if options.caches and not options.standard_switch:
118        system.cpu[i].addPrivateSplitL1Caches(L1Cache(size = '32kB'),
119                                              L1Cache(size = '64kB'))
120    system.cpu[i].connectMemPorts(system.membus)
121    system.cpu[i].mem = system.physmem
122    system.cpu[i].workload = process
123
124root = Root(system = system)
125
126Simulation.run(options, root, system)
127