se.py revision 4455
14455Ssaidi@eecs.umich.edu# Copyright (c) 2006-2007 The Regents of The University of Michigan 23005Sstever@eecs.umich.edu# All rights reserved. 33005Sstever@eecs.umich.edu# 43005Sstever@eecs.umich.edu# Redistribution and use in source and binary forms, with or without 53005Sstever@eecs.umich.edu# modification, are permitted provided that the following conditions are 63005Sstever@eecs.umich.edu# met: redistributions of source code must retain the above copyright 73005Sstever@eecs.umich.edu# notice, this list of conditions and the following disclaimer; 83005Sstever@eecs.umich.edu# redistributions in binary form must reproduce the above copyright 93005Sstever@eecs.umich.edu# notice, this list of conditions and the following disclaimer in the 103005Sstever@eecs.umich.edu# documentation and/or other materials provided with the distribution; 113005Sstever@eecs.umich.edu# neither the name of the copyright holders nor the names of its 123005Sstever@eecs.umich.edu# contributors may be used to endorse or promote products derived from 133005Sstever@eecs.umich.edu# this software without specific prior written permission. 143005Sstever@eecs.umich.edu# 153005Sstever@eecs.umich.edu# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 163005Sstever@eecs.umich.edu# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 173005Sstever@eecs.umich.edu# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 183005Sstever@eecs.umich.edu# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 193005Sstever@eecs.umich.edu# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 203005Sstever@eecs.umich.edu# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 213005Sstever@eecs.umich.edu# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 223005Sstever@eecs.umich.edu# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 233005Sstever@eecs.umich.edu# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 243005Sstever@eecs.umich.edu# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 253005Sstever@eecs.umich.edu# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 263005Sstever@eecs.umich.edu# 273005Sstever@eecs.umich.edu# Authors: Steve Reinhardt 283005Sstever@eecs.umich.edu 292710SN/A# Simple test script 302710SN/A# 313005Sstever@eecs.umich.edu# "m5 test.py" 322889SN/A 332667SN/Aimport m5 343005Sstever@eecs.umich.edufrom m5.objects import * 352856SN/Aimport os, optparse, sys 362917SN/Am5.AddToPath('../common') 373395Shsul@eecs.umich.eduimport Simulation 383448Shsul@eecs.umich.edufrom Caches import * 393394Shsul@eecs.umich.edu 403444Sktlim@umich.edu# Get paths we might need. It's expected this file is in m5/configs/example. 413444Sktlim@umich.educonfig_path = os.path.dirname(os.path.abspath(__file__)) 423444Sktlim@umich.educonfig_root = os.path.dirname(config_path) 433444Sktlim@umich.edum5_root = os.path.dirname(config_root) 442424SN/A 452957SN/Aparser = optparse.OptionParser() 462957SN/A 473323Shsul@eecs.umich.edu# Benchmark options 483005Sstever@eecs.umich.eduparser.add_option("-c", "--cmd", 493444Sktlim@umich.edu default=os.path.join(m5_root, "tests/test-progs/hello/bin/alpha/linux/hello"), 502957SN/A help="The binary to run in syscall emulation mode.") 512957SN/Aparser.add_option("-o", "--options", default="", 522957SN/A help="The options to pass to the binary, use \" \" around the entire\ 532957SN/A string.") 542957SN/Aparser.add_option("-i", "--input", default="", 552957SN/A help="A file of input to give to the binary.") 563323Shsul@eecs.umich.edu 573444Sktlim@umich.eduexecfile(os.path.join(config_root, "common", "Options.py")) 582957SN/A 592957SN/A(options, args) = parser.parse_args() 602957SN/A 612957SN/Aif args: 622957SN/A print "Error: script doesn't take any positional arguments" 632957SN/A sys.exit(1) 642957SN/A 652715SN/Aprocess = LiveProcess() 663005Sstever@eecs.umich.eduprocess.executable = options.cmd 672801SN/Aprocess.cmd = options.cmd + " " + options.options 682801SN/Aif options.input != "": 692801SN/A process.input = options.input 702418SN/A 712917SN/Aif options.detailed: 722833SN/A #check for SMT workload 732833SN/A workloads = options.cmd.split(';') 742833SN/A if len(workloads) > 1: 752833SN/A process = [] 762833SN/A smt_idx = 0 772833SN/A inputs = [] 782833SN/A 792833SN/A if options.input != "": 802833SN/A inputs = options.input.split(';') 812833SN/A 822833SN/A for wrkld in workloads: 832833SN/A smt_process = LiveProcess() 843005Sstever@eecs.umich.edu smt_process.executable = wrkld 852833SN/A smt_process.cmd = wrkld + " " + options.options 862833SN/A if inputs and inputs[smt_idx]: 872833SN/A smt_process.input = inputs[smt_idx] 882833SN/A process += [smt_process, ] 892833SN/A smt_idx += 1 902833SN/A 913481Shsul@eecs.umich.edu(CPUClass, test_mem_mode, FutureClass) = Simulation.setCPUClass(options) 922957SN/A 933395Shsul@eecs.umich.eduCPUClass.clock = '2GHz' 943005Sstever@eecs.umich.edu 953395Shsul@eecs.umich.edunp = options.num_cpus 963395Shsul@eecs.umich.edu 973395Shsul@eecs.umich.edusystem = System(cpu = [CPUClass(cpu_id=i) for i in xrange(np)], 983323Shsul@eecs.umich.edu physmem = PhysicalMemory(range=AddrRange("512MB")), 993395Shsul@eecs.umich.edu membus = Bus(), mem_mode = test_mem_mode) 1003395Shsul@eecs.umich.edu 1013005Sstever@eecs.umich.edusystem.physmem.port = system.membus.port 1023395Shsul@eecs.umich.edu 1033395Shsul@eecs.umich.edufor i in xrange(np): 1043514Sktlim@umich.edu if options.caches: 1053395Shsul@eecs.umich.edu system.cpu[i].addPrivateSplitL1Caches(L1Cache(size = '32kB'), 1063448Shsul@eecs.umich.edu L1Cache(size = '64kB')) 1074455Ssaidi@eecs.umich.edu if options.l2cache: 1084455Ssaidi@eecs.umich.edu system.l2 = L2Cache(size='2MB') 1094455Ssaidi@eecs.umich.edu system.tol2bus = Bus() 1104455Ssaidi@eecs.umich.edu system.l2.cpu_side = system.tol2bus.port 1114455Ssaidi@eecs.umich.edu system.l2.mem_side = system.membus.port 1124455Ssaidi@eecs.umich.edu system.cpu[i].connectMemPorts(system.tol2bus) 1134455Ssaidi@eecs.umich.edu else: 1144455Ssaidi@eecs.umich.edu system.cpu[i].connectMemPorts(system.membus) 1153395Shsul@eecs.umich.edu system.cpu[i].workload = process 1163005Sstever@eecs.umich.edu 1173005Sstever@eecs.umich.eduroot = Root(system = system) 1182902SN/A 1193481Shsul@eecs.umich.eduSimulation.run(options, root, system, FutureClass) 120