ruby_random_test.py revision 10519
12SN/A# Copyright (c) 2006-2007 The Regents of The University of Michigan 21762SN/A# Copyright (c) 2009 Advanced Micro Devices, Inc. 39983Sstever@gmail.com# All rights reserved. 49983Sstever@gmail.com# 52SN/A# Redistribution and use in source and binary forms, with or without 62SN/A# modification, are permitted provided that the following conditions are 72SN/A# met: redistributions of source code must retain the above copyright 82SN/A# notice, this list of conditions and the following disclaimer; 92SN/A# redistributions in binary form must reproduce the above copyright 102SN/A# notice, this list of conditions and the following disclaimer in the 112SN/A# documentation and/or other materials provided with the distribution; 122SN/A# neither the name of the copyright holders nor the names of its 132SN/A# contributors may be used to endorse or promote products derived from 142SN/A# this software without specific prior written permission. 152SN/A# 162SN/A# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 172SN/A# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 182SN/A# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 192SN/A# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 202SN/A# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 212SN/A# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 222SN/A# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 232SN/A# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 242SN/A# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 252SN/A# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 262SN/A# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272SN/A# 282SN/A# Authors: Ron Dreslinski 292665Ssaidi@eecs.umich.edu# Brad Beckmann 302665Ssaidi@eecs.umich.edu 312665Ssaidi@eecs.umich.eduimport m5 322SN/Afrom m5.objects import * 332SN/Afrom m5.defines import buildEnv 342SN/Afrom m5.util import addToPath 352SN/Aimport os, optparse, sys 362SN/AaddToPath('../common') 372SN/AaddToPath('../ruby') 381354SN/AaddToPath('../topologies') 391354SN/A 402SN/Aimport Options 412SN/Aimport Ruby 425501Snate@binkert.org 435546Snate@binkert.org# Get paths we might need. It's expected this file is in m5/configs/example. 447004Snate@binkert.orgconfig_path = os.path.dirname(os.path.abspath(__file__)) 4510412Sandreas.hansson@arm.comconfig_root = os.path.dirname(config_path) 469983Sstever@gmail.comm5_root = os.path.dirname(config_root) 472SN/A 482SN/Aparser = optparse.OptionParser() 495769Snate@binkert.orgOptions.addCommonOptions(parser) 506216Snate@binkert.org 518232Snate@binkert.orgparser.add_option("--maxloads", metavar="N", default=100, 5256SN/A help="Stop after N loads") 532SN/Aparser.add_option("-f", "--wakeup_freq", metavar="N", default=10, 545543Ssaidi@eecs.umich.edu help="Wakeup every N cycles") 559983Sstever@gmail.com 562SN/A# 579983Sstever@gmail.com# Add the ruby specific and protocol specific options 589983Sstever@gmail.com# 599983Sstever@gmail.comRuby.define_options(parser) 609983Sstever@gmail.com 619983Sstever@gmail.comexecfile(os.path.join(config_root, "common", "Options.py")) 629983Sstever@gmail.com 631354SN/A(options, args) = parser.parse_args() 649983Sstever@gmail.com 659983Sstever@gmail.com# 669983Sstever@gmail.com# Set the default cache size and associativity to be very small to encourage 679983Sstever@gmail.com# races between requests and writebacks. 689983Sstever@gmail.com# 699983Sstever@gmail.comoptions.l1d_size="256B" 709983Sstever@gmail.comoptions.l1i_size="256B" 719983Sstever@gmail.comoptions.l2_size="512B" 729983Sstever@gmail.comoptions.l3_size="1kB" 739983Sstever@gmail.comoptions.l1d_assoc=2 749983Sstever@gmail.comoptions.l1i_assoc=2 759983Sstever@gmail.comoptions.l2_assoc=2 769983Sstever@gmail.comoptions.l3_assoc=2 779983Sstever@gmail.com 789983Sstever@gmail.comif args: 799983Sstever@gmail.com print "Error: script doesn't take any positional arguments" 809983Sstever@gmail.com sys.exit(1) 819983Sstever@gmail.com 829983Sstever@gmail.com# 839983Sstever@gmail.com# Create the ruby random tester 849983Sstever@gmail.com# 859983Sstever@gmail.com 869983Sstever@gmail.com# Check the protocol 879983Sstever@gmail.comcheck_flush = False 889983Sstever@gmail.comif buildEnv['PROTOCOL'] == 'MOESI_hammer': 899983Sstever@gmail.com check_flush = True 909983Sstever@gmail.com 912SN/Atester = RubyTester(check_flush = check_flush, 929983Sstever@gmail.com checks_to_complete = options.maxloads, 932SN/A wakeup_frequency = options.wakeup_freq) 9411320Ssteve.reinhardt@amd.com 958902Sandreas.hansson@arm.com# 965769Snate@binkert.org# Create the M5 system. Note that the Memory Object isn't 975769Snate@binkert.org# actually used by the rubytester, but is included to support the 987059Snate@binkert.org# M5 memory size == Ruby memory size checks 997059Snate@binkert.org# 1007059Snate@binkert.orgsystem = System(cpu = tester, physmem = SimpleMemory(), 1017059Snate@binkert.org mem_ranges = [AddrRange(options.mem_size)]) 10212040Sandreas.sandberg@arm.com 10312040Sandreas.sandberg@arm.com# Create a top-level voltage domain and clock domain 10411072Sandreas.sandberg@arm.comsystem.voltage_domain = VoltageDomain(voltage = options.sys_voltage) 10511072Sandreas.sandberg@arm.com 10611072Sandreas.sandberg@arm.comsystem.clk_domain = SrcClockDomain(clock = options.sys_clock, 10711072Sandreas.sandberg@arm.com voltage_domain = system.voltage_domain) 10811072Sandreas.sandberg@arm.com 10911072Sandreas.sandberg@arm.comRuby.create_system(options, False, system) 1107059Snate@binkert.org 1117059Snate@binkert.org# Create a seperate clock domain for Ruby 1127059Snate@binkert.orgsystem.ruby.clk_domain = SrcClockDomain(clock = options.ruby_clock, 1137059Snate@binkert.org voltage_domain = system.voltage_domain) 1147059Snate@binkert.org 1157058Snate@binkert.orgassert(options.num_cpus == len(system.ruby._cpu_ports)) 1167058Snate@binkert.org 1177058Snate@binkert.orgtester.num_cpus = len(system.ruby._cpu_ports) 118396SN/A 119396SN/A# 120396SN/A# The tester is most effective when randomization is turned on and 121396SN/A# artifical delay is randomly inserted on messages 1225501Snate@binkert.org# 1237058Snate@binkert.orgsystem.ruby.randomization = True 1247058Snate@binkert.org 1253329Sstever@eecs.umich.edufor ruby_port in system.ruby._cpu_ports: 1267058Snate@binkert.org # 1277058Snate@binkert.org # Tie the ruby tester ports to the ruby cpu read and write ports 1287058Snate@binkert.org # 1299979Satgutier@umich.edu if ruby_port.support_data_reqs: 130396SN/A tester.cpuDataPort = ruby_port.slave 1317058Snate@binkert.org if ruby_port.support_inst_reqs: 1327058Snate@binkert.org tester.cpuInstPort = ruby_port.slave 1337058Snate@binkert.org 1347058Snate@binkert.org # 1353329Sstever@eecs.umich.edu # Tell each sequencer this is the ruby tester so that it 1367058Snate@binkert.org # copies the subblock back to the checker 1377058Snate@binkert.org # 1387058Snate@binkert.org ruby_port.using_ruby_tester = True 1397058Snate@binkert.org 1407058Snate@binkert.org# ----------------------- 141396SN/A# run simulation 1427058Snate@binkert.org# ----------------------- 1437058Snate@binkert.org 1447058Snate@binkert.orgroot = Root( full_system = False, system = system ) 1457058Snate@binkert.orgroot.system.mem_mode = 'timing' 146396SN/A 1477058Snate@binkert.org# Not much point in this being higher than the L1 latency 1487058Snate@binkert.orgm5.ticks.setGlobalFrequency('1ns') 149396SN/A 15010249Sstephan.diestelhorst@arm.com# instantiate configuration 15110249Sstephan.diestelhorst@arm.comm5.instantiate() 15210249Sstephan.diestelhorst@arm.com 15310249Sstephan.diestelhorst@arm.com# simulate until program terminates 1547058Snate@binkert.orgexit_event = m5.simulate(options.abs_max_tick) 1557058Snate@binkert.org 1567058Snate@binkert.orgprint 'Exiting @ tick', m5.curTick(), 'because', exit_event.getCause() 1577058Snate@binkert.org