ruby_mem_test.py revision 8931:7a1dfb191e3f
18612Stushar@csail.mit.edu# Copyright (c) 2006-2007 The Regents of The University of Michigan 28612Stushar@csail.mit.edu# Copyright (c) 2009 Advanced Micro Devices, Inc. 38612Stushar@csail.mit.edu# All rights reserved. 48612Stushar@csail.mit.edu# 58612Stushar@csail.mit.edu# Redistribution and use in source and binary forms, with or without 68612Stushar@csail.mit.edu# modification, are permitted provided that the following conditions are 78612Stushar@csail.mit.edu# met: redistributions of source code must retain the above copyright 88612Stushar@csail.mit.edu# notice, this list of conditions and the following disclaimer; 98612Stushar@csail.mit.edu# redistributions in binary form must reproduce the above copyright 108612Stushar@csail.mit.edu# notice, this list of conditions and the following disclaimer in the 118612Stushar@csail.mit.edu# documentation and/or other materials provided with the distribution; 128612Stushar@csail.mit.edu# neither the name of the copyright holders nor the names of its 138612Stushar@csail.mit.edu# contributors may be used to endorse or promote products derived from 148612Stushar@csail.mit.edu# this software without specific prior written permission. 158612Stushar@csail.mit.edu# 168612Stushar@csail.mit.edu# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 178612Stushar@csail.mit.edu# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 188612Stushar@csail.mit.edu# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 198612Stushar@csail.mit.edu# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 208612Stushar@csail.mit.edu# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 218612Stushar@csail.mit.edu# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 228612Stushar@csail.mit.edu# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 238612Stushar@csail.mit.edu# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 248612Stushar@csail.mit.edu# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 258612Stushar@csail.mit.edu# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 268612Stushar@csail.mit.edu# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 278612Stushar@csail.mit.edu# 288612Stushar@csail.mit.edu# Authors: Ron Dreslinski 298612Stushar@csail.mit.edu# Brad Beckmann 308612Stushar@csail.mit.edu 318612Stushar@csail.mit.eduimport m5 328612Stushar@csail.mit.edufrom m5.objects import * 338612Stushar@csail.mit.edufrom m5.defines import buildEnv 348612Stushar@csail.mit.edufrom m5.util import addToPath 358612Stushar@csail.mit.eduimport os, optparse, sys 368612Stushar@csail.mit.eduaddToPath('../common') 378612Stushar@csail.mit.eduaddToPath('../ruby') 388612Stushar@csail.mit.edu 398612Stushar@csail.mit.eduimport Options 408612Stushar@csail.mit.eduimport Ruby 418612Stushar@csail.mit.edu 428612Stushar@csail.mit.edu# Get paths we might need. It's expected this file is in m5/configs/example. 438612Stushar@csail.mit.educonfig_path = os.path.dirname(os.path.abspath(__file__)) 448612Stushar@csail.mit.educonfig_root = os.path.dirname(config_path) 458612Stushar@csail.mit.edum5_root = os.path.dirname(config_root) 468612Stushar@csail.mit.edu 478612Stushar@csail.mit.eduparser = optparse.OptionParser() 488612Stushar@csail.mit.eduOptions.addCommonOptions(parser) 498612Stushar@csail.mit.edu 508612Stushar@csail.mit.eduparser.add_option("-l", "--maxloads", metavar="N", default=0, 518612Stushar@csail.mit.edu help="Stop after N loads") 528612Stushar@csail.mit.eduparser.add_option("--progress", type="int", default=1000, 538612Stushar@csail.mit.edu metavar="NLOADS", 548612Stushar@csail.mit.edu help="Progress message interval " 558612Stushar@csail.mit.edu "[default: %default]") 568612Stushar@csail.mit.eduparser.add_option("--num-dmas", type="int", default=0, help="# of dma testers") 578612Stushar@csail.mit.eduparser.add_option("--functional", type="int", default=0, 588612Stushar@csail.mit.edu help="percentage of accesses that should be functional") 598612Stushar@csail.mit.eduparser.add_option("--suppress-func-warnings", action="store_true", 608612Stushar@csail.mit.edu help="suppress warnings when functional accesses fail") 618612Stushar@csail.mit.edu 628612Stushar@csail.mit.edu# 638612Stushar@csail.mit.edu# Add the ruby specific and protocol specific options 648612Stushar@csail.mit.edu# 658612Stushar@csail.mit.eduRuby.define_options(parser) 668612Stushar@csail.mit.edu 678612Stushar@csail.mit.eduexecfile(os.path.join(config_root, "common", "Options.py")) 688612Stushar@csail.mit.edu 698612Stushar@csail.mit.edu(options, args) = parser.parse_args() 708612Stushar@csail.mit.edu 718612Stushar@csail.mit.edu# 728612Stushar@csail.mit.edu# Set the default cache size and associativity to be very small to encourage 738612Stushar@csail.mit.edu# races between requests and writebacks. 748612Stushar@csail.mit.edu# 758612Stushar@csail.mit.eduoptions.l1d_size="256B" 768612Stushar@csail.mit.eduoptions.l1i_size="256B" 778612Stushar@csail.mit.eduoptions.l2_size="512B" 788612Stushar@csail.mit.eduoptions.l3_size="1kB" 798612Stushar@csail.mit.eduoptions.l1d_assoc=2 808612Stushar@csail.mit.eduoptions.l1i_assoc=2 818612Stushar@csail.mit.eduoptions.l2_assoc=2 828612Stushar@csail.mit.eduoptions.l3_assoc=2 838612Stushar@csail.mit.edu 848612Stushar@csail.mit.eduif args: 858612Stushar@csail.mit.edu print "Error: script doesn't take any positional arguments" 868612Stushar@csail.mit.edu sys.exit(1) 878612Stushar@csail.mit.edu 888612Stushar@csail.mit.edublock_size = 64 898612Stushar@csail.mit.edu 908612Stushar@csail.mit.eduif options.num_cpus > block_size: 918612Stushar@csail.mit.edu print "Error: Number of testers %d limited to %d because of false sharing" \ 928612Stushar@csail.mit.edu % (options.num_cpus, block_size) 938612Stushar@csail.mit.edu sys.exit(1) 948612Stushar@csail.mit.edu 958612Stushar@csail.mit.edu# 968612Stushar@csail.mit.edu# Currently ruby does not support atomic or uncacheable accesses 978612Stushar@csail.mit.edu# 988612Stushar@csail.mit.educpus = [ MemTest(atomic = False, 998612Stushar@csail.mit.edu max_loads = options.maxloads, 1008612Stushar@csail.mit.edu issue_dmas = False, 1018612Stushar@csail.mit.edu percent_functional = options.functional, 1028612Stushar@csail.mit.edu percent_uncacheable = 0, 1038612Stushar@csail.mit.edu progress_interval = options.progress, 1048612Stushar@csail.mit.edu suppress_func_warnings = options.suppress_func_warnings) \ 1058612Stushar@csail.mit.edu for i in xrange(options.num_cpus) ] 1068612Stushar@csail.mit.edu 1078612Stushar@csail.mit.edusystem = System(cpu = cpus, 1088612Stushar@csail.mit.edu funcmem = SimpleMemory(in_addr_map = False), 1098612Stushar@csail.mit.edu physmem = SimpleMemory()) 1108612Stushar@csail.mit.edu 1118612Stushar@csail.mit.eduif options.num_dmas > 0: 1128612Stushar@csail.mit.edu dmas = [ MemTest(atomic = False, 1138612Stushar@csail.mit.edu max_loads = options.maxloads, 1148612Stushar@csail.mit.edu issue_dmas = True, 1158612Stushar@csail.mit.edu percent_functional = 0, 1168612Stushar@csail.mit.edu percent_uncacheable = 0, 1178612Stushar@csail.mit.edu progress_interval = options.progress, 1188612Stushar@csail.mit.edu suppress_func_warnings = 1198612Stushar@csail.mit.edu not options.suppress_func_warnings) \ 1208612Stushar@csail.mit.edu for i in xrange(options.num_dmas) ] 1218612Stushar@csail.mit.edu system.dma_devices = dmas 1228612Stushar@csail.mit.eduelse: 1238612Stushar@csail.mit.edu dmas = [] 1248612Stushar@csail.mit.edu 1258612Stushar@csail.mit.edudma_ports = [] 1268612Stushar@csail.mit.edufor (i, dma) in enumerate(dmas): 1278612Stushar@csail.mit.edu dma_ports.append(dma.test) 1288612Stushar@csail.mit.eduRuby.create_system(options, system, dma_ports = dma_ports) 1298612Stushar@csail.mit.edu 1308612Stushar@csail.mit.edu# 1318612Stushar@csail.mit.edu# The tester is most effective when randomization is turned on and 1328612Stushar@csail.mit.edu# artifical delay is randomly inserted on messages 1338612Stushar@csail.mit.edu# 1348612Stushar@csail.mit.edusystem.ruby.randomization = True 1358612Stushar@csail.mit.edu 1368612Stushar@csail.mit.eduassert(len(cpus) == len(system.ruby._cpu_ruby_ports)) 1378612Stushar@csail.mit.edu 1388612Stushar@csail.mit.edufor (i, cpu) in enumerate(cpus): 1398612Stushar@csail.mit.edu # 1408612Stushar@csail.mit.edu # Tie the cpu memtester ports to the correct system ports 1418612Stushar@csail.mit.edu # 1428612Stushar@csail.mit.edu cpu.test = system.ruby._cpu_ruby_ports[i].slave 1438612Stushar@csail.mit.edu cpu.functional = system.funcmem.port 1448612Stushar@csail.mit.edu 1458612Stushar@csail.mit.edu # 1468612Stushar@csail.mit.edu # Since the memtester is incredibly bursty, increase the deadlock 1478612Stushar@csail.mit.edu # threshold to 5 million cycles 1488612Stushar@csail.mit.edu # 1498612Stushar@csail.mit.edu system.ruby._cpu_ruby_ports[i].deadlock_threshold = 5000000 1508612Stushar@csail.mit.edu 1518612Stushar@csail.mit.edu # 1528612Stushar@csail.mit.edu # Ruby doesn't need the backing image of memory when running with 1538612Stushar@csail.mit.edu # the tester. 1548612Stushar@csail.mit.edu # 1558612Stushar@csail.mit.edu system.ruby._cpu_ruby_ports[i].access_phys_mem = False 1568612Stushar@csail.mit.edu 1578612Stushar@csail.mit.edufor (i, dma) in enumerate(dmas): 1588612Stushar@csail.mit.edu # 1598612Stushar@csail.mit.edu # Tie the dma memtester ports to the correct functional port 1608612Stushar@csail.mit.edu # Note that the test port has already been connected to the dma_sequencer 1618612Stushar@csail.mit.edu # 1628612Stushar@csail.mit.edu dma.functional = system.funcmem.port 1638612Stushar@csail.mit.edu 1648612Stushar@csail.mit.edu# ----------------------- 1658612Stushar@csail.mit.edu# run simulation 1668612Stushar@csail.mit.edu# ----------------------- 1678612Stushar@csail.mit.edu 1688612Stushar@csail.mit.eduroot = Root( full_system = False, system = system ) 1698612Stushar@csail.mit.eduroot.system.mem_mode = 'timing' 1708612Stushar@csail.mit.edu 1718612Stushar@csail.mit.edu# Not much point in this being higher than the L1 latency 1728612Stushar@csail.mit.edum5.ticks.setGlobalFrequency('1ns') 1738612Stushar@csail.mit.edu 1748612Stushar@csail.mit.edu# instantiate configuration 1758612Stushar@csail.mit.edum5.instantiate() 1768612Stushar@csail.mit.edu 1778612Stushar@csail.mit.edu# simulate until program terminates 1788612Stushar@csail.mit.eduexit_event = m5.simulate(options.maxtick) 1798612Stushar@csail.mit.edu 1808612Stushar@csail.mit.eduprint 'Exiting @ tick', m5.curTick(), 'because', exit_event.getCause() 1818612Stushar@csail.mit.edu