ruby_mem_test.py revision 13408
1# Copyright (c) 2006-2007 The Regents of The University of Michigan 2# Copyright (c) 2009 Advanced Micro Devices, Inc. 3# All rights reserved. 4# 5# Redistribution and use in source and binary forms, with or without 6# modification, are permitted provided that the following conditions are 7# met: redistributions of source code must retain the above copyright 8# notice, this list of conditions and the following disclaimer; 9# redistributions in binary form must reproduce the above copyright 10# notice, this list of conditions and the following disclaimer in the 11# documentation and/or other materials provided with the distribution; 12# neither the name of the copyright holders nor the names of its 13# contributors may be used to endorse or promote products derived from 14# this software without specific prior written permission. 15# 16# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27# 28# Authors: Ron Dreslinski 29# Brad Beckmann 30 31from __future__ import print_function 32 33import m5 34from m5.objects import * 35from m5.defines import buildEnv 36from m5.util import addToPath 37import os, optparse, sys 38 39addToPath('../') 40 41from common import Options 42from ruby import Ruby 43 44# Get paths we might need. It's expected this file is in m5/configs/example. 45config_path = os.path.dirname(os.path.abspath(__file__)) 46config_root = os.path.dirname(config_path) 47 48parser = optparse.OptionParser() 49Options.addNoISAOptions(parser) 50 51parser.add_option("--maxloads", metavar="N", default=0, 52 help="Stop after N loads") 53parser.add_option("--progress", type="int", default=1000, 54 metavar="NLOADS", 55 help="Progress message interval " 56 "[default: %default]") 57parser.add_option("--num-dmas", type="int", default=0, help="# of dma testers") 58parser.add_option("--functional", type="int", default=0, 59 help="percentage of accesses that should be functional") 60parser.add_option("--suppress-func-warnings", action="store_true", 61 help="suppress warnings when functional accesses fail") 62 63# 64# Add the ruby specific and protocol specific options 65# 66Ruby.define_options(parser) 67 68execfile(os.path.join(config_root, "common", "Options.py")) 69 70(options, args) = parser.parse_args() 71 72# 73# Set the default cache size and associativity to be very small to encourage 74# races between requests and writebacks. 75# 76options.l1d_size="256B" 77options.l1i_size="256B" 78options.l2_size="512B" 79options.l3_size="1kB" 80options.l1d_assoc=2 81options.l1i_assoc=2 82options.l2_assoc=2 83options.l3_assoc=2 84 85if args: 86 print("Error: script doesn't take any positional arguments") 87 sys.exit(1) 88 89block_size = 64 90 91if options.num_cpus > block_size: 92 print("Error: Number of testers %d limited to %d because of false sharing" 93 % (options.num_cpus, block_size)) 94 sys.exit(1) 95 96# 97# Currently ruby does not support atomic or uncacheable accesses 98# 99cpus = [ MemTest(max_loads = options.maxloads, 100 percent_functional = options.functional, 101 percent_uncacheable = 0, 102 progress_interval = options.progress, 103 suppress_func_warnings = options.suppress_func_warnings) \ 104 for i in xrange(options.num_cpus) ] 105 106system = System(cpu = cpus, 107 clk_domain = SrcClockDomain(clock = options.sys_clock), 108 mem_ranges = [AddrRange(options.mem_size)]) 109 110if options.num_dmas > 0: 111 dmas = [ MemTest(max_loads = options.maxloads, 112 percent_functional = 0, 113 percent_uncacheable = 0, 114 progress_interval = options.progress, 115 suppress_func_warnings = 116 not options.suppress_func_warnings) \ 117 for i in xrange(options.num_dmas) ] 118 system.dma_devices = dmas 119else: 120 dmas = [] 121 122dma_ports = [] 123for (i, dma) in enumerate(dmas): 124 dma_ports.append(dma.test) 125Ruby.create_system(options, False, system, dma_ports = dma_ports) 126 127# Create a top-level voltage domain and clock domain 128system.voltage_domain = VoltageDomain(voltage = options.sys_voltage) 129system.clk_domain = SrcClockDomain(clock = options.sys_clock, 130 voltage_domain = system.voltage_domain) 131# Create a seperate clock domain for Ruby 132system.ruby.clk_domain = SrcClockDomain(clock = options.ruby_clock, 133 voltage_domain = system.voltage_domain) 134 135# 136# The tester is most effective when randomization is turned on and 137# artifical delay is randomly inserted on messages 138# 139system.ruby.randomization = True 140 141assert(len(cpus) == len(system.ruby._cpu_ports)) 142 143for (i, cpu) in enumerate(cpus): 144 # 145 # Tie the cpu memtester ports to the correct system ports 146 # 147 cpu.port = system.ruby._cpu_ports[i].slave 148 149 # 150 # Since the memtester is incredibly bursty, increase the deadlock 151 # threshold to 5 million cycles 152 # 153 system.ruby._cpu_ports[i].deadlock_threshold = 5000000 154 155# ----------------------- 156# run simulation 157# ----------------------- 158 159root = Root( full_system = False, system = system ) 160root.system.mem_mode = 'timing' 161 162# Not much point in this being higher than the L1 latency 163m5.ticks.setGlobalFrequency('1ns') 164 165# instantiate configuration 166m5.instantiate() 167 168# simulate until program terminates 169exit_event = m5.simulate(options.abs_max_tick) 170 171print('Exiting @ tick', m5.curTick(), 'because', exit_event.getCause()) 172