ruby_mem_test.py revision 7938
17635SBrad.Beckmann@amd.com# Copyright (c) 2006-2007 The Regents of The University of Michigan
27635SBrad.Beckmann@amd.com# Copyright (c) 2009 Advanced Micro Devices, Inc.
37635SBrad.Beckmann@amd.com# All rights reserved.
47635SBrad.Beckmann@amd.com#
57635SBrad.Beckmann@amd.com# Redistribution and use in source and binary forms, with or without
67635SBrad.Beckmann@amd.com# modification, are permitted provided that the following conditions are
77635SBrad.Beckmann@amd.com# met: redistributions of source code must retain the above copyright
87635SBrad.Beckmann@amd.com# notice, this list of conditions and the following disclaimer;
97635SBrad.Beckmann@amd.com# redistributions in binary form must reproduce the above copyright
107635SBrad.Beckmann@amd.com# notice, this list of conditions and the following disclaimer in the
117635SBrad.Beckmann@amd.com# documentation and/or other materials provided with the distribution;
127635SBrad.Beckmann@amd.com# neither the name of the copyright holders nor the names of its
137635SBrad.Beckmann@amd.com# contributors may be used to endorse or promote products derived from
147635SBrad.Beckmann@amd.com# this software without specific prior written permission.
157635SBrad.Beckmann@amd.com#
167635SBrad.Beckmann@amd.com# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
177635SBrad.Beckmann@amd.com# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
187635SBrad.Beckmann@amd.com# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
197635SBrad.Beckmann@amd.com# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
207635SBrad.Beckmann@amd.com# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
217635SBrad.Beckmann@amd.com# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
227635SBrad.Beckmann@amd.com# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
237635SBrad.Beckmann@amd.com# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
247635SBrad.Beckmann@amd.com# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
257635SBrad.Beckmann@amd.com# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
267635SBrad.Beckmann@amd.com# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
277635SBrad.Beckmann@amd.com#
287635SBrad.Beckmann@amd.com# Authors: Ron Dreslinski
297635SBrad.Beckmann@amd.com#          Brad Beckmann
307635SBrad.Beckmann@amd.com
317635SBrad.Beckmann@amd.comimport m5
327635SBrad.Beckmann@amd.comfrom m5.objects import *
337635SBrad.Beckmann@amd.comfrom m5.defines import buildEnv
347635SBrad.Beckmann@amd.comfrom m5.util import addToPath
357635SBrad.Beckmann@amd.comimport os, optparse, sys
367635SBrad.Beckmann@amd.comaddToPath('../common')
377635SBrad.Beckmann@amd.comaddToPath('../ruby')
387635SBrad.Beckmann@amd.com
397635SBrad.Beckmann@amd.comimport Ruby
407635SBrad.Beckmann@amd.com
417635SBrad.Beckmann@amd.comif buildEnv['FULL_SYSTEM']:
427635SBrad.Beckmann@amd.com    panic("This script requires system-emulation mode (*_SE).")
437635SBrad.Beckmann@amd.com
447635SBrad.Beckmann@amd.com# Get paths we might need.  It's expected this file is in m5/configs/example.
457635SBrad.Beckmann@amd.comconfig_path = os.path.dirname(os.path.abspath(__file__))
467635SBrad.Beckmann@amd.comconfig_root = os.path.dirname(config_path)
477635SBrad.Beckmann@amd.comm5_root = os.path.dirname(config_root)
487635SBrad.Beckmann@amd.com
497635SBrad.Beckmann@amd.comparser = optparse.OptionParser()
507635SBrad.Beckmann@amd.com
517635SBrad.Beckmann@amd.comparser.add_option("-l", "--maxloads", metavar="N", default=0,
527635SBrad.Beckmann@amd.com                  help="Stop after N loads")
537635SBrad.Beckmann@amd.comparser.add_option("--progress", type="int", default=1000,
547635SBrad.Beckmann@amd.com                  metavar="NLOADS",
557635SBrad.Beckmann@amd.com                  help="Progress message interval "
567635SBrad.Beckmann@amd.com                  "[default: %default]")
577635SBrad.Beckmann@amd.comparser.add_option("--num-dmas", type="int", default=0, help="# of dma testers")
587635SBrad.Beckmann@amd.com
597635SBrad.Beckmann@amd.com#
607635SBrad.Beckmann@amd.com# Add the ruby specific and protocol specific options
617635SBrad.Beckmann@amd.com#
627635SBrad.Beckmann@amd.comRuby.define_options(parser)
637635SBrad.Beckmann@amd.com
647635SBrad.Beckmann@amd.comexecfile(os.path.join(config_root, "common", "Options.py"))
657635SBrad.Beckmann@amd.com
667635SBrad.Beckmann@amd.com(options, args) = parser.parse_args()
677635SBrad.Beckmann@amd.com
687635SBrad.Beckmann@amd.com#
697635SBrad.Beckmann@amd.com# Set the default cache size and associativity to be very small to encourage
707635SBrad.Beckmann@amd.com# races between requests and writebacks.
717635SBrad.Beckmann@amd.com#
727635SBrad.Beckmann@amd.comoptions.l1d_size="256B"
737635SBrad.Beckmann@amd.comoptions.l1i_size="256B"
747635SBrad.Beckmann@amd.comoptions.l2_size="512B"
757635SBrad.Beckmann@amd.comoptions.l3_size="1kB"
767635SBrad.Beckmann@amd.comoptions.l1d_assoc=2
777635SBrad.Beckmann@amd.comoptions.l1i_assoc=2
787635SBrad.Beckmann@amd.comoptions.l2_assoc=2
797635SBrad.Beckmann@amd.comoptions.l3_assoc=2
807635SBrad.Beckmann@amd.com
817635SBrad.Beckmann@amd.comif args:
827635SBrad.Beckmann@amd.com     print "Error: script doesn't take any positional arguments"
837635SBrad.Beckmann@amd.com     sys.exit(1)
847635SBrad.Beckmann@amd.com
857635SBrad.Beckmann@amd.comblock_size = 64
867635SBrad.Beckmann@amd.com
877635SBrad.Beckmann@amd.comif options.num_cpus > block_size:
887635SBrad.Beckmann@amd.com     print "Error: Number of testers %d limited to %d because of false sharing" \
897635SBrad.Beckmann@amd.com           % (options.num_cpus, block_size)
907635SBrad.Beckmann@amd.com     sys.exit(1)
917635SBrad.Beckmann@amd.com
927635SBrad.Beckmann@amd.com#
937635SBrad.Beckmann@amd.com# Currently ruby does not support atomic, functional, or uncacheable accesses
947635SBrad.Beckmann@amd.com#
957635SBrad.Beckmann@amd.comcpus = [ MemTest(atomic = False, \
967635SBrad.Beckmann@amd.com                 max_loads = options.maxloads, \
977635SBrad.Beckmann@amd.com                 issue_dmas = False, \
987635SBrad.Beckmann@amd.com                 percent_functional = 0, \
997635SBrad.Beckmann@amd.com                 percent_uncacheable = 0, \
1007635SBrad.Beckmann@amd.com                 progress_interval = options.progress) \
1017635SBrad.Beckmann@amd.com         for i in xrange(options.num_cpus) ]
1027635SBrad.Beckmann@amd.com
1037635SBrad.Beckmann@amd.comsystem = System(cpu = cpus,
1047635SBrad.Beckmann@amd.com                funcmem = PhysicalMemory(),
1057635SBrad.Beckmann@amd.com                physmem = PhysicalMemory())
1067635SBrad.Beckmann@amd.com
1077635SBrad.Beckmann@amd.comif options.num_dmas > 0:
1087635SBrad.Beckmann@amd.com    dmas = [ MemTest(atomic = False, \
1097635SBrad.Beckmann@amd.com                     max_loads = options.maxloads, \
1107635SBrad.Beckmann@amd.com                     issue_dmas = True, \
1117635SBrad.Beckmann@amd.com                     percent_functional = 0, \
1127635SBrad.Beckmann@amd.com                     percent_uncacheable = 0, \
1137635SBrad.Beckmann@amd.com                     progress_interval = options.progress) \
1147635SBrad.Beckmann@amd.com             for i in xrange(options.num_dmas) ]
1157635SBrad.Beckmann@amd.com    system.dma_devices = dmas
1167635SBrad.Beckmann@amd.comelse:
1177635SBrad.Beckmann@amd.com    dmas = []
1187635SBrad.Beckmann@amd.com
1197635SBrad.Beckmann@amd.comsystem.ruby = Ruby.create_system(options, \
1207635SBrad.Beckmann@amd.com                                 system, \
1217635SBrad.Beckmann@amd.com                                 dma_devices = dmas)
1227635SBrad.Beckmann@amd.com
1237635SBrad.Beckmann@amd.com#
1247635SBrad.Beckmann@amd.com# The tester is most effective when randomization is turned on and
1257635SBrad.Beckmann@amd.com# artifical delay is randomly inserted on messages
1267635SBrad.Beckmann@amd.com#
1277635SBrad.Beckmann@amd.comsystem.ruby.randomization = True
1287635SBrad.Beckmann@amd.com
1297635SBrad.Beckmann@amd.comassert(len(cpus) == len(system.ruby.cpu_ruby_ports))
1307635SBrad.Beckmann@amd.com
1317635SBrad.Beckmann@amd.comfor (i, cpu) in enumerate(cpus):
1327635SBrad.Beckmann@amd.com    #
1337635SBrad.Beckmann@amd.com    # Tie the cpu memtester ports to the correct system ports
1347635SBrad.Beckmann@amd.com    #
1357635SBrad.Beckmann@amd.com    cpu.test = system.ruby.cpu_ruby_ports[i].port
1367635SBrad.Beckmann@amd.com    cpu.functional = system.funcmem.port
1377635SBrad.Beckmann@amd.com
1387938SBrad.Beckmann@amd.com    #
1397938SBrad.Beckmann@amd.com    # Since the memtester is incredibly bursty, increase the deadlock
1407938SBrad.Beckmann@amd.com    # threshold to 5 million cycles
1417938SBrad.Beckmann@amd.com    #
1427938SBrad.Beckmann@amd.com    system.ruby.cpu_ruby_ports[i].deadlock_threshold = 5000000
1437938SBrad.Beckmann@amd.com
1447635SBrad.Beckmann@amd.comfor (i, dma) in enumerate(dmas):
1457635SBrad.Beckmann@amd.com    #
1467635SBrad.Beckmann@amd.com    # Tie the dma memtester ports to the correct functional port
1477635SBrad.Beckmann@amd.com    # Note that the test port has already been connected to the dma_sequencer
1487635SBrad.Beckmann@amd.com    #
1497635SBrad.Beckmann@amd.com    dma.functional = system.funcmem.port
1507635SBrad.Beckmann@amd.com
1517635SBrad.Beckmann@amd.com# -----------------------
1527635SBrad.Beckmann@amd.com# run simulation
1537635SBrad.Beckmann@amd.com# -----------------------
1547635SBrad.Beckmann@amd.com
1557635SBrad.Beckmann@amd.comroot = Root( system = system )
1567635SBrad.Beckmann@amd.comroot.system.mem_mode = 'timing'
1577635SBrad.Beckmann@amd.com
1587635SBrad.Beckmann@amd.com# Not much point in this being higher than the L1 latency
1597635SBrad.Beckmann@amd.comm5.ticks.setGlobalFrequency('1ns')
1607635SBrad.Beckmann@amd.com
1617635SBrad.Beckmann@amd.com# instantiate configuration
1627635SBrad.Beckmann@amd.comm5.instantiate()
1637635SBrad.Beckmann@amd.com
1647635SBrad.Beckmann@amd.com# simulate until program terminates
1657635SBrad.Beckmann@amd.comexit_event = m5.simulate(options.maxtick)
1667635SBrad.Beckmann@amd.com
1677635SBrad.Beckmann@amd.comprint 'Exiting @ tick', m5.curTick(), 'because', exit_event.getCause()
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