ruby_mem_test.py revision 13731
13569Sgblack@eecs.umich.edu# Copyright (c) 2006-2007 The Regents of The University of Michigan 23569Sgblack@eecs.umich.edu# Copyright (c) 2009 Advanced Micro Devices, Inc. 33569Sgblack@eecs.umich.edu# All rights reserved. 43569Sgblack@eecs.umich.edu# 53569Sgblack@eecs.umich.edu# Redistribution and use in source and binary forms, with or without 63569Sgblack@eecs.umich.edu# modification, are permitted provided that the following conditions are 73569Sgblack@eecs.umich.edu# met: redistributions of source code must retain the above copyright 83569Sgblack@eecs.umich.edu# notice, this list of conditions and the following disclaimer; 93569Sgblack@eecs.umich.edu# redistributions in binary form must reproduce the above copyright 103569Sgblack@eecs.umich.edu# notice, this list of conditions and the following disclaimer in the 113569Sgblack@eecs.umich.edu# documentation and/or other materials provided with the distribution; 123569Sgblack@eecs.umich.edu# neither the name of the copyright holders nor the names of its 133569Sgblack@eecs.umich.edu# contributors may be used to endorse or promote products derived from 143569Sgblack@eecs.umich.edu# this software without specific prior written permission. 153569Sgblack@eecs.umich.edu# 163569Sgblack@eecs.umich.edu# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 173569Sgblack@eecs.umich.edu# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 183569Sgblack@eecs.umich.edu# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 193569Sgblack@eecs.umich.edu# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 203569Sgblack@eecs.umich.edu# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 213569Sgblack@eecs.umich.edu# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 223569Sgblack@eecs.umich.edu# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 233569Sgblack@eecs.umich.edu# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 243569Sgblack@eecs.umich.edu# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 253569Sgblack@eecs.umich.edu# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 263569Sgblack@eecs.umich.edu# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 273569Sgblack@eecs.umich.edu# 283804Ssaidi@eecs.umich.edu# Authors: Ron Dreslinski 293569Sgblack@eecs.umich.edu# Brad Beckmann 303569Sgblack@eecs.umich.edu 313918Ssaidi@eecs.umich.edufrom __future__ import print_function 323918Ssaidi@eecs.umich.edu 333804Ssaidi@eecs.umich.eduimport m5 343811Ssaidi@eecs.umich.edufrom m5.objects import * 353569Sgblack@eecs.umich.edufrom m5.defines import buildEnv 363824Ssaidi@eecs.umich.edufrom m5.util import addToPath 373811Ssaidi@eecs.umich.eduimport os, optparse, sys 383811Ssaidi@eecs.umich.edu 393823Ssaidi@eecs.umich.eduaddToPath('../') 403823Ssaidi@eecs.umich.edu 413823Ssaidi@eecs.umich.edufrom common import Options 424103Ssaidi@eecs.umich.edufrom ruby import Ruby 433569Sgblack@eecs.umich.edu 443804Ssaidi@eecs.umich.edu# Get paths we might need. It's expected this file is in m5/configs/example. 453804Ssaidi@eecs.umich.educonfig_path = os.path.dirname(os.path.abspath(__file__)) 464088Sbinkertn@umich.educonfig_root = os.path.dirname(config_path) 473569Sgblack@eecs.umich.edu 485034Smilesck@eecs.umich.eduparser = optparse.OptionParser() 495358Sgblack@eecs.umich.eduOptions.addNoISAOptions(parser) 503881Ssaidi@eecs.umich.edu 513804Ssaidi@eecs.umich.eduparser.add_option("--maxloads", metavar="N", default=0, 523804Ssaidi@eecs.umich.edu help="Stop after N loads") 533804Ssaidi@eecs.umich.eduparser.add_option("--progress", type="int", default=1000, 545555Snate@binkert.org metavar="NLOADS", 553569Sgblack@eecs.umich.edu help="Progress message interval " 563804Ssaidi@eecs.umich.edu "[default: %default]") 573918Ssaidi@eecs.umich.eduparser.add_option("--num-dmas", type="int", default=0, help="# of dma testers") 583881Ssaidi@eecs.umich.eduparser.add_option("--functional", type="int", default=0, 593881Ssaidi@eecs.umich.edu help="percentage of accesses that should be functional") 603881Ssaidi@eecs.umich.eduparser.add_option("--suppress-func-warnings", action="store_true", 614990Sgblack@eecs.umich.edu help="suppress warnings when functional accesses fail") 624990Sgblack@eecs.umich.edu 634990Sgblack@eecs.umich.edu# 644990Sgblack@eecs.umich.edu# Add the ruby specific and protocol specific options 654990Sgblack@eecs.umich.edu# 664990Sgblack@eecs.umich.eduRuby.define_options(parser) 674990Sgblack@eecs.umich.edu 684990Sgblack@eecs.umich.eduexec(compile( \ 694990Sgblack@eecs.umich.edu open(os.path.join(config_root, "common", "Options.py")).read(), \ 706022Sgblack@eecs.umich.edu os.path.join(config_root, "common", "Options.py"), 'exec')) 716022Sgblack@eecs.umich.edu 726022Sgblack@eecs.umich.edu(options, args) = parser.parse_args() 733804Ssaidi@eecs.umich.edu 743569Sgblack@eecs.umich.edu# 753804Ssaidi@eecs.umich.edu# Set the default cache size and associativity to be very small to encourage 763804Ssaidi@eecs.umich.edu# races between requests and writebacks. 773804Ssaidi@eecs.umich.edu# 783804Ssaidi@eecs.umich.eduoptions.l1d_size="256B" 793881Ssaidi@eecs.umich.eduoptions.l1i_size="256B" 803804Ssaidi@eecs.umich.eduoptions.l2_size="512B" 813804Ssaidi@eecs.umich.eduoptions.l3_size="1kB" 823804Ssaidi@eecs.umich.eduoptions.l1d_assoc=2 833804Ssaidi@eecs.umich.eduoptions.l1i_assoc=2 843804Ssaidi@eecs.umich.eduoptions.l2_assoc=2 853804Ssaidi@eecs.umich.eduoptions.l3_assoc=2 863804Ssaidi@eecs.umich.edu 873569Sgblack@eecs.umich.eduif args: 883569Sgblack@eecs.umich.edu print("Error: script doesn't take any positional arguments") 893804Ssaidi@eecs.umich.edu sys.exit(1) 903804Ssaidi@eecs.umich.edu 913826Ssaidi@eecs.umich.edublock_size = 64 923804Ssaidi@eecs.umich.edu 933804Ssaidi@eecs.umich.eduif options.num_cpus > block_size: 943826Ssaidi@eecs.umich.edu print("Error: Number of testers %d limited to %d because of false sharing" 953907Ssaidi@eecs.umich.edu % (options.num_cpus, block_size)) 963826Ssaidi@eecs.umich.edu sys.exit(1) 973811Ssaidi@eecs.umich.edu 983836Ssaidi@eecs.umich.edu# 993915Ssaidi@eecs.umich.edu# Currently ruby does not support atomic or uncacheable accesses 1003907Ssaidi@eecs.umich.edu# 1013881Ssaidi@eecs.umich.educpus = [ MemTest(max_loads = options.maxloads, 1023881Ssaidi@eecs.umich.edu percent_functional = options.functional, 1033881Ssaidi@eecs.umich.edu percent_uncacheable = 0, 1043881Ssaidi@eecs.umich.edu progress_interval = options.progress, 1053907Ssaidi@eecs.umich.edu suppress_func_warnings = options.suppress_func_warnings) \ 1063881Ssaidi@eecs.umich.edu for i in range(options.num_cpus) ] 1075555Snate@binkert.org 1085555Snate@binkert.orgsystem = System(cpu = cpus, 1095555Snate@binkert.org clk_domain = SrcClockDomain(clock = options.sys_clock), 1103881Ssaidi@eecs.umich.edu mem_ranges = [AddrRange(options.mem_size)]) 1113881Ssaidi@eecs.umich.edu 1123907Ssaidi@eecs.umich.eduif options.num_dmas > 0: 1133907Ssaidi@eecs.umich.edu dmas = [ MemTest(max_loads = options.maxloads, 1143907Ssaidi@eecs.umich.edu percent_functional = 0, 1153907Ssaidi@eecs.umich.edu percent_uncacheable = 0, 1163907Ssaidi@eecs.umich.edu progress_interval = options.progress, 1173907Ssaidi@eecs.umich.edu suppress_func_warnings = 1183907Ssaidi@eecs.umich.edu not options.suppress_func_warnings) \ 1193907Ssaidi@eecs.umich.edu for i in range(options.num_dmas) ] 1203907Ssaidi@eecs.umich.edu system.dma_devices = dmas 1213907Ssaidi@eecs.umich.eduelse: 1223907Ssaidi@eecs.umich.edu dmas = [] 1233907Ssaidi@eecs.umich.edu 1243907Ssaidi@eecs.umich.edudma_ports = [] 1253907Ssaidi@eecs.umich.edufor (i, dma) in enumerate(dmas): 1263907Ssaidi@eecs.umich.edu dma_ports.append(dma.test) 1273907Ssaidi@eecs.umich.eduRuby.create_system(options, False, system, dma_ports = dma_ports) 1283907Ssaidi@eecs.umich.edu 1293907Ssaidi@eecs.umich.edu# Create a top-level voltage domain and clock domain 1303907Ssaidi@eecs.umich.edusystem.voltage_domain = VoltageDomain(voltage = options.sys_voltage) 1313907Ssaidi@eecs.umich.edusystem.clk_domain = SrcClockDomain(clock = options.sys_clock, 1323907Ssaidi@eecs.umich.edu voltage_domain = system.voltage_domain) 1333907Ssaidi@eecs.umich.edu# Create a seperate clock domain for Ruby 1343881Ssaidi@eecs.umich.edusystem.ruby.clk_domain = SrcClockDomain(clock = options.ruby_clock, 1353881Ssaidi@eecs.umich.edu voltage_domain = system.voltage_domain) 1363881Ssaidi@eecs.umich.edu 1373881Ssaidi@eecs.umich.edu# 1383881Ssaidi@eecs.umich.edu# The tester is most effective when randomization is turned on and 1393881Ssaidi@eecs.umich.edu# artifical delay is randomly inserted on messages 1403881Ssaidi@eecs.umich.edu# 1413881Ssaidi@eecs.umich.edusystem.ruby.randomization = True 1423881Ssaidi@eecs.umich.edu 1433881Ssaidi@eecs.umich.eduassert(len(cpus) == len(system.ruby._cpu_ports)) 1443881Ssaidi@eecs.umich.edu 1453881Ssaidi@eecs.umich.edufor (i, cpu) in enumerate(cpus): 1463907Ssaidi@eecs.umich.edu # 1473811Ssaidi@eecs.umich.edu # Tie the cpu memtester ports to the correct system ports 1483826Ssaidi@eecs.umich.edu # 1493826Ssaidi@eecs.umich.edu cpu.port = system.ruby._cpu_ports[i].slave 1503826Ssaidi@eecs.umich.edu 1513826Ssaidi@eecs.umich.edu # 1523881Ssaidi@eecs.umich.edu # Since the memtester is incredibly bursty, increase the deadlock 1533881Ssaidi@eecs.umich.edu # threshold to 5 million cycles 1543881Ssaidi@eecs.umich.edu # 1553881Ssaidi@eecs.umich.edu system.ruby._cpu_ports[i].deadlock_threshold = 5000000 1563881Ssaidi@eecs.umich.edu 1573881Ssaidi@eecs.umich.edu# ----------------------- 1583881Ssaidi@eecs.umich.edu# run simulation 1593881Ssaidi@eecs.umich.edu# ----------------------- 1603881Ssaidi@eecs.umich.edu 1613881Ssaidi@eecs.umich.eduroot = Root( full_system = False, system = system ) 1623881Ssaidi@eecs.umich.eduroot.system.mem_mode = 'timing' 1633881Ssaidi@eecs.umich.edu 1643881Ssaidi@eecs.umich.edu# Not much point in this being higher than the L1 latency 1653881Ssaidi@eecs.umich.edum5.ticks.setGlobalFrequency('1ns') 1663881Ssaidi@eecs.umich.edu 1673826Ssaidi@eecs.umich.edu# instantiate configuration 1683826Ssaidi@eecs.umich.edum5.instantiate() 1693826Ssaidi@eecs.umich.edu 1703826Ssaidi@eecs.umich.edu# simulate until program terminates 1713826Ssaidi@eecs.umich.eduexit_event = m5.simulate(options.abs_max_tick) 1723881Ssaidi@eecs.umich.edu 1733569Sgblack@eecs.umich.eduprint('Exiting @ tick', m5.curTick(), 'because', exit_event.getCause()) 1743569Sgblack@eecs.umich.edu