ruby_direct_test.py revision 9100 
1# Copyright (c) 2006-2007 The Regents of The University of Michigan
2# Copyright (c) 2009 Advanced Micro Devices, Inc.
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions are
7# met: redistributions of source code must retain the above copyright
8# notice, this list of conditions and the following disclaimer;
9# redistributions in binary form must reproduce the above copyright
10# notice, this list of conditions and the following disclaimer in the
11# documentation and/or other materials provided with the distribution;
12# neither the name of the copyright holders nor the names of its
13# contributors may be used to endorse or promote products derived from
14# this software without specific prior written permission.
15#
16# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27#
28# Authors: Ron Dreslinski
29#          Brad Beckmann
30
31import m5
32from m5.objects import *
33from m5.defines import buildEnv
34from m5.util import addToPath
35import os, optparse, sys
36addToPath('../common')
37addToPath('../ruby')
38addToPath('../topologies')
39
40import Options
41import Ruby
42
43# Get paths we might need.  It's expected this file is in m5/configs/example.
44config_path = os.path.dirname(os.path.abspath(__file__))
45config_root = os.path.dirname(config_path)
46m5_root = os.path.dirname(config_root)
47
48parser = optparse.OptionParser()
49Options.addCommonOptions(parser)
50
51parser.add_option("-l", "--requests", metavar="N", default=100,
52                  help="Stop after N requests")
53parser.add_option("-f", "--wakeup_freq", metavar="N", default=10,
54                  help="Wakeup every N cycles")
55parser.add_option("--test-type", type="string", default="SeriesGetx",
56                  help="SeriesGetx|SeriesGets|Invalidate")
57
58#
59# Add the ruby specific and protocol specific options
60#
61Ruby.define_options(parser)
62
63execfile(os.path.join(config_root, "common", "Options.py"))
64
65(options, args) = parser.parse_args()
66
67if args:
68     print "Error: script doesn't take any positional arguments"
69     sys.exit(1)
70
71#
72# Select the direct test generator
73#
74if options.test_type == "SeriesGetx":
75    generator = SeriesRequestGenerator(num_cpus = options.num_cpus,
76                                             issue_writes = True)
77elif options.test_type == "SeriesGets":
78    generator = SeriesRequestGenerator(num_cpus = options.num_cpus,
79                                             issue_writes = False)
80elif options.test_type == "Invalidate":
81    generator = InvalidateGenerator(num_cpus = options.num_cpus)
82else:
83    print "Error: unknown direct test generator"
84    sys.exit(1)
85
86#
87# Create the M5 system.  Note that the Memory Object isn't
88# actually used by the rubytester, but is included to support the
89# M5 memory size == Ruby memory size checks
90#
91system = System(physmem = SimpleMemory())
92
93#
94# Create the ruby random tester
95#
96system.tester = RubyDirectedTester(requests_to_complete = \
97                                   options.requests,
98                                   generator = generator)
99
100Ruby.create_system(options, system)
101
102assert(options.num_cpus == len(system.ruby._cpu_ruby_ports))
103
104for ruby_port in system.ruby._cpu_ruby_ports:
105    #
106    # Tie the ruby tester ports to the ruby cpu ports
107    #
108    system.tester.cpuPort = ruby_port.slave
109
110# -----------------------
111# run simulation
112# -----------------------
113
114root = Root( full_system = False, system = system )
115root.system.mem_mode = 'timing'
116
117# Not much point in this being higher than the L1 latency
118m5.ticks.setGlobalFrequency('1ns')
119
120# instantiate configuration
121m5.instantiate()
122
123# simulate until program terminates
124exit_event = m5.simulate(options.maxtick)
125
126print 'Exiting @ tick', m5.curTick(), 'because', exit_event.getCause()
127