hmctest.py revision 13731:67cd980cb20f 
1from __future__ import print_function
2
3import sys
4import argparse
5import subprocess
6from pprint import pprint
7
8import m5
9from m5.objects import *
10from m5.util import *
11
12addToPath('../')
13
14from common import MemConfig
15from common import HMC
16
17
18def add_options(parser):
19    parser.add_argument("--external-memory-system", default=0, action="store",
20                        type=int, help="External memory system")
21    # TLM related options, currently optional in configs/common/MemConfig.py
22    parser.add_argument("--tlm-memory", action="store_true", help="use\
23                        external port for SystemC TLM co-simulation. Default:\
24                        no")
25    # Elastic traces related options, currently optional in
26    # configs/common/MemConfig.py
27    parser.add_argument("--elastic-trace-en", action="store_true",
28                        help="enable capture of data dependency and\
29                        instruction fetch traces using elastic trace\
30                        probe.\nDefault: no")
31    # Options related to traffic generation
32    parser.add_argument("--num-tgen", default=4, action="store", type=int,
33                        choices=[4], help="number of traffic generators.\
34                        Right now this script supports only 4.\nDefault: 4")
35    parser.add_argument("--tgen-cfg-file",
36                        default="./configs/example/hmc_tgen.cfg",
37                        type=str, help="Traffic generator(s) configuration\
38                        file. Note: this script uses the same configuration\
39                        file for all traffic generators")
40
41
42# considering 4GB HMC device with following parameters
43# hmc_device_size = '4GB'
44# hmc_vault_size = '256MB'
45# hmc_stack_size = 8
46# hmc_bank_in_stack = 2
47# hmc_bank_size = '16MB'
48# hmc_bank_in_vault = 16
49def build_system(options):
50    # create the system we are going to simulate
51    system = System()
52    # use timing mode for the interaction between master-slave ports
53    system.mem_mode = 'timing'
54    # set the clock fequency of the system
55    clk = '100GHz'
56    vd = VoltageDomain(voltage='1V')
57    system.clk_domain = SrcClockDomain(clock=clk, voltage_domain=vd)
58    # add traffic generators to the system
59    system.tgen = [TrafficGen(config_file=options.tgen_cfg_file) for i in
60                   range(options.num_tgen)]
61    # Config memory system with given HMC arch
62    MemConfig.config_mem(options, system)
63    # Connect the traffic generatiors
64    if options.arch == "distributed":
65        for i in range(options.num_tgen):
66            system.tgen[i].port = system.membus.slave
67        # connect the system port even if it is not used in this example
68        system.system_port = system.membus.slave
69    if options.arch == "mixed":
70        for i in range(int(options.num_tgen/2)):
71            system.tgen[i].port = system.membus.slave
72        hh = system.hmc_host
73        if options.enable_global_monitor:
74            system.tgen[2].port = hh.lmonitor[2].slave
75            hh.lmonitor[2].master = hh.seriallink[2].slave
76            system.tgen[3].port = hh.lmonitor[3].slave
77            hh.lmonitor[3].master = hh.seriallink[3].slave
78        else:
79            system.tgen[2].port = hh.seriallink[2].slave
80            system.tgen[3].port = hh.seriallink[3].slave
81        # connect the system port even if it is not used in this example
82        system.system_port = system.membus.slave
83    if options.arch == "same":
84        hh = system.hmc_host
85        for i in range(options.num_links_controllers):
86            if options.enable_global_monitor:
87                system.tgen[i].port = hh.lmonitor[i].slave
88            else:
89                system.tgen[i].port = hh.seriallink[i].slave
90    # set up the root SimObject
91    root = Root(full_system=False, system=system)
92    return root
93
94
95def main():
96    parser = argparse.ArgumentParser(description="Simple system using HMC as\
97                                     main memory")
98    HMC.add_options(parser)
99    add_options(parser)
100    options = parser.parse_args()
101    # build the system
102    root = build_system(options)
103    # instantiate all of the objects we've created so far
104    m5.instantiate()
105    print("Beginning simulation!")
106    event = m5.simulate(10000000000)
107    m5.stats.dump()
108    print('Exiting @ tick %i because %s (exit code is %i)' % (m5.curTick(),
109                                                              event.getCause(),
110                                                              event.getCode()))
111    print("Done")
112
113
114if __name__ == "__m5_main__":
115    main()
116