fs_power.py revision 12564:2778478ca882
1# Copyright (c) 2017 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license 9# terms below provided that you ensure that this notice is replicated 10# unmodified and in its entirety in all distributions of the software, 11# modified or unmodified, in source code or in binary form. 12# 13# Redistribution and use in source and binary forms, with or without 14# modification, are permitted provided that the following conditions are 15# met: redistributions of source code must retain the above copyright 16# notice, this list of conditions and the following disclaimer; 17# redistributions in binary form must reproduce the above copyright 18# notice, this list of conditions and the following disclaimer in the 19# documentation and/or other materials provided with the distribution; 20# neither the name of the copyright holders nor the names of its 21# contributors may be used to endorse or promote products derived from 22# this software without specific prior written permission. 23# 24# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 25# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 26# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 27# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 28# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 29# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 30# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 34# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35# 36# Authors: Andreas Sandberg 37# Stephan Diestelhorst 38 39# This configuration file extends the example ARM big.LITTLE(tm) 40# with example power models. 41 42from __future__ import print_function 43 44import argparse 45import os 46 47import m5 48from m5.objects import MathExprPowerModel, PowerModel 49 50import fs_bigLITTLE as bL 51 52 53class CpuPowerOn(MathExprPowerModel): 54 # 2A per IPC, 3pA per cache miss 55 # and then convert to Watt 56 dyn = "voltage * (2 * ipc + " \ 57 "3 * 0.000000001 * dcache.overall_misses / sim_seconds)" 58 st = "4 * temp" 59 60class CpuPowerOff(MathExprPowerModel): 61 dyn = "0" 62 st = "0" 63 64class CpuPowerModel(PowerModel): 65 pm = [ 66 CpuPowerOn(), # ON 67 CpuPowerOff(), # CLK_GATED 68 CpuPowerOff(), # SRAM_RETENTION 69 CpuPowerOff(), # OFF 70 ] 71 72 73def main(): 74 parser = argparse.ArgumentParser( 75 description="Generic ARM big.LITTLE configuration with "\ 76 "example power models") 77 bL.addOptions(parser) 78 options = parser.parse_args() 79 80 if options.cpu_type != "timing": 81 m5.fatal("The power example script requires 'timing' CPUs.") 82 83 root = bL.build(options) 84 85 # Wire up some example power models to the CPUs 86 for cpu in root.system.descendants(): 87 if not isinstance(cpu, m5.objects.BaseCPU): 88 continue 89 90 cpu.default_p_state = "ON" 91 cpu.power_model = CpuPowerModel() 92 93 bL.instantiate(options) 94 95 print("*" * 70) 96 print("WARNING: The power numbers generated by this script are " 97 "examples. They are not representative of any particular " 98 "implementation or process.") 99 print("*" * 70) 100 101 # Dumping stats periodically 102 m5.stats.periodicStatDump(m5.ticks.fromSeconds(0.1E-3)) 103 bL.run() 104 105 106if __name__ == "__m5_main__": 107 main() 108