Simulation.py revision 7531:f5e86115a07a 
1# Copyright (c) 2006-2008 The Regents of The University of Michigan
2# All rights reserved.
3#
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5# modification, are permitted provided that the following conditions are
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7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright
9# notice, this list of conditions and the following disclaimer in the
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11# neither the name of the copyright holders nor the names of its
12# contributors may be used to endorse or promote products derived from
13# this software without specific prior written permission.
14#
15# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
18# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
19# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
20# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
21# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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24# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26#
27# Authors: Lisa Hsu
28
29from os import getcwd
30from os.path import join as joinpath
31
32import m5
33from m5.defines import buildEnv
34from m5.objects import *
35from m5.util import *
36
37addToPath('../common')
38
39def setCPUClass(options):
40
41    atomic = False
42    if options.timing:
43        class TmpClass(TimingSimpleCPU): pass
44    elif options.detailed:
45        if not options.caches:
46            print "O3 CPU must be used with caches"
47            sys.exit(1)
48        class TmpClass(DerivO3CPU): pass
49    elif options.inorder:
50        if not options.caches:
51            print "InOrder CPU must be used with caches"
52            sys.exit(1)
53        class TmpClass(InOrderCPU): pass
54    else:
55        class TmpClass(AtomicSimpleCPU): pass
56        atomic = True
57
58    CPUClass = None
59    test_mem_mode = 'atomic'
60
61    if not atomic:
62        if options.checkpoint_restore != None or options.fast_forward:
63            CPUClass = TmpClass
64            class TmpClass(AtomicSimpleCPU): pass
65        else:
66            test_mem_mode = 'timing'
67
68    return (TmpClass, test_mem_mode, CPUClass)
69
70
71def run(options, root, testsys, cpu_class):
72    if options.maxtick:
73        maxtick = options.maxtick
74    elif options.maxtime:
75        simtime = m5.ticks.seconds(simtime)
76        print "simulating for: ", simtime
77        maxtick = simtime
78    else:
79        maxtick = m5.MaxTick
80
81    if options.checkpoint_dir:
82        cptdir = options.checkpoint_dir
83    elif m5.options.outdir:
84        cptdir = m5.options.outdir
85    else:
86        cptdir = getcwd()
87
88    if options.fast_forward and options.checkpoint_restore != None:
89        fatal("Can't specify both --fast-forward and --checkpoint-restore")
90
91    if options.standard_switch and not options.caches:
92        fatal("Must specify --caches when using --standard-switch")
93
94    np = options.num_cpus
95    max_checkpoints = options.max_checkpoints
96    switch_cpus = None
97
98    if options.prog_intvl:
99        for i in xrange(np):
100            testsys.cpu[i].progress_interval = options.prog_intvl
101
102    if options.maxinsts:
103        for i in xrange(np):
104            testsys.cpu[i].max_insts_any_thread = options.maxinsts
105
106    if cpu_class:
107        switch_cpus = [cpu_class(defer_registration=True, cpu_id=(np+i))
108                       for i in xrange(np)]
109
110        for i in xrange(np):
111            if options.fast_forward:
112                testsys.cpu[i].max_insts_any_thread = int(options.fast_forward)
113            switch_cpus[i].system =  testsys
114            if not buildEnv['FULL_SYSTEM']:
115                switch_cpus[i].workload = testsys.cpu[i].workload
116            switch_cpus[i].clock = testsys.cpu[0].clock
117            # simulation period
118            if options.max_inst:
119                switch_cpus[i].max_insts_any_thread = options.max_inst
120
121        testsys.switch_cpus = switch_cpus
122        switch_cpu_list = [(testsys.cpu[i], switch_cpus[i]) for i in xrange(np)]
123
124    if options.standard_switch:
125        switch_cpus = [TimingSimpleCPU(defer_registration=True, cpu_id=(np+i))
126                       for i in xrange(np)]
127        switch_cpus_1 = [DerivO3CPU(defer_registration=True, cpu_id=(2*np+i))
128                        for i in xrange(np)]
129
130        for i in xrange(np):
131            switch_cpus[i].system =  testsys
132            switch_cpus_1[i].system =  testsys
133            if not buildEnv['FULL_SYSTEM']:
134                switch_cpus[i].workload = testsys.cpu[i].workload
135                switch_cpus_1[i].workload = testsys.cpu[i].workload
136            switch_cpus[i].clock = testsys.cpu[0].clock
137            switch_cpus_1[i].clock = testsys.cpu[0].clock
138
139            # if restoring, make atomic cpu simulate only a few instructions
140            if options.checkpoint_restore != None:
141                testsys.cpu[i].max_insts_any_thread = 1
142            # Fast forward to specified location if we are not restoring
143            elif options.fast_forward:
144                testsys.cpu[i].max_insts_any_thread = int(options.fast_forward)
145            # Fast forward to a simpoint (warning: time consuming)
146            elif options.simpoint:
147                if testsys.cpu[i].workload[0].simpoint == 0:
148                    fatal('simpoint not found')
149                testsys.cpu[i].max_insts_any_thread = \
150                    testsys.cpu[i].workload[0].simpoint
151            # No distance specified, just switch
152            else:
153                testsys.cpu[i].max_insts_any_thread = 1
154
155            # warmup period
156            if options.warmup_insts:
157                switch_cpus[i].max_insts_any_thread =  options.warmup_insts
158
159            # simulation period
160            if options.max_inst:
161                switch_cpus_1[i].max_insts_any_thread = options.max_inst
162
163            if not options.caches:
164                # O3 CPU must have a cache to work.
165                print "O3 CPU must be used with caches"
166                sys.exit(1)
167
168            testsys.switch_cpus = switch_cpus
169            testsys.switch_cpus_1 = switch_cpus_1
170            switch_cpu_list = [(testsys.cpu[i], switch_cpus[i]) for i in xrange(np)]
171            switch_cpu_list1 = [(switch_cpus[i], switch_cpus_1[i]) for i in xrange(np)]
172
173    # set the checkpoint in the cpu before m5.instantiate is called
174    if options.take_checkpoints != None and \
175           (options.simpoint or options.at_instruction):
176        offset = int(options.take_checkpoints)
177        # Set an instruction break point
178        if options.simpoint:
179            for i in xrange(np):
180                if testsys.cpu[i].workload[0].simpoint == 0:
181                    fatal('no simpoint for testsys.cpu[%d].workload[0]', i)
182                checkpoint_inst = int(testsys.cpu[i].workload[0].simpoint) + offset
183                testsys.cpu[i].max_insts_any_thread = checkpoint_inst
184                # used for output below
185                options.take_checkpoints = checkpoint_inst
186        else:
187            options.take_checkpoints = offset
188            # Set all test cpus with the right number of instructions
189            # for the upcoming simulation
190            for i in xrange(np):
191                testsys.cpu[i].max_insts_any_thread = offset
192
193    checkpoint_dir = None
194    if options.checkpoint_restore != None:
195        from os.path import isdir, exists
196        from os import listdir
197        import re
198
199        if not isdir(cptdir):
200            fatal("checkpoint dir %s does not exist!", cptdir)
201
202        if options.at_instruction or options.simpoint:
203            inst = options.checkpoint_restore
204            if options.simpoint:
205                # assume workload 0 has the simpoint
206                if testsys.cpu[0].workload[0].simpoint == 0:
207                    fatal('Unable to find simpoint')
208                inst += int(testsys.cpu[0].workload[0].simpoint)
209
210            checkpoint_dir = joinpath(cptdir,
211                                      "cpt.%s.%s" % (options.bench, inst))
212            if not exists(checkpoint_dir):
213                fatal("Unable to find checkpoint directory %s", checkpoint_dir)
214        else:
215            dirs = listdir(cptdir)
216            expr = re.compile('cpt\.([0-9]*)')
217            cpts = []
218            for dir in dirs:
219                match = expr.match(dir)
220                if match:
221                    cpts.append(match.group(1))
222
223            cpts.sort(lambda a,b: cmp(long(a), long(b)))
224
225            cpt_num = options.checkpoint_restore
226
227            if cpt_num > len(cpts):
228                fatal('Checkpoint %d not found', cpt_num)
229
230            ## Adjust max tick based on our starting tick
231            maxtick = maxtick - int(cpts[cpt_num - 1])
232            checkpoint_dir = joinpath(cptdir, "cpt.%s" % cpts[cpt_num - 1])
233
234    m5.instantiate(checkpoint_dir)
235
236    if options.standard_switch or cpu_class:
237        if options.standard_switch:
238            print "Switch at instruction count:%s" % \
239                    str(testsys.cpu[0].max_insts_any_thread)
240            exit_event = m5.simulate()
241        elif cpu_class and options.fast_forward:
242            print "Switch at instruction count:%s" % \
243                    str(testsys.cpu[0].max_insts_any_thread)
244            exit_event = m5.simulate()
245        else:
246            print "Switch at curTick count:%s" % str(10000)
247            exit_event = m5.simulate(10000)
248        print "Switched CPUS @ cycle = %s" % (m5.curTick())
249
250        # when you change to Timing (or Atomic), you halt the system
251        # given as argument.  When you are finished with the system
252        # changes (including switchCpus), you must resume the system
253        # manually.  You DON'T need to resume after just switching
254        # CPUs if you haven't changed anything on the system level.
255
256        m5.changeToTiming(testsys)
257        m5.switchCpus(switch_cpu_list)
258        m5.resume(testsys)
259
260        if options.standard_switch:
261            print "Switch at instruction count:%d" % \
262                    (testsys.switch_cpus[0].max_insts_any_thread)
263
264            #warmup instruction count may have already been set
265            if options.warmup_insts:
266                exit_event = m5.simulate()
267            else:
268                exit_event = m5.simulate(options.warmup)
269            print "Switching CPUS @ cycle = %s" % (m5.curTick())
270            print "Simulation ends instruction count:%d" % \
271                    (testsys.switch_cpus_1[0].max_insts_any_thread)
272            m5.drain(testsys)
273            m5.switchCpus(switch_cpu_list1)
274            m5.resume(testsys)
275
276    num_checkpoints = 0
277    exit_cause = ''
278
279    # If we're taking and restoring checkpoints, use checkpoint_dir
280    # option only for finding the checkpoints to restore from.  This
281    # lets us test checkpointing by restoring from one set of
282    # checkpoints, generating a second set, and then comparing them.
283    if options.take_checkpoints and options.checkpoint_restore:
284        if m5.options.outdir:
285            cptdir = m5.options.outdir
286        else:
287            cptdir = getcwd()
288
289    # Checkpoints being taken via the command line at <when> and at
290    # subsequent periods of <period>.  Checkpoint instructions
291    # received from the benchmark running are ignored and skipped in
292    # favor of command line checkpoint instructions.
293    if options.take_checkpoints != None :
294        if options.at_instruction or options.simpoint:
295            checkpoint_inst = int(options.take_checkpoints)
296
297            # maintain correct offset if we restored from some instruction
298            if options.checkpoint_restore != None:
299                checkpoint_inst += options.checkpoint_restore
300
301            print "Creating checkpoint at inst:%d" % (checkpoint_inst)
302            exit_event = m5.simulate()
303            print "exit cause = %s" % (exit_event.getCause())
304
305            # skip checkpoint instructions should they exist
306            while exit_event.getCause() == "checkpoint":
307                exit_event = m5.simulate()
308
309            if exit_event.getCause() == \
310                   "a thread reached the max instruction count":
311                m5.checkpoint(joinpath(cptdir, "cpt.%s.%d" % \
312                        (options.bench, checkpoint_inst)))
313                print "Checkpoint written."
314                num_checkpoints += 1
315
316            if exit_event.getCause() == "user interrupt received":
317                exit_cause = exit_event.getCause();
318        else:
319            when, period = options.take_checkpoints.split(",", 1)
320            when = int(when)
321            period = int(period)
322
323            exit_event = m5.simulate(when)
324            while exit_event.getCause() == "checkpoint":
325                exit_event = m5.simulate(when - m5.curTick())
326
327            if exit_event.getCause() == "simulate() limit reached":
328                m5.checkpoint(joinpath(cptdir, "cpt.%d"))
329                num_checkpoints += 1
330
331            sim_ticks = when
332            exit_cause = "maximum %d checkpoints dropped" % max_checkpoints
333            while num_checkpoints < max_checkpoints and \
334                    exit_event.getCause() == "simulate() limit reached":
335                if (sim_ticks + period) > maxtick:
336                    exit_event = m5.simulate(maxtick - sim_ticks)
337                    exit_cause = exit_event.getCause()
338                    break
339                else:
340                    exit_event = m5.simulate(period)
341                    sim_ticks += period
342                    while exit_event.getCause() == "checkpoint":
343                        exit_event = m5.simulate(sim_ticks - m5.curTick())
344                    if exit_event.getCause() == "simulate() limit reached":
345                        m5.checkpoint(joinpath(cptdir, "cpt.%d"))
346                        num_checkpoints += 1
347
348            if exit_event.getCause() != "simulate() limit reached":
349                exit_cause = exit_event.getCause();
350
351    else: # no checkpoints being taken via this script
352        if options.fast_forward:
353            m5.stats.reset()
354        print "**** REAL SIMULATION ****"
355        exit_event = m5.simulate(maxtick)
356
357        while exit_event.getCause() == "checkpoint":
358            m5.checkpoint(joinpath(cptdir, "cpt.%d"))
359            num_checkpoints += 1
360            if num_checkpoints == max_checkpoints:
361                exit_cause = "maximum %d checkpoints dropped" % max_checkpoints
362                break
363
364            exit_event = m5.simulate(maxtick - m5.curTick())
365            exit_cause = exit_event.getCause()
366
367    if exit_cause == '':
368        exit_cause = exit_event.getCause()
369    print 'Exiting @ cycle %i because %s' % (m5.curTick(), exit_cause)
370
371    if options.checkpoint_at_end:
372        m5.checkpoint(joinpath(cptdir, "cpt.%d"))
373
374