Simulation.py revision 6641:59f08019c39a
1# Copyright (c) 2006-2008 The Regents of The University of Michigan 2# All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are 6# met: redistributions of source code must retain the above copyright 7# notice, this list of conditions and the following disclaimer; 8# redistributions in binary form must reproduce the above copyright 9# notice, this list of conditions and the following disclaimer in the 10# documentation and/or other materials provided with the distribution; 11# neither the name of the copyright holders nor the names of its 12# contributors may be used to endorse or promote products derived from 13# this software without specific prior written permission. 14# 15# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 16# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 17# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 18# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 19# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 20# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 21# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 25# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26# 27# Authors: Lisa Hsu 28 29from os import getcwd 30from os.path import join as joinpath 31import m5 32from m5.objects import * 33m5.AddToPath('../common') 34 35def setCPUClass(options): 36 37 atomic = False 38 if options.timing: 39 class TmpClass(TimingSimpleCPU): pass 40 elif options.detailed: 41 if not options.caches: 42 print "O3 CPU must be used with caches" 43 sys.exit(1) 44 class TmpClass(DerivO3CPU): pass 45 elif options.inorder: 46 if not options.caches: 47 print "InOrder CPU must be used with caches" 48 sys.exit(1) 49 class TmpClass(InOrderCPU): pass 50 else: 51 class TmpClass(AtomicSimpleCPU): pass 52 atomic = True 53 54 CPUClass = None 55 test_mem_mode = 'atomic' 56 57 if not atomic: 58 if options.checkpoint_restore != None or options.fast_forward: 59 CPUClass = TmpClass 60 class TmpClass(AtomicSimpleCPU): pass 61 else: 62 test_mem_mode = 'timing' 63 64 return (TmpClass, test_mem_mode, CPUClass) 65 66 67def run(options, root, testsys, cpu_class): 68 if options.maxtick: 69 maxtick = options.maxtick 70 elif options.maxtime: 71 simtime = m5.ticks.seconds(simtime) 72 print "simulating for: ", simtime 73 maxtick = simtime 74 else: 75 maxtick = m5.MaxTick 76 77 if options.checkpoint_dir: 78 cptdir = options.checkpoint_dir 79 elif m5.options.outdir: 80 cptdir = m5.options.outdir 81 else: 82 cptdir = getcwd() 83 84 if options.fast_forward and options.checkpoint_restore != None: 85 m5.fatal("Error: Can't specify both --fast-forward and --checkpoint-restore") 86 87 if options.standard_switch and not options.caches: 88 m5.fatal("Error: Must specify --caches when using --standard-switch") 89 90 np = options.num_cpus 91 max_checkpoints = options.max_checkpoints 92 switch_cpus = None 93 94 if options.prog_intvl: 95 for i in xrange(np): 96 testsys.cpu[i].progress_interval = options.prog_intvl 97 98 if options.maxinsts: 99 for i in xrange(np): 100 testsys.cpu[i].max_insts_any_thread = options.maxinsts 101 102 if cpu_class: 103 switch_cpus = [cpu_class(defer_registration=True, cpu_id=(np+i)) 104 for i in xrange(np)] 105 106 for i in xrange(np): 107 if options.fast_forward: 108 testsys.cpu[i].max_insts_any_thread = int(options.fast_forward) 109 switch_cpus[i].system = testsys 110 if not m5.build_env['FULL_SYSTEM']: 111 switch_cpus[i].workload = testsys.cpu[i].workload 112 switch_cpus[i].clock = testsys.cpu[0].clock 113 # simulation period 114 if options.max_inst: 115 switch_cpus[i].max_insts_any_thread = options.max_inst 116 117 testsys.switch_cpus = switch_cpus 118 switch_cpu_list = [(testsys.cpu[i], switch_cpus[i]) for i in xrange(np)] 119 120 if options.standard_switch: 121 switch_cpus = [TimingSimpleCPU(defer_registration=True, cpu_id=(np+i)) 122 for i in xrange(np)] 123 switch_cpus_1 = [DerivO3CPU(defer_registration=True, cpu_id=(2*np+i)) 124 for i in xrange(np)] 125 126 for i in xrange(np): 127 switch_cpus[i].system = testsys 128 switch_cpus_1[i].system = testsys 129 if not m5.build_env['FULL_SYSTEM']: 130 switch_cpus[i].workload = testsys.cpu[i].workload 131 switch_cpus_1[i].workload = testsys.cpu[i].workload 132 switch_cpus[i].clock = testsys.cpu[0].clock 133 switch_cpus_1[i].clock = testsys.cpu[0].clock 134 135 # if restoring, make atomic cpu simulate only a few instructions 136 if options.checkpoint_restore != None: 137 testsys.cpu[i].max_insts_any_thread = 1 138 # Fast forward to specified location if we are not restoring 139 elif options.fast_forward: 140 testsys.cpu[i].max_insts_any_thread = int(options.fast_forward) 141 # Fast forward to a simpoint (warning: time consuming) 142 elif options.simpoint: 143 if testsys.cpu[i].workload[0].simpoint == 0: 144 m5.fatal('simpoint not found') 145 testsys.cpu[i].max_insts_any_thread = \ 146 testsys.cpu[i].workload[0].simpoint 147 # No distance specified, just switch 148 else: 149 testsys.cpu[i].max_insts_any_thread = 1 150 151 # warmup period 152 if options.warmup_insts: 153 switch_cpus[i].max_insts_any_thread = options.warmup_insts 154 155 # simulation period 156 if options.max_inst: 157 switch_cpus_1[i].max_insts_any_thread = options.max_inst 158 159 if not options.caches: 160 # O3 CPU must have a cache to work. 161 print "O3 CPU must be used with caches" 162 sys.exit(1) 163 164 testsys.switch_cpus = switch_cpus 165 testsys.switch_cpus_1 = switch_cpus_1 166 switch_cpu_list = [(testsys.cpu[i], switch_cpus[i]) for i in xrange(np)] 167 switch_cpu_list1 = [(switch_cpus[i], switch_cpus_1[i]) for i in xrange(np)] 168 169 # set the checkpoint in the cpu before m5.instantiate is called 170 if options.take_checkpoints != None and \ 171 (options.simpoint or options.at_instruction): 172 offset = int(options.take_checkpoints) 173 # Set an instruction break point 174 if options.simpoint: 175 for i in xrange(np): 176 if testsys.cpu[i].workload[0].simpoint == 0: 177 m5.fatal('no simpoint for testsys.cpu[%d].workload[0]', i) 178 checkpoint_inst = int(testsys.cpu[i].workload[0].simpoint) + offset 179 testsys.cpu[i].max_insts_any_thread = checkpoint_inst 180 # used for output below 181 options.take_checkpoints = checkpoint_inst 182 else: 183 options.take_checkpoints = offset 184 # Set all test cpus with the right number of instructions 185 # for the upcoming simulation 186 for i in xrange(np): 187 testsys.cpu[i].max_insts_any_thread = offset 188 189 m5.instantiate(root) 190 191 if options.checkpoint_restore != None: 192 from os.path import isdir, exists 193 from os import listdir 194 import re 195 196 if not isdir(cptdir): 197 m5.fatal("checkpoint dir %s does not exist!", cptdir) 198 199 if options.at_instruction: 200 checkpoint_dir = joinpath(cptdir, "cpt.%s.%s" % \ 201 (options.bench, options.checkpoint_restore)) 202 if not exists(checkpoint_dir): 203 m5.fatal("Unable to find checkpoint directory %s", 204 checkpoint_dir) 205 206 print "Restoring checkpoint ..." 207 m5.restoreCheckpoint(root, checkpoint_dir) 208 print "Done." 209 elif options.simpoint: 210 # assume workload 0 has the simpoint 211 if testsys.cpu[0].workload[0].simpoint == 0: 212 m5.fatal('Unable to find simpoint') 213 214 options.checkpoint_restore += \ 215 int(testsys.cpu[0].workload[0].simpoint) 216 217 checkpoint_dir = joinpath(cptdir, "cpt.%s.%d" % \ 218 (options.bench, options.checkpoint_restore)) 219 if not exists(checkpoint_dir): 220 m5.fatal("Unable to find checkpoint directory %s.%s", 221 options.bench, options.checkpoint_restore) 222 223 print "Restoring checkpoint ..." 224 m5.restoreCheckpoint(root,checkpoint_dir) 225 print "Done." 226 else: 227 dirs = listdir(cptdir) 228 expr = re.compile('cpt\.([0-9]*)') 229 cpts = [] 230 for dir in dirs: 231 match = expr.match(dir) 232 if match: 233 cpts.append(match.group(1)) 234 235 cpts.sort(lambda a,b: cmp(long(a), long(b))) 236 237 cpt_num = options.checkpoint_restore 238 239 if cpt_num > len(cpts): 240 m5.fatal('Checkpoint %d not found', cpt_num) 241 242 ## Adjust max tick based on our starting tick 243 maxtick = maxtick - int(cpts[cpt_num - 1]) 244 245 ## Restore the checkpoint 246 m5.restoreCheckpoint(root, 247 joinpath(cptdir, "cpt.%s" % cpts[cpt_num - 1])) 248 249 if options.standard_switch or cpu_class: 250 if options.standard_switch: 251 print "Switch at instruction count:%s" % \ 252 str(testsys.cpu[0].max_insts_any_thread) 253 exit_event = m5.simulate() 254 elif cpu_class and options.fast_forward: 255 print "Switch at instruction count:%s" % \ 256 str(testsys.cpu[0].max_insts_any_thread) 257 exit_event = m5.simulate() 258 else: 259 print "Switch at curTick count:%s" % str(10000) 260 exit_event = m5.simulate(10000) 261 print "Switched CPUS @ cycle = %s" % (m5.curTick()) 262 263 # when you change to Timing (or Atomic), you halt the system 264 # given as argument. When you are finished with the system 265 # changes (including switchCpus), you must resume the system 266 # manually. You DON'T need to resume after just switching 267 # CPUs if you haven't changed anything on the system level. 268 269 m5.changeToTiming(testsys) 270 m5.switchCpus(switch_cpu_list) 271 m5.resume(testsys) 272 273 if options.standard_switch: 274 print "Switch at instruction count:%d" % \ 275 (testsys.switch_cpus[0].max_insts_any_thread) 276 277 #warmup instruction count may have already been set 278 if options.warmup_insts: 279 exit_event = m5.simulate() 280 else: 281 exit_event = m5.simulate(options.warmup) 282 print "Switching CPUS @ cycle = %s" % (m5.curTick()) 283 print "Simulation ends instruction count:%d" % \ 284 (testsys.switch_cpus_1[0].max_insts_any_thread) 285 m5.drain(testsys) 286 m5.switchCpus(switch_cpu_list1) 287 m5.resume(testsys) 288 289 num_checkpoints = 0 290 exit_cause = '' 291 292 # Checkpoints being taken via the command line at <when> and at 293 # subsequent periods of <period>. Checkpoint instructions 294 # received from the benchmark running are ignored and skipped in 295 # favor of command line checkpoint instructions. 296 if options.take_checkpoints != None : 297 if options.at_instruction or options.simpoint: 298 checkpoint_inst = int(options.take_checkpoints) 299 300 # maintain correct offset if we restored from some instruction 301 if options.checkpoint_restore != None: 302 checkpoint_inst += options.checkpoint_restore 303 304 print "Creating checkpoint at inst:%d" % (checkpoint_inst) 305 exit_event = m5.simulate() 306 print "exit cause = %s" % (exit_event.getCause()) 307 308 # skip checkpoint instructions should they exist 309 while exit_event.getCause() == "checkpoint": 310 exit_event = m5.simulate() 311 312 if exit_event.getCause() == \ 313 "a thread reached the max instruction count": 314 m5.checkpoint(root, joinpath(cptdir, "cpt.%s.%d" % \ 315 (options.bench, checkpoint_inst))) 316 print "Checkpoint written." 317 num_checkpoints += 1 318 319 if exit_event.getCause() == "user interrupt received": 320 exit_cause = exit_event.getCause(); 321 else: 322 when, period = options.take_checkpoints.split(",", 1) 323 when = int(when) 324 period = int(period) 325 326 exit_event = m5.simulate(when) 327 while exit_event.getCause() == "checkpoint": 328 exit_event = m5.simulate(when - m5.curTick()) 329 330 if exit_event.getCause() == "simulate() limit reached": 331 m5.checkpoint(root, joinpath(cptdir, "cpt.%d")) 332 num_checkpoints += 1 333 334 sim_ticks = when 335 exit_cause = "maximum %d checkpoints dropped" % max_checkpoints 336 while num_checkpoints < max_checkpoints and \ 337 exit_event.getCause() == "simulate() limit reached": 338 if (sim_ticks + period) > maxtick: 339 exit_event = m5.simulate(maxtick - sim_ticks) 340 exit_cause = exit_event.getCause() 341 break 342 else: 343 exit_event = m5.simulate(period) 344 sim_ticks += period 345 while exit_event.getCause() == "checkpoint": 346 exit_event = m5.simulate(sim_ticks - m5.curTick()) 347 if exit_event.getCause() == "simulate() limit reached": 348 m5.checkpoint(root, joinpath(cptdir, "cpt.%d")) 349 num_checkpoints += 1 350 351 if exit_event.getCause() != "simulate() limit reached": 352 exit_cause = exit_event.getCause(); 353 354 else: # no checkpoints being taken via this script 355 if options.fast_forward: 356 m5.stats.reset() 357 print "**** REAL SIMULATION ****" 358 exit_event = m5.simulate(maxtick) 359 360 while exit_event.getCause() == "checkpoint": 361 m5.checkpoint(root, joinpath(cptdir, "cpt.%d")) 362 num_checkpoints += 1 363 if num_checkpoints == max_checkpoints: 364 exit_cause = "maximum %d checkpoints dropped" % max_checkpoints 365 break 366 367 exit_event = m5.simulate(maxtick - m5.curTick()) 368 exit_cause = exit_event.getCause() 369 370 if exit_cause == '': 371 exit_cause = exit_event.getCause() 372 print 'Exiting @ cycle %i because %s' % (m5.curTick(), exit_cause) 373 374