Simulation.py revision 3445:5c5f90f5506c
17119Sgblack@eecs.umich.edu# Copyright (c) 2006 The Regents of The University of Michigan
27119Sgblack@eecs.umich.edu# All rights reserved.
312110SRekai.GonzalezAlberquilla@arm.com#
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57120Sgblack@eecs.umich.edu# modification, are permitted provided that the following conditions are
67120Sgblack@eecs.umich.edu# met: redistributions of source code must retain the above copyright
77120Sgblack@eecs.umich.edu# notice, this list of conditions and the following disclaimer;
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267119Sgblack@eecs.umich.edu#
277119Sgblack@eecs.umich.edu# Authors: Lisa Hsu
287119Sgblack@eecs.umich.edu
297119Sgblack@eecs.umich.edufrom os import getcwd
307119Sgblack@eecs.umich.eduimport m5
317119Sgblack@eecs.umich.edufrom m5.objects import *
327119Sgblack@eecs.umich.edum5.AddToPath('../common')
337119Sgblack@eecs.umich.edufrom Caches import *
347119Sgblack@eecs.umich.edu
357119Sgblack@eecs.umich.edudef run(options, root, testsys):
367119Sgblack@eecs.umich.edu    if options.maxtick:
377119Sgblack@eecs.umich.edu        maxtick = options.maxtick
387119Sgblack@eecs.umich.edu    elif options.maxtime:
397119Sgblack@eecs.umich.edu        simtime = int(options.maxtime * root.clock.value)
407119Sgblack@eecs.umich.edu        print "simulating for: ", simtime
417119Sgblack@eecs.umich.edu        maxtick = simtime
427119Sgblack@eecs.umich.edu    else:
437119Sgblack@eecs.umich.edu        maxtick = -1
447646Sgene.wu@arm.com
4512234Sgabeblack@google.com    if options.checkpoint_dir:
467646Sgene.wu@arm.com        cptdir = options.checkpoint_dir
477646Sgene.wu@arm.com    else:
487646Sgene.wu@arm.com        cptdir = getcwd()
497646Sgene.wu@arm.com
507646Sgene.wu@arm.com    np = options.num_cpus
517646Sgene.wu@arm.com    max_checkpoints = options.max_checkpoints
527646Sgene.wu@arm.com
537646Sgene.wu@arm.com    if options.standard_switch:
5412234Sgabeblack@google.com        switch_cpus = [TimingSimpleCPU(defer_registration=True, cpu_id=(np+i))
557646Sgene.wu@arm.com                       for i in xrange(np)]
567646Sgene.wu@arm.com        switch_cpus1 = [DerivO3CPU(defer_registration=True, cpu_id=(2*np+i))
577646Sgene.wu@arm.com                        for i in xrange(np)]
587646Sgene.wu@arm.com        for i in xrange(np):
597646Sgene.wu@arm.com            switch_cpus[i].system =  testsys
607646Sgene.wu@arm.com            switch_cpus1[i].system =  testsys
617646Sgene.wu@arm.com            if not m5.build_env['FULL_SYSTEM']:
627646Sgene.wu@arm.com                switch_cpus[i].workload = testsys.cpu[i].workload
6312234Sgabeblack@google.com                switch_cpus1[i].workload = testsys.cpu[i].workload
647646Sgene.wu@arm.com            switch_cpus[i].clock = testsys.cpu[0].clock
657646Sgene.wu@arm.com            switch_cpus1[i].clock = testsys.cpu[0].clock
667646Sgene.wu@arm.com            if options.caches:
677646Sgene.wu@arm.com                switch_cpus[i].addPrivateSplitL1Caches(L1Cache(size = '32kB'),
687646Sgene.wu@arm.com                                                       L1Cache(size = '64kB'))
697646Sgene.wu@arm.com
707646Sgene.wu@arm.com            switch_cpus[i].mem = testsys.physmem
717646Sgene.wu@arm.com            switch_cpus1[i].mem = testsys.physmem
727205Sgblack@eecs.umich.edu            switch_cpus[i].connectMemPorts(testsys.membus)
7312234Sgabeblack@google.com            root.switch_cpus = switch_cpus
747205Sgblack@eecs.umich.edu            root.switch_cpus1 = switch_cpus1
757205Sgblack@eecs.umich.edu            switch_cpu_list = [(testsys.cpu[i], switch_cpus[i]) for i in xrange(np)]
767205Sgblack@eecs.umich.edu            switch_cpu_list1 = [(switch_cpus[i], switch_cpus1[i]) for i in xrange(np)]
777205Sgblack@eecs.umich.edu
787205Sgblack@eecs.umich.edu    m5.instantiate(root)
797205Sgblack@eecs.umich.edu
807205Sgblack@eecs.umich.edu    if options.checkpoint_restore:
817205Sgblack@eecs.umich.edu        from os.path import isdir
827205Sgblack@eecs.umich.edu        from os import listdir
837205Sgblack@eecs.umich.edu        import re
847205Sgblack@eecs.umich.edu
857205Sgblack@eecs.umich.edu        if not isdir(cptdir):
867205Sgblack@eecs.umich.edu            m5.panic("checkpoint dir %s does not exist!" % cptdir)
877205Sgblack@eecs.umich.edu
887205Sgblack@eecs.umich.edu        dirs = listdir(cptdir)
898442Sgblack@eecs.umich.edu        expr = re.compile('cpt.([0-9]*)')
908442Sgblack@eecs.umich.edu        cpts = []
917205Sgblack@eecs.umich.edu        for dir in dirs:
927205Sgblack@eecs.umich.edu            match = expr.match(dir)
937205Sgblack@eecs.umich.edu            if match:
947205Sgblack@eecs.umich.edu                cpts.append(match.group(1))
957205Sgblack@eecs.umich.edu
967205Sgblack@eecs.umich.edu        cpts.sort(lambda a,b: cmp(long(a), long(b)))
977205Sgblack@eecs.umich.edu
987205Sgblack@eecs.umich.edu        cpt_num = options.checkpoint_restore
997205Sgblack@eecs.umich.edu
1007597Sminkyu.jeong@arm.com        if cpt_num > len(cpts):
1017597Sminkyu.jeong@arm.com            m5.panic('Checkpoint %d not found' % cpt_num)
1027205Sgblack@eecs.umich.edu
1037205Sgblack@eecs.umich.edu        m5.restoreCheckpoint(root,
1047205Sgblack@eecs.umich.edu                             "/".join([cptdir, "cpt.%s" % cpts[cpt_num - 1]]))
1057205Sgblack@eecs.umich.edu
1067205Sgblack@eecs.umich.edu    if options.standard_switch:
1077205Sgblack@eecs.umich.edu        exit_event = m5.simulate(10000)
1087205Sgblack@eecs.umich.edu
10912234Sgabeblack@google.com        ## when you change to Timing (or Atomic), you halt the system given
1107205Sgblack@eecs.umich.edu        ## as argument.  When you are finished with the system changes
1117205Sgblack@eecs.umich.edu        ## (including switchCpus), you must resume the system manually.
1127205Sgblack@eecs.umich.edu        ## You DON'T need to resume after just switching CPUs if you haven't
1137205Sgblack@eecs.umich.edu        ## changed anything on the system level.
1147205Sgblack@eecs.umich.edu
1157205Sgblack@eecs.umich.edu        m5.changeToTiming(testsys)
1167205Sgblack@eecs.umich.edu        m5.switchCpus(switch_cpu_list)
1177205Sgblack@eecs.umich.edu        m5.resume(testsys)
1187205Sgblack@eecs.umich.edu
1197205Sgblack@eecs.umich.edu        exit_event = m5.simulate(options.warmup)
1207205Sgblack@eecs.umich.edu        m5.switchCpus(switch_cpu_list1)
1217205Sgblack@eecs.umich.edu
1227205Sgblack@eecs.umich.edu    num_checkpoints = 0
1237205Sgblack@eecs.umich.edu    exit_cause = ''
1247205Sgblack@eecs.umich.edu
1258442Sgblack@eecs.umich.edu    ## Checkpoints being taken via the command line at <when> and at subsequent
1268442Sgblack@eecs.umich.edu    ## periods of <period>.  Checkpoint instructions received from the benchmark running
1277205Sgblack@eecs.umich.edu    ## are ignored and skipped in favor of command line checkpoint instructions.
1287597Sminkyu.jeong@arm.com    if options.take_checkpoints:
1297597Sminkyu.jeong@arm.com        [when, period] = options.take_checkpoints.split(",", 1)
1307205Sgblack@eecs.umich.edu        when = int(when)
1317205Sgblack@eecs.umich.edu        period = int(period)
1327205Sgblack@eecs.umich.edu
1337205Sgblack@eecs.umich.edu        exit_event = m5.simulate(when)
1347205Sgblack@eecs.umich.edu        while exit_event.getCause() == "checkpoint":
1357205Sgblack@eecs.umich.edu            exit_event = m5.simulate(when - m5.curTick())
1367205Sgblack@eecs.umich.edu
13712234Sgabeblack@google.com        if exit_event.getCause() == "simulate() limit reached":
1387205Sgblack@eecs.umich.edu            m5.checkpoint(root, cptdir + "cpt.%d")
1397205Sgblack@eecs.umich.edu            num_checkpoints += 1
1407205Sgblack@eecs.umich.edu
1417205Sgblack@eecs.umich.edu        sim_ticks = when
1427205Sgblack@eecs.umich.edu        exit_cause = "maximum %d checkpoints dropped" % max_checkpoints
1437205Sgblack@eecs.umich.edu        while num_checkpoints < max_checkpoints:
1447205Sgblack@eecs.umich.edu            if (sim_ticks + period) > maxtick and maxtick != -1:
1457205Sgblack@eecs.umich.edu                exit_event = m5.simulate(maxtick - sim_ticks)
1467205Sgblack@eecs.umich.edu                exit_cause = exit_event.getCause()
1477205Sgblack@eecs.umich.edu                break
1488442Sgblack@eecs.umich.edu            else:
1498442Sgblack@eecs.umich.edu                exit_event = m5.simulate(period)
1507205Sgblack@eecs.umich.edu                sim_ticks += period
1517205Sgblack@eecs.umich.edu                while exit_event.getCause() == "checkpoint":
1527205Sgblack@eecs.umich.edu                    exit_event = m5.simulate(sim_ticks - m5.curTick())
1537205Sgblack@eecs.umich.edu                if exit_event.getCause() == "simulate() limit reached":
1547205Sgblack@eecs.umich.edu                    m5.checkpoint(root, cptdir + "cpt.%d")
1557205Sgblack@eecs.umich.edu                    num_checkpoints += 1
1567205Sgblack@eecs.umich.edu
1577205Sgblack@eecs.umich.edu    else: #no checkpoints being taken via this script
1587205Sgblack@eecs.umich.edu        exit_event = m5.simulate(maxtick)
1597205Sgblack@eecs.umich.edu
1607205Sgblack@eecs.umich.edu        while exit_event.getCause() == "checkpoint":
1617205Sgblack@eecs.umich.edu            m5.checkpoint(root, cptdir + "cpt.%d")
1627119Sgblack@eecs.umich.edu            num_checkpoints += 1
16312234Sgabeblack@google.com            if num_checkpoints == max_checkpoints:
1647119Sgblack@eecs.umich.edu                exit_cause =  "maximum %d checkpoints dropped" % max_checkpoints
1657119Sgblack@eecs.umich.edu                break
1667119Sgblack@eecs.umich.edu
1677119Sgblack@eecs.umich.edu            if maxtick == -1:
1687119Sgblack@eecs.umich.edu                exit_event = m5.simulate(maxtick)
1697119Sgblack@eecs.umich.edu            else:
1707119Sgblack@eecs.umich.edu                exit_event = m5.simulate(maxtick - m5.curTick())
1717119Sgblack@eecs.umich.edu
1727119Sgblack@eecs.umich.edu            exit_cause = exit_event.getCause()
1737119Sgblack@eecs.umich.edu
1747119Sgblack@eecs.umich.edu    if exit_cause == '':
1757119Sgblack@eecs.umich.edu        exit_cause = exit_event.getCause()
1768442Sgblack@eecs.umich.edu    print 'Exiting @ cycle', m5.curTick(), 'because ', exit_cause
1777119Sgblack@eecs.umich.edu
1787119Sgblack@eecs.umich.edu