Simulation.py revision 5822
15347Ssaidi@eecs.umich.edu# Copyright (c) 2006-2008 The Regents of The University of Michigan
23395Shsul@eecs.umich.edu# All rights reserved.
33395Shsul@eecs.umich.edu#
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53395Shsul@eecs.umich.edu# modification, are permitted provided that the following conditions are
63395Shsul@eecs.umich.edu# met: redistributions of source code must retain the above copyright
73395Shsul@eecs.umich.edu# notice, this list of conditions and the following disclaimer;
83395Shsul@eecs.umich.edu# redistributions in binary form must reproduce the above copyright
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123395Shsul@eecs.umich.edu# contributors may be used to endorse or promote products derived from
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263395Shsul@eecs.umich.edu#
273395Shsul@eecs.umich.edu# Authors: Lisa Hsu
283395Shsul@eecs.umich.edu
293395Shsul@eecs.umich.edufrom os import getcwd
303509Shsul@eecs.umich.edufrom os.path import join as joinpath
313395Shsul@eecs.umich.eduimport m5
323395Shsul@eecs.umich.edufrom m5.objects import *
333395Shsul@eecs.umich.edum5.AddToPath('../common')
343448Shsul@eecs.umich.edufrom Caches import L1Cache
353395Shsul@eecs.umich.edu
363481Shsul@eecs.umich.edudef setCPUClass(options):
373481Shsul@eecs.umich.edu
383481Shsul@eecs.umich.edu    atomic = False
393481Shsul@eecs.umich.edu    if options.timing:
405347Ssaidi@eecs.umich.edu        class TmpClass(TimingSimpleCPU): pass
413481Shsul@eecs.umich.edu    elif options.detailed:
423681Sktlim@umich.edu        if not options.caches:
433681Sktlim@umich.edu            print "O3 CPU must be used with caches"
443681Sktlim@umich.edu            sys.exit(1)
455347Ssaidi@eecs.umich.edu        class TmpClass(DerivO3CPU): pass
463481Shsul@eecs.umich.edu    else:
475347Ssaidi@eecs.umich.edu        class TmpClass(AtomicSimpleCPU): pass
483481Shsul@eecs.umich.edu        atomic = True
493481Shsul@eecs.umich.edu
503481Shsul@eecs.umich.edu    CPUClass = None
513481Shsul@eecs.umich.edu    test_mem_mode = 'atomic'
523481Shsul@eecs.umich.edu
533481Shsul@eecs.umich.edu    if not atomic:
545369Ssaidi@eecs.umich.edu        if options.checkpoint_restore != None or options.fast_forward:
553481Shsul@eecs.umich.edu            CPUClass = TmpClass
565347Ssaidi@eecs.umich.edu            class TmpClass(AtomicSimpleCPU): pass
573481Shsul@eecs.umich.edu        else:
583481Shsul@eecs.umich.edu            test_mem_mode = 'timing'
593481Shsul@eecs.umich.edu
603481Shsul@eecs.umich.edu    return (TmpClass, test_mem_mode, CPUClass)
613481Shsul@eecs.umich.edu
623481Shsul@eecs.umich.edu
633481Shsul@eecs.umich.edudef run(options, root, testsys, cpu_class):
643395Shsul@eecs.umich.edu    if options.maxtick:
653395Shsul@eecs.umich.edu        maxtick = options.maxtick
663395Shsul@eecs.umich.edu    elif options.maxtime:
674167Sbinkertn@umich.edu        simtime = m5.ticks.seconds(simtime)
683395Shsul@eecs.umich.edu        print "simulating for: ", simtime
693395Shsul@eecs.umich.edu        maxtick = simtime
703395Shsul@eecs.umich.edu    else:
713511Shsul@eecs.umich.edu        maxtick = m5.MaxTick
723395Shsul@eecs.umich.edu
733395Shsul@eecs.umich.edu    if options.checkpoint_dir:
743395Shsul@eecs.umich.edu        cptdir = options.checkpoint_dir
755211Ssaidi@eecs.umich.edu    elif m5.options.outdir:
765211Ssaidi@eecs.umich.edu        cptdir = m5.options.outdir
773395Shsul@eecs.umich.edu    else:
783395Shsul@eecs.umich.edu        cptdir = getcwd()
793395Shsul@eecs.umich.edu
805370Ssaidi@eecs.umich.edu    if options.fast_forward and options.checkpoint_restore != None:
815822Ssaidi@eecs.umich.edu        m5.fatal("Error: Can't specify both --fast-forward and --checkpoint-restore")
825370Ssaidi@eecs.umich.edu
835371Shsul@eecs.umich.edu    if options.standard_switch and not options.caches:
845822Ssaidi@eecs.umich.edu        m5.fatal("Error: Must specify --caches when using --standard-switch")
855370Ssaidi@eecs.umich.edu
863395Shsul@eecs.umich.edu    np = options.num_cpus
873395Shsul@eecs.umich.edu    max_checkpoints = options.max_checkpoints
883481Shsul@eecs.umich.edu    switch_cpus = None
893481Shsul@eecs.umich.edu
903481Shsul@eecs.umich.edu    if cpu_class:
913481Shsul@eecs.umich.edu        switch_cpus = [cpu_class(defer_registration=True, cpu_id=(np+i))
923481Shsul@eecs.umich.edu                       for i in xrange(np)]
933481Shsul@eecs.umich.edu
943481Shsul@eecs.umich.edu        for i in xrange(np):
955361Srstrong@cs.ucsd.edu            if options.fast_forward:
965369Ssaidi@eecs.umich.edu                testsys.cpu[i].max_insts_any_thread = int(options.fast_forward)
973481Shsul@eecs.umich.edu            switch_cpus[i].system =  testsys
983481Shsul@eecs.umich.edu            if not m5.build_env['FULL_SYSTEM']:
993481Shsul@eecs.umich.edu                switch_cpus[i].workload = testsys.cpu[i].workload
1003481Shsul@eecs.umich.edu            switch_cpus[i].clock = testsys.cpu[0].clock
1015369Ssaidi@eecs.umich.edu            # simulation period
1025369Ssaidi@eecs.umich.edu            if options.max_inst:
1035369Ssaidi@eecs.umich.edu                switch_cpus[i].max_insts_any_thread = options.max_inst
1043481Shsul@eecs.umich.edu
1055311Ssaidi@eecs.umich.edu        testsys.switch_cpus = switch_cpus
1063481Shsul@eecs.umich.edu        switch_cpu_list = [(testsys.cpu[i], switch_cpus[i]) for i in xrange(np)]
1073395Shsul@eecs.umich.edu
1083395Shsul@eecs.umich.edu    if options.standard_switch:
1093395Shsul@eecs.umich.edu        switch_cpus = [TimingSimpleCPU(defer_registration=True, cpu_id=(np+i))
1103395Shsul@eecs.umich.edu                       for i in xrange(np)]
1113478Shsul@eecs.umich.edu        switch_cpus_1 = [DerivO3CPU(defer_registration=True, cpu_id=(2*np+i))
1123395Shsul@eecs.umich.edu                        for i in xrange(np)]
1133478Shsul@eecs.umich.edu
1143395Shsul@eecs.umich.edu        for i in xrange(np):
1153395Shsul@eecs.umich.edu            switch_cpus[i].system =  testsys
1163478Shsul@eecs.umich.edu            switch_cpus_1[i].system =  testsys
1173395Shsul@eecs.umich.edu            if not m5.build_env['FULL_SYSTEM']:
1183395Shsul@eecs.umich.edu                switch_cpus[i].workload = testsys.cpu[i].workload
1193478Shsul@eecs.umich.edu                switch_cpus_1[i].workload = testsys.cpu[i].workload
1203395Shsul@eecs.umich.edu            switch_cpus[i].clock = testsys.cpu[0].clock
1213478Shsul@eecs.umich.edu            switch_cpus_1[i].clock = testsys.cpu[0].clock
1223480Shsul@eecs.umich.edu
1235361Srstrong@cs.ucsd.edu            # if restoring, make atomic cpu simulate only a few instructions
1245369Ssaidi@eecs.umich.edu            if options.checkpoint_restore != None:
1255361Srstrong@cs.ucsd.edu                testsys.cpu[i].max_insts_any_thread = 1
1265361Srstrong@cs.ucsd.edu            # Fast forward to specified location if we are not restoring
1275361Srstrong@cs.ucsd.edu            elif options.fast_forward:
1285369Ssaidi@eecs.umich.edu                testsys.cpu[i].max_insts_any_thread = int(options.fast_forward)
1295361Srstrong@cs.ucsd.edu            # Fast forward to a simpoint (warning: time consuming)
1305361Srstrong@cs.ucsd.edu            elif options.simpoint:
1315378Ssaidi@eecs.umich.edu                if testsys.cpu[i].workload[0].simpoint == 0:
1325822Ssaidi@eecs.umich.edu                    m5.fatal('simpoint not found')
1335361Srstrong@cs.ucsd.edu                testsys.cpu[i].max_insts_any_thread = \
1345361Srstrong@cs.ucsd.edu                    testsys.cpu[i].workload[0].simpoint
1355361Srstrong@cs.ucsd.edu            # No distance specified, just switch
1365361Srstrong@cs.ucsd.edu            else:
1375361Srstrong@cs.ucsd.edu                testsys.cpu[i].max_insts_any_thread = 1
1385361Srstrong@cs.ucsd.edu
1395361Srstrong@cs.ucsd.edu            # warmup period
1405361Srstrong@cs.ucsd.edu            if options.warmup_insts:
1415361Srstrong@cs.ucsd.edu                switch_cpus[i].max_insts_any_thread =  options.warmup_insts
1425361Srstrong@cs.ucsd.edu
1435361Srstrong@cs.ucsd.edu            # simulation period
1445353Svilas.sridharan@gmail.com            if options.max_inst:
1455353Svilas.sridharan@gmail.com                switch_cpus_1[i].max_insts_any_thread = options.max_inst
1465353Svilas.sridharan@gmail.com
1473514Sktlim@umich.edu            if not options.caches:
1483481Shsul@eecs.umich.edu                # O3 CPU must have a cache to work.
1493480Shsul@eecs.umich.edu                switch_cpus_1[i].addPrivateSplitL1Caches(L1Cache(size = '32kB'),
1503480Shsul@eecs.umich.edu                                                         L1Cache(size = '64kB'))
1513480Shsul@eecs.umich.edu                switch_cpus_1[i].connectMemPorts(testsys.membus)
1523395Shsul@eecs.umich.edu
1533514Sktlim@umich.edu            testsys.switch_cpus = switch_cpus
1543514Sktlim@umich.edu            testsys.switch_cpus_1 = switch_cpus_1
1553395Shsul@eecs.umich.edu            switch_cpu_list = [(testsys.cpu[i], switch_cpus[i]) for i in xrange(np)]
1563478Shsul@eecs.umich.edu            switch_cpu_list1 = [(switch_cpus[i], switch_cpus_1[i]) for i in xrange(np)]
1573395Shsul@eecs.umich.edu
1585361Srstrong@cs.ucsd.edu    # set the checkpoint in the cpu before m5.instantiate is called
1595369Ssaidi@eecs.umich.edu    if options.take_checkpoints != None and \
1605361Srstrong@cs.ucsd.edu           (options.simpoint or options.at_instruction):
1615361Srstrong@cs.ucsd.edu        offset = int(options.take_checkpoints)
1625361Srstrong@cs.ucsd.edu        # Set an instruction break point
1635361Srstrong@cs.ucsd.edu        if options.simpoint:
1645361Srstrong@cs.ucsd.edu            for i in xrange(np):
1655378Ssaidi@eecs.umich.edu                if testsys.cpu[i].workload[0].simpoint == 0:
1665822Ssaidi@eecs.umich.edu                    m5.fatal('no simpoint for testsys.cpu[%d].workload[0]', i)
1675369Ssaidi@eecs.umich.edu                checkpoint_inst = int(testsys.cpu[i].workload[0].simpoint) + offset
1685361Srstrong@cs.ucsd.edu                testsys.cpu[i].max_insts_any_thread = checkpoint_inst
1695361Srstrong@cs.ucsd.edu                # used for output below
1705361Srstrong@cs.ucsd.edu                options.take_checkpoints = checkpoint_inst
1715361Srstrong@cs.ucsd.edu        else:
1725361Srstrong@cs.ucsd.edu            options.take_checkpoints = offset
1735361Srstrong@cs.ucsd.edu            # Set all test cpus with the right number of instructions
1745361Srstrong@cs.ucsd.edu            # for the upcoming simulation
1755361Srstrong@cs.ucsd.edu            for i in xrange(np):
1765361Srstrong@cs.ucsd.edu                testsys.cpu[i].max_insts_any_thread = offset
1775361Srstrong@cs.ucsd.edu
1783395Shsul@eecs.umich.edu    m5.instantiate(root)
1793395Shsul@eecs.umich.edu
1805369Ssaidi@eecs.umich.edu    if options.checkpoint_restore != None:
1815361Srstrong@cs.ucsd.edu        from os.path import isdir, exists
1823395Shsul@eecs.umich.edu        from os import listdir
1833395Shsul@eecs.umich.edu        import re
1843395Shsul@eecs.umich.edu
1853395Shsul@eecs.umich.edu        if not isdir(cptdir):
1865822Ssaidi@eecs.umich.edu            m5.fatal("checkpoint dir %s does not exist!", cptdir)
1873395Shsul@eecs.umich.edu
1885361Srstrong@cs.ucsd.edu        if options.at_instruction:
1895361Srstrong@cs.ucsd.edu            checkpoint_dir = joinpath(cptdir, "cpt.%s.%s" % \
1905361Srstrong@cs.ucsd.edu                    (options.bench, options.checkpoint_restore))
1915361Srstrong@cs.ucsd.edu            if not exists(checkpoint_dir):
1925822Ssaidi@eecs.umich.edu                m5.fatal("Unable to find checkpoint directory %s",
1935361Srstrong@cs.ucsd.edu                         checkpoint_dir)
1943395Shsul@eecs.umich.edu
1955361Srstrong@cs.ucsd.edu            print "Restoring checkpoint ..."
1965361Srstrong@cs.ucsd.edu            m5.restoreCheckpoint(root, checkpoint_dir)
1975361Srstrong@cs.ucsd.edu            print "Done."
1985361Srstrong@cs.ucsd.edu        elif options.simpoint:
1995361Srstrong@cs.ucsd.edu            # assume workload 0 has the simpoint
2005378Ssaidi@eecs.umich.edu            if testsys.cpu[0].workload[0].simpoint == 0:
2015822Ssaidi@eecs.umich.edu                m5.fatal('Unable to find simpoint')
2023395Shsul@eecs.umich.edu
2035361Srstrong@cs.ucsd.edu            options.checkpoint_restore += \
2045369Ssaidi@eecs.umich.edu                int(testsys.cpu[0].workload[0].simpoint)
2053395Shsul@eecs.umich.edu
2065361Srstrong@cs.ucsd.edu            checkpoint_dir = joinpath(cptdir, "cpt.%s.%d" % \
2075361Srstrong@cs.ucsd.edu                    (options.bench, options.checkpoint_restore))
2085361Srstrong@cs.ucsd.edu            if not exists(checkpoint_dir):
2095822Ssaidi@eecs.umich.edu                m5.fatal("Unable to find checkpoint directory %s.%s",
2105822Ssaidi@eecs.umich.edu                        options.bench, options.checkpoint_restore)
2113395Shsul@eecs.umich.edu
2125361Srstrong@cs.ucsd.edu            print "Restoring checkpoint ..."
2135361Srstrong@cs.ucsd.edu            m5.restoreCheckpoint(root,checkpoint_dir)
2145361Srstrong@cs.ucsd.edu            print "Done."
2155361Srstrong@cs.ucsd.edu        else:
2165361Srstrong@cs.ucsd.edu            dirs = listdir(cptdir)
2175361Srstrong@cs.ucsd.edu            expr = re.compile('cpt\.([0-9]*)')
2185361Srstrong@cs.ucsd.edu            cpts = []
2195361Srstrong@cs.ucsd.edu            for dir in dirs:
2205361Srstrong@cs.ucsd.edu                match = expr.match(dir)
2215361Srstrong@cs.ucsd.edu                if match:
2225361Srstrong@cs.ucsd.edu                    cpts.append(match.group(1))
2233999Ssaidi@eecs.umich.edu
2245361Srstrong@cs.ucsd.edu            cpts.sort(lambda a,b: cmp(long(a), long(b)))
2255361Srstrong@cs.ucsd.edu
2265361Srstrong@cs.ucsd.edu            cpt_num = options.checkpoint_restore
2275361Srstrong@cs.ucsd.edu
2285361Srstrong@cs.ucsd.edu            if cpt_num > len(cpts):
2295822Ssaidi@eecs.umich.edu                m5.fatal('Checkpoint %d not found', cpt_num)
2305361Srstrong@cs.ucsd.edu
2315361Srstrong@cs.ucsd.edu            ## Adjust max tick based on our starting tick
2325361Srstrong@cs.ucsd.edu            maxtick = maxtick - int(cpts[cpt_num - 1])
2335361Srstrong@cs.ucsd.edu
2345361Srstrong@cs.ucsd.edu            ## Restore the checkpoint
2355361Srstrong@cs.ucsd.edu            m5.restoreCheckpoint(root,
2365361Srstrong@cs.ucsd.edu                    joinpath(cptdir, "cpt.%s" % cpts[cpt_num - 1]))
2373395Shsul@eecs.umich.edu
2383481Shsul@eecs.umich.edu    if options.standard_switch or cpu_class:
2395361Srstrong@cs.ucsd.edu        if options.standard_switch:
2405361Srstrong@cs.ucsd.edu            print "Switch at instruction count:%s" % \
2415361Srstrong@cs.ucsd.edu                    str(testsys.cpu[0].max_insts_any_thread)
2425361Srstrong@cs.ucsd.edu            exit_event = m5.simulate()
2435361Srstrong@cs.ucsd.edu        elif cpu_class and options.fast_forward:
2445361Srstrong@cs.ucsd.edu            print "Switch at instruction count:%s" % \
2455361Srstrong@cs.ucsd.edu                    str(testsys.cpu[0].max_insts_any_thread)
2465361Srstrong@cs.ucsd.edu            exit_event = m5.simulate()
2475361Srstrong@cs.ucsd.edu        else:
2485361Srstrong@cs.ucsd.edu            print "Switch at curTick count:%s" % str(10000)
2495361Srstrong@cs.ucsd.edu            exit_event = m5.simulate(10000)
2505361Srstrong@cs.ucsd.edu        print "Switched CPUS @ cycle = %s" % (m5.curTick())
2513395Shsul@eecs.umich.edu
2525361Srstrong@cs.ucsd.edu        # when you change to Timing (or Atomic), you halt the system
2535361Srstrong@cs.ucsd.edu        # given as argument.  When you are finished with the system
2545361Srstrong@cs.ucsd.edu        # changes (including switchCpus), you must resume the system
2555361Srstrong@cs.ucsd.edu        # manually.  You DON'T need to resume after just switching
2565361Srstrong@cs.ucsd.edu        # CPUs if you haven't changed anything on the system level.
2573395Shsul@eecs.umich.edu
2583395Shsul@eecs.umich.edu        m5.changeToTiming(testsys)
2593395Shsul@eecs.umich.edu        m5.switchCpus(switch_cpu_list)
2603395Shsul@eecs.umich.edu        m5.resume(testsys)
2613395Shsul@eecs.umich.edu
2623481Shsul@eecs.umich.edu        if options.standard_switch:
2635361Srstrong@cs.ucsd.edu            print "Switch at instruction count:%d" % \
2645361Srstrong@cs.ucsd.edu                    (testsys.switch_cpus[0].max_insts_any_thread)
2655361Srstrong@cs.ucsd.edu
2665361Srstrong@cs.ucsd.edu            #warmup instruction count may have already been set
2675361Srstrong@cs.ucsd.edu            if options.warmup_insts:
2685361Srstrong@cs.ucsd.edu                exit_event = m5.simulate()
2695361Srstrong@cs.ucsd.edu            else:
2705353Svilas.sridharan@gmail.com                exit_event = m5.simulate(options.warmup)
2715361Srstrong@cs.ucsd.edu            print "Switching CPUS @ cycle = %s" % (m5.curTick())
2725361Srstrong@cs.ucsd.edu            print "Simulation ends instruction count:%d" % \
2735361Srstrong@cs.ucsd.edu                    (testsys.switch_cpus_1[0].max_insts_any_thread)
2745072Ssaidi@eecs.umich.edu            m5.drain(testsys)
2753481Shsul@eecs.umich.edu            m5.switchCpus(switch_cpu_list1)
2765072Ssaidi@eecs.umich.edu            m5.resume(testsys)
2773395Shsul@eecs.umich.edu
2783395Shsul@eecs.umich.edu    num_checkpoints = 0
2793395Shsul@eecs.umich.edu    exit_cause = ''
2803395Shsul@eecs.umich.edu
2815361Srstrong@cs.ucsd.edu    # Checkpoints being taken via the command line at <when> and at
2825361Srstrong@cs.ucsd.edu    # subsequent periods of <period>.  Checkpoint instructions
2835361Srstrong@cs.ucsd.edu    # received from the benchmark running are ignored and skipped in
2845361Srstrong@cs.ucsd.edu    # favor of command line checkpoint instructions.
2855369Ssaidi@eecs.umich.edu    if options.take_checkpoints != None :
2865361Srstrong@cs.ucsd.edu        if options.at_instruction or options.simpoint:
2875369Ssaidi@eecs.umich.edu            checkpoint_inst = int(options.take_checkpoints)
2883395Shsul@eecs.umich.edu
2895361Srstrong@cs.ucsd.edu            # maintain correct offset if we restored from some instruction
2905369Ssaidi@eecs.umich.edu            if options.checkpoint_restore != None:
2915361Srstrong@cs.ucsd.edu                checkpoint_inst += options.checkpoint_restore
2923395Shsul@eecs.umich.edu
2935361Srstrong@cs.ucsd.edu            print "Creating checkpoint at inst:%d" % (checkpoint_inst)
2945361Srstrong@cs.ucsd.edu            exit_event = m5.simulate()
2955361Srstrong@cs.ucsd.edu            print "exit cause = %s" % (exit_event.getCause())
2963395Shsul@eecs.umich.edu
2975361Srstrong@cs.ucsd.edu            # skip checkpoint instructions should they exist
2985361Srstrong@cs.ucsd.edu            while exit_event.getCause() == "checkpoint":
2995361Srstrong@cs.ucsd.edu                exit_event = m5.simulate()
3003999Ssaidi@eecs.umich.edu
3015361Srstrong@cs.ucsd.edu            if exit_event.getCause() == \
3025361Srstrong@cs.ucsd.edu                   "a thread reached the max instruction count":
3035361Srstrong@cs.ucsd.edu                m5.checkpoint(root, joinpath(cptdir, "cpt.%s.%d" % \
3045361Srstrong@cs.ucsd.edu                        (options.bench, checkpoint_inst)))
3055361Srstrong@cs.ucsd.edu                print "Checkpoint written."
3065361Srstrong@cs.ucsd.edu                num_checkpoints += 1
3073999Ssaidi@eecs.umich.edu
3085361Srstrong@cs.ucsd.edu            if exit_event.getCause() == "user interrupt received":
3095361Srstrong@cs.ucsd.edu                exit_cause = exit_event.getCause();
3105361Srstrong@cs.ucsd.edu        else:
3115369Ssaidi@eecs.umich.edu            when, period = options.take_checkpoints.split(",", 1)
3125369Ssaidi@eecs.umich.edu            when = int(when)
3135369Ssaidi@eecs.umich.edu            period = int(period)
3145369Ssaidi@eecs.umich.edu
3155361Srstrong@cs.ucsd.edu            exit_event = m5.simulate(when)
3165361Srstrong@cs.ucsd.edu            while exit_event.getCause() == "checkpoint":
3175361Srstrong@cs.ucsd.edu                exit_event = m5.simulate(when - m5.curTick())
3185361Srstrong@cs.ucsd.edu
3195361Srstrong@cs.ucsd.edu            if exit_event.getCause() == "simulate() limit reached":
3205361Srstrong@cs.ucsd.edu                m5.checkpoint(root, joinpath(cptdir, "cpt.%d"))
3215361Srstrong@cs.ucsd.edu                num_checkpoints += 1
3225361Srstrong@cs.ucsd.edu
3235361Srstrong@cs.ucsd.edu            sim_ticks = when
3245361Srstrong@cs.ucsd.edu            exit_cause = "maximum %d checkpoints dropped" % max_checkpoints
3255361Srstrong@cs.ucsd.edu            while num_checkpoints < max_checkpoints and \
3265361Srstrong@cs.ucsd.edu                    exit_event.getCause() == "simulate() limit reached":
3275361Srstrong@cs.ucsd.edu                if (sim_ticks + period) > maxtick:
3285361Srstrong@cs.ucsd.edu                    exit_event = m5.simulate(maxtick - sim_ticks)
3295361Srstrong@cs.ucsd.edu                    exit_cause = exit_event.getCause()
3305361Srstrong@cs.ucsd.edu                    break
3315361Srstrong@cs.ucsd.edu                else:
3325361Srstrong@cs.ucsd.edu                    exit_event = m5.simulate(period)
3335361Srstrong@cs.ucsd.edu                    sim_ticks += period
3345361Srstrong@cs.ucsd.edu                    while exit_event.getCause() == "checkpoint":
3355361Srstrong@cs.ucsd.edu                        exit_event = m5.simulate(sim_ticks - m5.curTick())
3365361Srstrong@cs.ucsd.edu                    if exit_event.getCause() == "simulate() limit reached":
3375361Srstrong@cs.ucsd.edu                        m5.checkpoint(root, joinpath(cptdir, "cpt.%d"))
3385361Srstrong@cs.ucsd.edu                        num_checkpoints += 1
3395361Srstrong@cs.ucsd.edu
3405361Srstrong@cs.ucsd.edu            if exit_event.getCause() != "simulate() limit reached":
3415361Srstrong@cs.ucsd.edu                exit_cause = exit_event.getCause();
3425361Srstrong@cs.ucsd.edu
3435361Srstrong@cs.ucsd.edu    else: # no checkpoints being taken via this script
3445361Srstrong@cs.ucsd.edu        if options.fast_forward:
3455361Srstrong@cs.ucsd.edu            m5.stats.reset()
3465361Srstrong@cs.ucsd.edu        print "**** REAL SIMULATION ****"
3473395Shsul@eecs.umich.edu        exit_event = m5.simulate(maxtick)
3483395Shsul@eecs.umich.edu
3493395Shsul@eecs.umich.edu        while exit_event.getCause() == "checkpoint":
3503509Shsul@eecs.umich.edu            m5.checkpoint(root, joinpath(cptdir, "cpt.%d"))
3513395Shsul@eecs.umich.edu            num_checkpoints += 1
3523395Shsul@eecs.umich.edu            if num_checkpoints == max_checkpoints:
3535361Srstrong@cs.ucsd.edu                exit_cause = "maximum %d checkpoints dropped" % max_checkpoints
3543395Shsul@eecs.umich.edu                break
3553395Shsul@eecs.umich.edu
3563511Shsul@eecs.umich.edu            exit_event = m5.simulate(maxtick - m5.curTick())
3573395Shsul@eecs.umich.edu            exit_cause = exit_event.getCause()
3583395Shsul@eecs.umich.edu
3593395Shsul@eecs.umich.edu    if exit_cause == '':
3603395Shsul@eecs.umich.edu        exit_cause = exit_event.getCause()
3613514Sktlim@umich.edu    print 'Exiting @ cycle %i because %s' % (m5.curTick(), exit_cause)
3623395Shsul@eecs.umich.edu
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