Simulation.py revision 5361
15347Ssaidi@eecs.umich.edu# Copyright (c) 2006-2008 The Regents of The University of Michigan 23395Shsul@eecs.umich.edu# All rights reserved. 33395Shsul@eecs.umich.edu# 43395Shsul@eecs.umich.edu# Redistribution and use in source and binary forms, with or without 53395Shsul@eecs.umich.edu# modification, are permitted provided that the following conditions are 63395Shsul@eecs.umich.edu# met: redistributions of source code must retain the above copyright 73395Shsul@eecs.umich.edu# notice, this list of conditions and the following disclaimer; 83395Shsul@eecs.umich.edu# redistributions in binary form must reproduce the above copyright 93395Shsul@eecs.umich.edu# notice, this list of conditions and the following disclaimer in the 103395Shsul@eecs.umich.edu# documentation and/or other materials provided with the distribution; 113395Shsul@eecs.umich.edu# neither the name of the copyright holders nor the names of its 123395Shsul@eecs.umich.edu# contributors may be used to endorse or promote products derived from 133395Shsul@eecs.umich.edu# this software without specific prior written permission. 143395Shsul@eecs.umich.edu# 153395Shsul@eecs.umich.edu# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 163395Shsul@eecs.umich.edu# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 173395Shsul@eecs.umich.edu# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 183395Shsul@eecs.umich.edu# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 193395Shsul@eecs.umich.edu# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 203395Shsul@eecs.umich.edu# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 213395Shsul@eecs.umich.edu# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 223395Shsul@eecs.umich.edu# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 233395Shsul@eecs.umich.edu# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 243395Shsul@eecs.umich.edu# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 253395Shsul@eecs.umich.edu# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 263395Shsul@eecs.umich.edu# 273395Shsul@eecs.umich.edu# Authors: Lisa Hsu 283395Shsul@eecs.umich.edu 293395Shsul@eecs.umich.edufrom os import getcwd 303509Shsul@eecs.umich.edufrom os.path import join as joinpath 313395Shsul@eecs.umich.eduimport m5 323395Shsul@eecs.umich.edufrom m5.objects import * 333395Shsul@eecs.umich.edum5.AddToPath('../common') 343448Shsul@eecs.umich.edufrom Caches import L1Cache 353395Shsul@eecs.umich.edu 363481Shsul@eecs.umich.edudef setCPUClass(options): 373481Shsul@eecs.umich.edu 383481Shsul@eecs.umich.edu atomic = False 393481Shsul@eecs.umich.edu if options.timing: 405347Ssaidi@eecs.umich.edu class TmpClass(TimingSimpleCPU): pass 413481Shsul@eecs.umich.edu elif options.detailed: 423681Sktlim@umich.edu if not options.caches: 433681Sktlim@umich.edu print "O3 CPU must be used with caches" 443681Sktlim@umich.edu sys.exit(1) 455347Ssaidi@eecs.umich.edu class TmpClass(DerivO3CPU): pass 463481Shsul@eecs.umich.edu else: 475347Ssaidi@eecs.umich.edu class TmpClass(AtomicSimpleCPU): pass 483481Shsul@eecs.umich.edu atomic = True 493481Shsul@eecs.umich.edu 503481Shsul@eecs.umich.edu CPUClass = None 513481Shsul@eecs.umich.edu test_mem_mode = 'atomic' 523481Shsul@eecs.umich.edu 533481Shsul@eecs.umich.edu if not atomic: 545361Srstrong@cs.ucsd.edu if options.checkpoint_restore or options.fast_forward: 553481Shsul@eecs.umich.edu CPUClass = TmpClass 565347Ssaidi@eecs.umich.edu class TmpClass(AtomicSimpleCPU): pass 573481Shsul@eecs.umich.edu else: 583481Shsul@eecs.umich.edu test_mem_mode = 'timing' 593481Shsul@eecs.umich.edu 603481Shsul@eecs.umich.edu return (TmpClass, test_mem_mode, CPUClass) 613481Shsul@eecs.umich.edu 623481Shsul@eecs.umich.edu 633481Shsul@eecs.umich.edudef run(options, root, testsys, cpu_class): 643395Shsul@eecs.umich.edu if options.maxtick: 653395Shsul@eecs.umich.edu maxtick = options.maxtick 663395Shsul@eecs.umich.edu elif options.maxtime: 674167Sbinkertn@umich.edu simtime = m5.ticks.seconds(simtime) 683395Shsul@eecs.umich.edu print "simulating for: ", simtime 693395Shsul@eecs.umich.edu maxtick = simtime 703395Shsul@eecs.umich.edu else: 713511Shsul@eecs.umich.edu maxtick = m5.MaxTick 723395Shsul@eecs.umich.edu 733395Shsul@eecs.umich.edu if options.checkpoint_dir: 743395Shsul@eecs.umich.edu cptdir = options.checkpoint_dir 755211Ssaidi@eecs.umich.edu elif m5.options.outdir: 765211Ssaidi@eecs.umich.edu cptdir = m5.options.outdir 773395Shsul@eecs.umich.edu else: 783395Shsul@eecs.umich.edu cptdir = getcwd() 793395Shsul@eecs.umich.edu 803395Shsul@eecs.umich.edu np = options.num_cpus 813395Shsul@eecs.umich.edu max_checkpoints = options.max_checkpoints 823481Shsul@eecs.umich.edu switch_cpus = None 833481Shsul@eecs.umich.edu 843481Shsul@eecs.umich.edu if cpu_class: 853481Shsul@eecs.umich.edu switch_cpus = [cpu_class(defer_registration=True, cpu_id=(np+i)) 863481Shsul@eecs.umich.edu for i in xrange(np)] 873481Shsul@eecs.umich.edu 883481Shsul@eecs.umich.edu for i in xrange(np): 895361Srstrong@cs.ucsd.edu if options.fast_forward: 905361Srstrong@cs.ucsd.edu testsys.cpu[i].max_insts_any_thread = options.fast_forward 913481Shsul@eecs.umich.edu switch_cpus[i].system = testsys 923481Shsul@eecs.umich.edu if not m5.build_env['FULL_SYSTEM']: 933481Shsul@eecs.umich.edu switch_cpus[i].workload = testsys.cpu[i].workload 943481Shsul@eecs.umich.edu switch_cpus[i].clock = testsys.cpu[0].clock 953481Shsul@eecs.umich.edu 965311Ssaidi@eecs.umich.edu testsys.switch_cpus = switch_cpus 973481Shsul@eecs.umich.edu switch_cpu_list = [(testsys.cpu[i], switch_cpus[i]) for i in xrange(np)] 983395Shsul@eecs.umich.edu 993395Shsul@eecs.umich.edu if options.standard_switch: 1003395Shsul@eecs.umich.edu switch_cpus = [TimingSimpleCPU(defer_registration=True, cpu_id=(np+i)) 1013395Shsul@eecs.umich.edu for i in xrange(np)] 1023478Shsul@eecs.umich.edu switch_cpus_1 = [DerivO3CPU(defer_registration=True, cpu_id=(2*np+i)) 1033395Shsul@eecs.umich.edu for i in xrange(np)] 1043478Shsul@eecs.umich.edu 1053395Shsul@eecs.umich.edu for i in xrange(np): 1063395Shsul@eecs.umich.edu switch_cpus[i].system = testsys 1073478Shsul@eecs.umich.edu switch_cpus_1[i].system = testsys 1083395Shsul@eecs.umich.edu if not m5.build_env['FULL_SYSTEM']: 1093395Shsul@eecs.umich.edu switch_cpus[i].workload = testsys.cpu[i].workload 1103478Shsul@eecs.umich.edu switch_cpus_1[i].workload = testsys.cpu[i].workload 1113395Shsul@eecs.umich.edu switch_cpus[i].clock = testsys.cpu[0].clock 1123478Shsul@eecs.umich.edu switch_cpus_1[i].clock = testsys.cpu[0].clock 1133480Shsul@eecs.umich.edu 1145361Srstrong@cs.ucsd.edu # if restoring, make atomic cpu simulate only a few instructions 1155361Srstrong@cs.ucsd.edu if options.checkpoint_restore: 1165361Srstrong@cs.ucsd.edu testsys.cpu[i].max_insts_any_thread = 1 1175361Srstrong@cs.ucsd.edu # Fast forward to specified location if we are not restoring 1185361Srstrong@cs.ucsd.edu elif options.fast_forward: 1195361Srstrong@cs.ucsd.edu testsys.cpu[i].max_insts_any_thread = options.fast_forward 1205361Srstrong@cs.ucsd.edu # Fast forward to a simpoint (warning: time consuming) 1215361Srstrong@cs.ucsd.edu elif options.simpoint: 1225361Srstrong@cs.ucsd.edu if testsys.cpu[i].workload[0].simpoint == None: 1235361Srstrong@cs.ucsd.edu m5.panic('simpoint not found') 1245361Srstrong@cs.ucsd.edu testsys.cpu[i].max_insts_any_thread = \ 1255361Srstrong@cs.ucsd.edu testsys.cpu[i].workload[0].simpoint 1265361Srstrong@cs.ucsd.edu # No distance specified, just switch 1275361Srstrong@cs.ucsd.edu else: 1285361Srstrong@cs.ucsd.edu testsys.cpu[i].max_insts_any_thread = 1 1295361Srstrong@cs.ucsd.edu 1305361Srstrong@cs.ucsd.edu # warmup period 1315361Srstrong@cs.ucsd.edu if options.warmup_insts: 1325361Srstrong@cs.ucsd.edu switch_cpus[i].max_insts_any_thread = options.warmup_insts 1335361Srstrong@cs.ucsd.edu 1345361Srstrong@cs.ucsd.edu # simulation period 1355353Svilas.sridharan@gmail.com if options.max_inst: 1365353Svilas.sridharan@gmail.com switch_cpus_1[i].max_insts_any_thread = options.max_inst 1375353Svilas.sridharan@gmail.com 1383514Sktlim@umich.edu if not options.caches: 1393481Shsul@eecs.umich.edu # O3 CPU must have a cache to work. 1403480Shsul@eecs.umich.edu switch_cpus_1[i].addPrivateSplitL1Caches(L1Cache(size = '32kB'), 1413480Shsul@eecs.umich.edu L1Cache(size = '64kB')) 1423480Shsul@eecs.umich.edu switch_cpus_1[i].connectMemPorts(testsys.membus) 1433395Shsul@eecs.umich.edu 1443514Sktlim@umich.edu testsys.switch_cpus = switch_cpus 1453514Sktlim@umich.edu testsys.switch_cpus_1 = switch_cpus_1 1463395Shsul@eecs.umich.edu switch_cpu_list = [(testsys.cpu[i], switch_cpus[i]) for i in xrange(np)] 1473478Shsul@eecs.umich.edu switch_cpu_list1 = [(switch_cpus[i], switch_cpus_1[i]) for i in xrange(np)] 1483395Shsul@eecs.umich.edu 1495361Srstrong@cs.ucsd.edu # set the checkpoint in the cpu before m5.instantiate is called 1505361Srstrong@cs.ucsd.edu if options.take_checkpoints and \ 1515361Srstrong@cs.ucsd.edu (options.simpoint or options.at_instruction): 1525361Srstrong@cs.ucsd.edu offset = int(options.take_checkpoints) 1535361Srstrong@cs.ucsd.edu # Set an instruction break point 1545361Srstrong@cs.ucsd.edu if options.simpoint: 1555361Srstrong@cs.ucsd.edu for i in xrange(np): 1565361Srstrong@cs.ucsd.edu if testsys.cpu[i].workload[0].simpoint == None: 1575361Srstrong@cs.ucsd.edu m5.panic('no simpoint for testsys.cpu[%d].workload[0]' % i) 1585361Srstrong@cs.ucsd.edu checkpoint_inst = testsys.cpu[i].workload[0].simpoint + offset 1595361Srstrong@cs.ucsd.edu testsys.cpu[i].max_insts_any_thread = checkpoint_inst 1605361Srstrong@cs.ucsd.edu # used for output below 1615361Srstrong@cs.ucsd.edu options.take_checkpoints = checkpoint_inst 1625361Srstrong@cs.ucsd.edu else: 1635361Srstrong@cs.ucsd.edu options.take_checkpoints = offset 1645361Srstrong@cs.ucsd.edu # Set all test cpus with the right number of instructions 1655361Srstrong@cs.ucsd.edu # for the upcoming simulation 1665361Srstrong@cs.ucsd.edu for i in xrange(np): 1675361Srstrong@cs.ucsd.edu testsys.cpu[i].max_insts_any_thread = offset 1685361Srstrong@cs.ucsd.edu 1695361Srstrong@cs.ucsd.edu testsys.cpu_switch_list = cpu_switch_list 1705353Svilas.sridharan@gmail.com 1713395Shsul@eecs.umich.edu m5.instantiate(root) 1723395Shsul@eecs.umich.edu 1733395Shsul@eecs.umich.edu if options.checkpoint_restore: 1745361Srstrong@cs.ucsd.edu from os.path import isdir, exists 1753395Shsul@eecs.umich.edu from os import listdir 1763395Shsul@eecs.umich.edu import re 1773395Shsul@eecs.umich.edu 1783395Shsul@eecs.umich.edu if not isdir(cptdir): 1793395Shsul@eecs.umich.edu m5.panic("checkpoint dir %s does not exist!" % cptdir) 1803395Shsul@eecs.umich.edu 1815361Srstrong@cs.ucsd.edu if options.at_instruction: 1825361Srstrong@cs.ucsd.edu checkpoint_dir = joinpath(cptdir, "cpt.%s.%s" % \ 1835361Srstrong@cs.ucsd.edu (options.bench, options.checkpoint_restore)) 1845361Srstrong@cs.ucsd.edu if not exists(checkpoint_dir): 1855361Srstrong@cs.ucsd.edu m5.panic("Unable to find checkpoint directory %s" % \ 1865361Srstrong@cs.ucsd.edu checkpoint_dir) 1873395Shsul@eecs.umich.edu 1885361Srstrong@cs.ucsd.edu print "Restoring checkpoint ..." 1895361Srstrong@cs.ucsd.edu m5.restoreCheckpoint(root, checkpoint_dir) 1905361Srstrong@cs.ucsd.edu print "Done." 1915361Srstrong@cs.ucsd.edu elif options.simpoint: 1925361Srstrong@cs.ucsd.edu # assume workload 0 has the simpoint 1935361Srstrong@cs.ucsd.edu if testsys.cpu[i].workload[0].simpoint == None: 1945361Srstrong@cs.ucsd.edu m5.panic('Unable to find simpoint') 1953395Shsul@eecs.umich.edu 1965361Srstrong@cs.ucsd.edu options.checkpoint_restore += \ 1975361Srstrong@cs.ucsd.edu testsys.cpu[0].workload[0].simpoint 1983395Shsul@eecs.umich.edu 1995361Srstrong@cs.ucsd.edu checkpoint_dir = joinpath(cptdir, "cpt.%s.%d" % \ 2005361Srstrong@cs.ucsd.edu (options.bench, options.checkpoint_restore)) 2015361Srstrong@cs.ucsd.edu if not exists(checkpoint_dir): 2025361Srstrong@cs.ucsd.edu m5.panic("Unable to find checkpoint directory %s.%s" % \ 2035361Srstrong@cs.ucsd.edu (options.bench, options.checkpoint_restore)) 2043395Shsul@eecs.umich.edu 2055361Srstrong@cs.ucsd.edu print "Restoring checkpoint ..." 2065361Srstrong@cs.ucsd.edu m5.restoreCheckpoint(root,checkpoint_dir) 2075361Srstrong@cs.ucsd.edu print "Done." 2085361Srstrong@cs.ucsd.edu else: 2095361Srstrong@cs.ucsd.edu dirs = listdir(cptdir) 2105361Srstrong@cs.ucsd.edu expr = re.compile('cpt\.([0-9]*)') 2115361Srstrong@cs.ucsd.edu cpts = [] 2125361Srstrong@cs.ucsd.edu for dir in dirs: 2135361Srstrong@cs.ucsd.edu match = expr.match(dir) 2145361Srstrong@cs.ucsd.edu if match: 2155361Srstrong@cs.ucsd.edu cpts.append(match.group(1)) 2163999Ssaidi@eecs.umich.edu 2175361Srstrong@cs.ucsd.edu cpts.sort(lambda a,b: cmp(long(a), long(b))) 2185361Srstrong@cs.ucsd.edu 2195361Srstrong@cs.ucsd.edu cpt_num = options.checkpoint_restore 2205361Srstrong@cs.ucsd.edu 2215361Srstrong@cs.ucsd.edu if cpt_num > len(cpts): 2225361Srstrong@cs.ucsd.edu m5.panic('Checkpoint %d not found' % cpt_num) 2235361Srstrong@cs.ucsd.edu 2245361Srstrong@cs.ucsd.edu ## Adjust max tick based on our starting tick 2255361Srstrong@cs.ucsd.edu maxtick = maxtick - int(cpts[cpt_num - 1]) 2265361Srstrong@cs.ucsd.edu 2275361Srstrong@cs.ucsd.edu ## Restore the checkpoint 2285361Srstrong@cs.ucsd.edu m5.restoreCheckpoint(root, 2295361Srstrong@cs.ucsd.edu joinpath(cptdir, "cpt.%s" % cpts[cpt_num - 1])) 2303395Shsul@eecs.umich.edu 2313481Shsul@eecs.umich.edu if options.standard_switch or cpu_class: 2325361Srstrong@cs.ucsd.edu if options.standard_switch: 2335361Srstrong@cs.ucsd.edu print "Switch at instruction count:%s" % \ 2345361Srstrong@cs.ucsd.edu str(testsys.cpu[0].max_insts_any_thread) 2355361Srstrong@cs.ucsd.edu exit_event = m5.simulate() 2365361Srstrong@cs.ucsd.edu elif cpu_class and options.fast_forward: 2375361Srstrong@cs.ucsd.edu print "Switch at instruction count:%s" % \ 2385361Srstrong@cs.ucsd.edu str(testsys.cpu[0].max_insts_any_thread) 2395361Srstrong@cs.ucsd.edu exit_event = m5.simulate() 2405361Srstrong@cs.ucsd.edu else: 2415361Srstrong@cs.ucsd.edu print "Switch at curTick count:%s" % str(10000) 2425361Srstrong@cs.ucsd.edu exit_event = m5.simulate(10000) 2435361Srstrong@cs.ucsd.edu print "Switched CPUS @ cycle = %s" % (m5.curTick()) 2443395Shsul@eecs.umich.edu 2455361Srstrong@cs.ucsd.edu # when you change to Timing (or Atomic), you halt the system 2465361Srstrong@cs.ucsd.edu # given as argument. When you are finished with the system 2475361Srstrong@cs.ucsd.edu # changes (including switchCpus), you must resume the system 2485361Srstrong@cs.ucsd.edu # manually. You DON'T need to resume after just switching 2495361Srstrong@cs.ucsd.edu # CPUs if you haven't changed anything on the system level. 2503395Shsul@eecs.umich.edu 2513395Shsul@eecs.umich.edu m5.changeToTiming(testsys) 2523395Shsul@eecs.umich.edu m5.switchCpus(switch_cpu_list) 2533395Shsul@eecs.umich.edu m5.resume(testsys) 2543395Shsul@eecs.umich.edu 2553481Shsul@eecs.umich.edu if options.standard_switch: 2565361Srstrong@cs.ucsd.edu print "Switch at instruction count:%d" % \ 2575361Srstrong@cs.ucsd.edu (testsys.switch_cpus[0].max_insts_any_thread) 2585361Srstrong@cs.ucsd.edu 2595361Srstrong@cs.ucsd.edu #warmup instruction count may have already been set 2605361Srstrong@cs.ucsd.edu if options.warmup_insts: 2615361Srstrong@cs.ucsd.edu exit_event = m5.simulate() 2625361Srstrong@cs.ucsd.edu else: 2635353Svilas.sridharan@gmail.com exit_event = m5.simulate(options.warmup) 2645361Srstrong@cs.ucsd.edu print "Switching CPUS @ cycle = %s" % (m5.curTick()) 2655361Srstrong@cs.ucsd.edu print "Simulation ends instruction count:%d" % \ 2665361Srstrong@cs.ucsd.edu (testsys.switch_cpus_1[0].max_insts_any_thread) 2675072Ssaidi@eecs.umich.edu m5.drain(testsys) 2683481Shsul@eecs.umich.edu m5.switchCpus(switch_cpu_list1) 2695072Ssaidi@eecs.umich.edu m5.resume(testsys) 2703395Shsul@eecs.umich.edu 2713395Shsul@eecs.umich.edu num_checkpoints = 0 2723395Shsul@eecs.umich.edu exit_cause = '' 2733395Shsul@eecs.umich.edu 2745361Srstrong@cs.ucsd.edu # Checkpoints being taken via the command line at <when> and at 2755361Srstrong@cs.ucsd.edu # subsequent periods of <period>. Checkpoint instructions 2765361Srstrong@cs.ucsd.edu # received from the benchmark running are ignored and skipped in 2775361Srstrong@cs.ucsd.edu # favor of command line checkpoint instructions. 2783395Shsul@eecs.umich.edu if options.take_checkpoints: 2795361Srstrong@cs.ucsd.edu when, period = options.take_checkpoints.split(",", 1) 2803395Shsul@eecs.umich.edu when = int(when) 2813395Shsul@eecs.umich.edu period = int(period) 2823395Shsul@eecs.umich.edu 2835361Srstrong@cs.ucsd.edu if options.at_instruction or options.simpoint: 2845361Srstrong@cs.ucsd.edu checkpoint_inst = when 2853395Shsul@eecs.umich.edu 2865361Srstrong@cs.ucsd.edu # maintain correct offset if we restored from some instruction 2875361Srstrong@cs.ucsd.edu if options.checkpoint_restore: 2885361Srstrong@cs.ucsd.edu checkpoint_inst += options.checkpoint_restore 2893395Shsul@eecs.umich.edu 2905361Srstrong@cs.ucsd.edu print "Creating checkpoint at inst:%d" % (checkpoint_inst) 2915361Srstrong@cs.ucsd.edu exit_event = m5.simulate() 2925361Srstrong@cs.ucsd.edu print "exit cause = %s" % (exit_event.getCause()) 2933395Shsul@eecs.umich.edu 2945361Srstrong@cs.ucsd.edu # skip checkpoint instructions should they exist 2955361Srstrong@cs.ucsd.edu while exit_event.getCause() == "checkpoint": 2965361Srstrong@cs.ucsd.edu exit_event = m5.simulate() 2973999Ssaidi@eecs.umich.edu 2985361Srstrong@cs.ucsd.edu if exit_event.getCause() == \ 2995361Srstrong@cs.ucsd.edu "a thread reached the max instruction count": 3005361Srstrong@cs.ucsd.edu m5.checkpoint(root, joinpath(cptdir, "cpt.%s.%d" % \ 3015361Srstrong@cs.ucsd.edu (options.bench, checkpoint_inst))) 3025361Srstrong@cs.ucsd.edu print "Checkpoint written." 3035361Srstrong@cs.ucsd.edu num_checkpoints += 1 3043999Ssaidi@eecs.umich.edu 3055361Srstrong@cs.ucsd.edu if exit_event.getCause() == "user interrupt received": 3065361Srstrong@cs.ucsd.edu exit_cause = exit_event.getCause(); 3075361Srstrong@cs.ucsd.edu else: 3085361Srstrong@cs.ucsd.edu exit_event = m5.simulate(when) 3095361Srstrong@cs.ucsd.edu while exit_event.getCause() == "checkpoint": 3105361Srstrong@cs.ucsd.edu exit_event = m5.simulate(when - m5.curTick()) 3115361Srstrong@cs.ucsd.edu 3125361Srstrong@cs.ucsd.edu if exit_event.getCause() == "simulate() limit reached": 3135361Srstrong@cs.ucsd.edu m5.checkpoint(root, joinpath(cptdir, "cpt.%d")) 3145361Srstrong@cs.ucsd.edu num_checkpoints += 1 3155361Srstrong@cs.ucsd.edu 3165361Srstrong@cs.ucsd.edu sim_ticks = when 3175361Srstrong@cs.ucsd.edu exit_cause = "maximum %d checkpoints dropped" % max_checkpoints 3185361Srstrong@cs.ucsd.edu while num_checkpoints < max_checkpoints and \ 3195361Srstrong@cs.ucsd.edu exit_event.getCause() == "simulate() limit reached": 3205361Srstrong@cs.ucsd.edu if (sim_ticks + period) > maxtick: 3215361Srstrong@cs.ucsd.edu exit_event = m5.simulate(maxtick - sim_ticks) 3225361Srstrong@cs.ucsd.edu exit_cause = exit_event.getCause() 3235361Srstrong@cs.ucsd.edu break 3245361Srstrong@cs.ucsd.edu else: 3255361Srstrong@cs.ucsd.edu exit_event = m5.simulate(period) 3265361Srstrong@cs.ucsd.edu sim_ticks += period 3275361Srstrong@cs.ucsd.edu while exit_event.getCause() == "checkpoint": 3285361Srstrong@cs.ucsd.edu exit_event = m5.simulate(sim_ticks - m5.curTick()) 3295361Srstrong@cs.ucsd.edu if exit_event.getCause() == "simulate() limit reached": 3305361Srstrong@cs.ucsd.edu m5.checkpoint(root, joinpath(cptdir, "cpt.%d")) 3315361Srstrong@cs.ucsd.edu num_checkpoints += 1 3325361Srstrong@cs.ucsd.edu 3335361Srstrong@cs.ucsd.edu if exit_event.getCause() != "simulate() limit reached": 3345361Srstrong@cs.ucsd.edu exit_cause = exit_event.getCause(); 3355361Srstrong@cs.ucsd.edu 3365361Srstrong@cs.ucsd.edu else: # no checkpoints being taken via this script 3375361Srstrong@cs.ucsd.edu if options.fast_forward: 3385361Srstrong@cs.ucsd.edu m5.stats.reset() 3395361Srstrong@cs.ucsd.edu print "**** REAL SIMULATION ****" 3403395Shsul@eecs.umich.edu exit_event = m5.simulate(maxtick) 3413395Shsul@eecs.umich.edu 3423395Shsul@eecs.umich.edu while exit_event.getCause() == "checkpoint": 3433509Shsul@eecs.umich.edu m5.checkpoint(root, joinpath(cptdir, "cpt.%d")) 3443395Shsul@eecs.umich.edu num_checkpoints += 1 3453395Shsul@eecs.umich.edu if num_checkpoints == max_checkpoints: 3465361Srstrong@cs.ucsd.edu exit_cause = "maximum %d checkpoints dropped" % max_checkpoints 3473395Shsul@eecs.umich.edu break 3483395Shsul@eecs.umich.edu 3493511Shsul@eecs.umich.edu exit_event = m5.simulate(maxtick - m5.curTick()) 3503395Shsul@eecs.umich.edu exit_cause = exit_event.getCause() 3513395Shsul@eecs.umich.edu 3523395Shsul@eecs.umich.edu if exit_cause == '': 3533395Shsul@eecs.umich.edu exit_cause = exit_event.getCause() 3543514Sktlim@umich.edu print 'Exiting @ cycle %i because %s' % (m5.curTick(), exit_cause) 3553395Shsul@eecs.umich.edu 356