Simulation.py revision 10159
19793Sakash.bagdia@arm.com# Copyright (c) 2012-2013 ARM Limited
29518SAndreas.Sandberg@ARM.com# All rights reserved
39518SAndreas.Sandberg@ARM.com#
49518SAndreas.Sandberg@ARM.com# The license below extends only to copyright in the software and shall
59518SAndreas.Sandberg@ARM.com# not be construed as granting a license to any other intellectual
69518SAndreas.Sandberg@ARM.com# property including but not limited to intellectual property relating
79518SAndreas.Sandberg@ARM.com# to a hardware implementation of the functionality of the software
89518SAndreas.Sandberg@ARM.com# licensed hereunder.  You may use the software subject to the license
99518SAndreas.Sandberg@ARM.com# terms below provided that you ensure that this notice is replicated
109518SAndreas.Sandberg@ARM.com# unmodified and in its entirety in all distributions of the software,
119518SAndreas.Sandberg@ARM.com# modified or unmodified, in source code or in binary form.
129518SAndreas.Sandberg@ARM.com#
135347Ssaidi@eecs.umich.edu# Copyright (c) 2006-2008 The Regents of The University of Michigan
147534Ssteve.reinhardt@amd.com# Copyright (c) 2010 Advanced Micro Devices, Inc.
153395Shsul@eecs.umich.edu# All rights reserved.
163395Shsul@eecs.umich.edu#
173395Shsul@eecs.umich.edu# Redistribution and use in source and binary forms, with or without
183395Shsul@eecs.umich.edu# modification, are permitted provided that the following conditions are
193395Shsul@eecs.umich.edu# met: redistributions of source code must retain the above copyright
203395Shsul@eecs.umich.edu# notice, this list of conditions and the following disclaimer;
213395Shsul@eecs.umich.edu# redistributions in binary form must reproduce the above copyright
223395Shsul@eecs.umich.edu# notice, this list of conditions and the following disclaimer in the
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253395Shsul@eecs.umich.edu# contributors may be used to endorse or promote products derived from
263395Shsul@eecs.umich.edu# this software without specific prior written permission.
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303395Shsul@eecs.umich.edu# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
313395Shsul@eecs.umich.edu# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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333395Shsul@eecs.umich.edu# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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383395Shsul@eecs.umich.edu# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
393395Shsul@eecs.umich.edu#
403395Shsul@eecs.umich.edu# Authors: Lisa Hsu
413395Shsul@eecs.umich.edu
429457Svilanova@ac.upc.eduimport sys
433395Shsul@eecs.umich.edufrom os import getcwd
443509Shsul@eecs.umich.edufrom os.path import join as joinpath
456654Snate@binkert.org
469520SAndreas.Sandberg@ARM.comimport CpuConfig
479665Sandreas.hansson@arm.comimport MemConfig
489520SAndreas.Sandberg@ARM.com
493395Shsul@eecs.umich.eduimport m5
506654Snate@binkert.orgfrom m5.defines import buildEnv
513395Shsul@eecs.umich.edufrom m5.objects import *
526654Snate@binkert.orgfrom m5.util import *
536654Snate@binkert.org
546654Snate@binkert.orgaddToPath('../common')
553395Shsul@eecs.umich.edu
569139Snilay@cs.wisc.edudef getCPUClass(cpu_type):
579520SAndreas.Sandberg@ARM.com    """Returns the required cpu class and the mode of operation."""
589520SAndreas.Sandberg@ARM.com    cls = CpuConfig.get(cpu_type)
599520SAndreas.Sandberg@ARM.com    return cls, cls.memory_mode()
609139Snilay@cs.wisc.edu
613481Shsul@eecs.umich.edudef setCPUClass(options):
629139Snilay@cs.wisc.edu    """Returns two cpu classes and the initial mode of operation.
633481Shsul@eecs.umich.edu
649139Snilay@cs.wisc.edu       Restoring from a checkpoint or fast forwarding through a benchmark
659139Snilay@cs.wisc.edu       can be done using one type of cpu, and then the actual
669139Snilay@cs.wisc.edu       simulation can be carried out using another type. This function
679139Snilay@cs.wisc.edu       returns these two types of cpus and the initial mode of operation
689139Snilay@cs.wisc.edu       depending on the options provided.
699139Snilay@cs.wisc.edu    """
709139Snilay@cs.wisc.edu
719139Snilay@cs.wisc.edu    TmpClass, test_mem_mode = getCPUClass(options.cpu_type)
723481Shsul@eecs.umich.edu    CPUClass = None
739518SAndreas.Sandberg@ARM.com    if TmpClass.require_caches() and \
749518SAndreas.Sandberg@ARM.com            not options.caches and not options.ruby:
759518SAndreas.Sandberg@ARM.com        fatal("%s must be used with caches" % options.cpu_type)
763481Shsul@eecs.umich.edu
779139Snilay@cs.wisc.edu    if options.checkpoint_restore != None:
789139Snilay@cs.wisc.edu        if options.restore_with_cpu != options.cpu_type:
793481Shsul@eecs.umich.edu            CPUClass = TmpClass
809139Snilay@cs.wisc.edu            TmpClass, test_mem_mode = getCPUClass(options.restore_with_cpu)
819139Snilay@cs.wisc.edu    elif options.fast_forward:
829139Snilay@cs.wisc.edu        CPUClass = TmpClass
839139Snilay@cs.wisc.edu        TmpClass = AtomicSimpleCPU
849139Snilay@cs.wisc.edu        test_mem_mode = 'atomic'
853481Shsul@eecs.umich.edu
863481Shsul@eecs.umich.edu    return (TmpClass, test_mem_mode, CPUClass)
873481Shsul@eecs.umich.edu
889665Sandreas.hansson@arm.comdef setMemClass(options):
899665Sandreas.hansson@arm.com    """Returns a memory controller class."""
909665Sandreas.hansson@arm.com
919665Sandreas.hansson@arm.com    return MemConfig.get(options.mem_type)
929665Sandreas.hansson@arm.com
938919Snilay@cs.wisc.edudef setWorkCountOptions(system, options):
948919Snilay@cs.wisc.edu    if options.work_item_id != None:
958919Snilay@cs.wisc.edu        system.work_item_id = options.work_item_id
9610159Sgedare@rtems.org    if options.num_work_ids != None:
9710159Sgedare@rtems.org        system.num_work_ids = options.num_work_ids
988919Snilay@cs.wisc.edu    if options.work_begin_cpu_id_exit != None:
998919Snilay@cs.wisc.edu        system.work_begin_cpu_id_exit = options.work_begin_cpu_id_exit
1008919Snilay@cs.wisc.edu    if options.work_end_exit_count != None:
1018919Snilay@cs.wisc.edu        system.work_end_exit_count = options.work_end_exit_count
1028919Snilay@cs.wisc.edu    if options.work_end_checkpoint_count != None:
1038919Snilay@cs.wisc.edu        system.work_end_ckpt_count = options.work_end_checkpoint_count
1048919Snilay@cs.wisc.edu    if options.work_begin_exit_count != None:
1058919Snilay@cs.wisc.edu        system.work_begin_exit_count = options.work_begin_exit_count
1068919Snilay@cs.wisc.edu    if options.work_begin_checkpoint_count != None:
1078919Snilay@cs.wisc.edu        system.work_begin_ckpt_count = options.work_begin_checkpoint_count
1088919Snilay@cs.wisc.edu    if options.work_cpus_checkpoint_count != None:
1098919Snilay@cs.wisc.edu        system.work_cpus_ckpt_count = options.work_cpus_checkpoint_count
1103481Shsul@eecs.umich.edu
1119816Sjthestness@gmail.comdef findCptDir(options, cptdir, testsys):
1129140Snilay@cs.wisc.edu    """Figures out the directory from which the checkpointed state is read.
1139140Snilay@cs.wisc.edu
1149140Snilay@cs.wisc.edu    There are two different ways in which the directories holding checkpoints
1159140Snilay@cs.wisc.edu    can be named --
1169140Snilay@cs.wisc.edu    1. cpt.<benchmark name>.<instruction count when the checkpoint was taken>
1179140Snilay@cs.wisc.edu    2. cpt.<some number, usually the tick value when the checkpoint was taken>
1189140Snilay@cs.wisc.edu
1199140Snilay@cs.wisc.edu    This function parses through the options to figure out which one of the
1209140Snilay@cs.wisc.edu    above should be used for selecting the checkpoint, and then figures out
1219140Snilay@cs.wisc.edu    the appropriate directory.
1229140Snilay@cs.wisc.edu    """
1239140Snilay@cs.wisc.edu
1249140Snilay@cs.wisc.edu    from os.path import isdir, exists
1259140Snilay@cs.wisc.edu    from os import listdir
1269140Snilay@cs.wisc.edu    import re
1279140Snilay@cs.wisc.edu
1289140Snilay@cs.wisc.edu    if not isdir(cptdir):
1299140Snilay@cs.wisc.edu        fatal("checkpoint dir %s does not exist!", cptdir)
1309140Snilay@cs.wisc.edu
1319867Sjthestness@gmail.com    cpt_starttick = 0
1329140Snilay@cs.wisc.edu    if options.at_instruction or options.simpoint:
1339140Snilay@cs.wisc.edu        inst = options.checkpoint_restore
1349140Snilay@cs.wisc.edu        if options.simpoint:
1359140Snilay@cs.wisc.edu            # assume workload 0 has the simpoint
1369140Snilay@cs.wisc.edu            if testsys.cpu[0].workload[0].simpoint == 0:
1379140Snilay@cs.wisc.edu                fatal('Unable to find simpoint')
1389140Snilay@cs.wisc.edu            inst += int(testsys.cpu[0].workload[0].simpoint)
1399140Snilay@cs.wisc.edu
1409140Snilay@cs.wisc.edu        checkpoint_dir = joinpath(cptdir, "cpt.%s.%s" % (options.bench, inst))
1419140Snilay@cs.wisc.edu        if not exists(checkpoint_dir):
1429140Snilay@cs.wisc.edu            fatal("Unable to find checkpoint directory %s", checkpoint_dir)
1439140Snilay@cs.wisc.edu    else:
1449140Snilay@cs.wisc.edu        dirs = listdir(cptdir)
1459140Snilay@cs.wisc.edu        expr = re.compile('cpt\.([0-9]*)')
1469140Snilay@cs.wisc.edu        cpts = []
1479140Snilay@cs.wisc.edu        for dir in dirs:
1489140Snilay@cs.wisc.edu            match = expr.match(dir)
1499140Snilay@cs.wisc.edu            if match:
1509140Snilay@cs.wisc.edu                cpts.append(match.group(1))
1519140Snilay@cs.wisc.edu
1529140Snilay@cs.wisc.edu        cpts.sort(lambda a,b: cmp(long(a), long(b)))
1539140Snilay@cs.wisc.edu
1549140Snilay@cs.wisc.edu        cpt_num = options.checkpoint_restore
1559140Snilay@cs.wisc.edu        if cpt_num > len(cpts):
1569140Snilay@cs.wisc.edu            fatal('Checkpoint %d not found', cpt_num)
1579140Snilay@cs.wisc.edu
1589816Sjthestness@gmail.com        cpt_starttick = int(cpts[cpt_num - 1])
1599140Snilay@cs.wisc.edu        checkpoint_dir = joinpath(cptdir, "cpt.%s" % cpts[cpt_num - 1])
1609140Snilay@cs.wisc.edu
1619816Sjthestness@gmail.com    return cpt_starttick, checkpoint_dir
1629140Snilay@cs.wisc.edu
1639215Sandreas.hansson@arm.comdef scriptCheckpoints(options, maxtick, cptdir):
1649140Snilay@cs.wisc.edu    if options.at_instruction or options.simpoint:
1659140Snilay@cs.wisc.edu        checkpoint_inst = int(options.take_checkpoints)
1669140Snilay@cs.wisc.edu
1679140Snilay@cs.wisc.edu        # maintain correct offset if we restored from some instruction
1689140Snilay@cs.wisc.edu        if options.checkpoint_restore != None:
1699140Snilay@cs.wisc.edu            checkpoint_inst += options.checkpoint_restore
1709140Snilay@cs.wisc.edu
1719140Snilay@cs.wisc.edu        print "Creating checkpoint at inst:%d" % (checkpoint_inst)
1729140Snilay@cs.wisc.edu        exit_event = m5.simulate()
1739140Snilay@cs.wisc.edu        exit_cause = exit_event.getCause()
1749140Snilay@cs.wisc.edu        print "exit cause = %s" % exit_cause
1759140Snilay@cs.wisc.edu
1769140Snilay@cs.wisc.edu        # skip checkpoint instructions should they exist
1779140Snilay@cs.wisc.edu        while exit_cause == "checkpoint":
1789140Snilay@cs.wisc.edu            exit_event = m5.simulate()
1799140Snilay@cs.wisc.edu            exit_cause = exit_event.getCause()
1809140Snilay@cs.wisc.edu
1819140Snilay@cs.wisc.edu        if exit_cause == "a thread reached the max instruction count":
1829140Snilay@cs.wisc.edu            m5.checkpoint(joinpath(cptdir, "cpt.%s.%d" % \
1839140Snilay@cs.wisc.edu                    (options.bench, checkpoint_inst)))
1849140Snilay@cs.wisc.edu            print "Checkpoint written."
1859140Snilay@cs.wisc.edu
1869140Snilay@cs.wisc.edu    else:
1879140Snilay@cs.wisc.edu        when, period = options.take_checkpoints.split(",", 1)
1889140Snilay@cs.wisc.edu        when = int(when)
1899140Snilay@cs.wisc.edu        period = int(period)
1909156Sandreas.hansson@arm.com        num_checkpoints = 0
1919140Snilay@cs.wisc.edu
1929634Sjthestness@gmail.com        exit_event = m5.simulate(when - m5.curTick())
1939140Snilay@cs.wisc.edu        exit_cause = exit_event.getCause()
1949140Snilay@cs.wisc.edu        while exit_cause == "checkpoint":
1959140Snilay@cs.wisc.edu            exit_event = m5.simulate(when - m5.curTick())
1969140Snilay@cs.wisc.edu            exit_cause = exit_event.getCause()
1979140Snilay@cs.wisc.edu
1989140Snilay@cs.wisc.edu        if exit_cause == "simulate() limit reached":
1999140Snilay@cs.wisc.edu            m5.checkpoint(joinpath(cptdir, "cpt.%d"))
2009140Snilay@cs.wisc.edu            num_checkpoints += 1
2019140Snilay@cs.wisc.edu
2029140Snilay@cs.wisc.edu        sim_ticks = when
2039140Snilay@cs.wisc.edu        max_checkpoints = options.max_checkpoints
2049140Snilay@cs.wisc.edu
2059140Snilay@cs.wisc.edu        while num_checkpoints < max_checkpoints and \
2069140Snilay@cs.wisc.edu                exit_cause == "simulate() limit reached":
2079140Snilay@cs.wisc.edu            if (sim_ticks + period) > maxtick:
2089140Snilay@cs.wisc.edu                exit_event = m5.simulate(maxtick - sim_ticks)
2099140Snilay@cs.wisc.edu                exit_cause = exit_event.getCause()
2109140Snilay@cs.wisc.edu                break
2119140Snilay@cs.wisc.edu            else:
2129140Snilay@cs.wisc.edu                exit_event = m5.simulate(period)
2139140Snilay@cs.wisc.edu                exit_cause = exit_event.getCause()
2149140Snilay@cs.wisc.edu                sim_ticks += period
2159140Snilay@cs.wisc.edu                while exit_event.getCause() == "checkpoint":
2169140Snilay@cs.wisc.edu                    exit_event = m5.simulate(sim_ticks - m5.curTick())
2179140Snilay@cs.wisc.edu                if exit_event.getCause() == "simulate() limit reached":
2189140Snilay@cs.wisc.edu                    m5.checkpoint(joinpath(cptdir, "cpt.%d"))
2199140Snilay@cs.wisc.edu                    num_checkpoints += 1
2209140Snilay@cs.wisc.edu
2219606Snilay@cs.wisc.edu    return exit_event
2229140Snilay@cs.wisc.edu
2239140Snilay@cs.wisc.edudef benchCheckpoints(options, maxtick, cptdir):
2249634Sjthestness@gmail.com    exit_event = m5.simulate(maxtick - m5.curTick())
2259140Snilay@cs.wisc.edu    exit_cause = exit_event.getCause()
2269140Snilay@cs.wisc.edu
2279140Snilay@cs.wisc.edu    num_checkpoints = 0
2289140Snilay@cs.wisc.edu    max_checkpoints = options.max_checkpoints
2299140Snilay@cs.wisc.edu
2309140Snilay@cs.wisc.edu    while exit_cause == "checkpoint":
2319140Snilay@cs.wisc.edu        m5.checkpoint(joinpath(cptdir, "cpt.%d"))
2329140Snilay@cs.wisc.edu        num_checkpoints += 1
2339140Snilay@cs.wisc.edu        if num_checkpoints == max_checkpoints:
2349140Snilay@cs.wisc.edu            exit_cause = "maximum %d checkpoints dropped" % max_checkpoints
2359140Snilay@cs.wisc.edu            break
2369140Snilay@cs.wisc.edu
2379140Snilay@cs.wisc.edu        exit_event = m5.simulate(maxtick - m5.curTick())
2389140Snilay@cs.wisc.edu        exit_cause = exit_event.getCause()
2399140Snilay@cs.wisc.edu
2409460Ssaidi@eecs.umich.edu    return exit_event
2419140Snilay@cs.wisc.edu
2429151Satgutier@umich.edudef repeatSwitch(testsys, repeat_switch_cpu_list, maxtick, switch_freq):
2439151Satgutier@umich.edu    print "starting switch loop"
2449151Satgutier@umich.edu    while True:
2459151Satgutier@umich.edu        exit_event = m5.simulate(switch_freq)
2469151Satgutier@umich.edu        exit_cause = exit_event.getCause()
2479151Satgutier@umich.edu
2489151Satgutier@umich.edu        if exit_cause != "simulate() limit reached":
2499460Ssaidi@eecs.umich.edu            return exit_event
2509151Satgutier@umich.edu
2519521SAndreas.Sandberg@ARM.com        m5.switchCpus(testsys, repeat_switch_cpu_list)
2529151Satgutier@umich.edu
2539151Satgutier@umich.edu        tmp_cpu_list = []
2549151Satgutier@umich.edu        for old_cpu, new_cpu in repeat_switch_cpu_list:
2559151Satgutier@umich.edu            tmp_cpu_list.append((new_cpu, old_cpu))
2569151Satgutier@umich.edu        repeat_switch_cpu_list = tmp_cpu_list
2579151Satgutier@umich.edu
2589151Satgutier@umich.edu        if (maxtick - m5.curTick()) <= switch_freq:
2599151Satgutier@umich.edu            exit_event = m5.simulate(maxtick - m5.curTick())
2609460Ssaidi@eecs.umich.edu            return exit_event
2619151Satgutier@umich.edu
2623481Shsul@eecs.umich.edudef run(options, root, testsys, cpu_class):
2633395Shsul@eecs.umich.edu    if options.checkpoint_dir:
2643395Shsul@eecs.umich.edu        cptdir = options.checkpoint_dir
2655211Ssaidi@eecs.umich.edu    elif m5.options.outdir:
2665211Ssaidi@eecs.umich.edu        cptdir = m5.options.outdir
2673395Shsul@eecs.umich.edu    else:
2683395Shsul@eecs.umich.edu        cptdir = getcwd()
2693395Shsul@eecs.umich.edu
2705370Ssaidi@eecs.umich.edu    if options.fast_forward and options.checkpoint_restore != None:
2716654Snate@binkert.org        fatal("Can't specify both --fast-forward and --checkpoint-restore")
2725370Ssaidi@eecs.umich.edu
2735371Shsul@eecs.umich.edu    if options.standard_switch and not options.caches:
2746654Snate@binkert.org        fatal("Must specify --caches when using --standard-switch")
2755370Ssaidi@eecs.umich.edu
2769151Satgutier@umich.edu    if options.standard_switch and options.repeat_switch:
2779151Satgutier@umich.edu        fatal("Can't specify both --standard-switch and --repeat-switch")
2789151Satgutier@umich.edu
2799151Satgutier@umich.edu    if options.repeat_switch and options.take_checkpoints:
2809151Satgutier@umich.edu        fatal("Can't specify both --repeat-switch and --take-checkpoints")
2819151Satgutier@umich.edu
2823395Shsul@eecs.umich.edu    np = options.num_cpus
2833481Shsul@eecs.umich.edu    switch_cpus = None
2843481Shsul@eecs.umich.edu
2858318Sksewell@umich.edu    if options.prog_interval:
2866144Sksewell@umich.edu        for i in xrange(np):
2878311Sksewell@umich.edu            testsys.cpu[i].progress_interval = options.prog_interval
2886144Sksewell@umich.edu
2896641Sksewell@umich.edu    if options.maxinsts:
2906641Sksewell@umich.edu        for i in xrange(np):
2916641Sksewell@umich.edu            testsys.cpu[i].max_insts_any_thread = options.maxinsts
2926641Sksewell@umich.edu
2933481Shsul@eecs.umich.edu    if cpu_class:
2949433SAndreas.Sandberg@ARM.com        switch_cpus = [cpu_class(switched_out=True, cpu_id=(i))
2953481Shsul@eecs.umich.edu                       for i in xrange(np)]
2963481Shsul@eecs.umich.edu
2973481Shsul@eecs.umich.edu        for i in xrange(np):
2985361Srstrong@cs.ucsd.edu            if options.fast_forward:
2995369Ssaidi@eecs.umich.edu                testsys.cpu[i].max_insts_any_thread = int(options.fast_forward)
3003481Shsul@eecs.umich.edu            switch_cpus[i].system =  testsys
3018803Sgblack@eecs.umich.edu            switch_cpus[i].workload = testsys.cpu[i].workload
3029793Sakash.bagdia@arm.com            switch_cpus[i].clk_domain = testsys.cpu[i].clk_domain
3035369Ssaidi@eecs.umich.edu            # simulation period
3048311Sksewell@umich.edu            if options.maxinsts:
3058311Sksewell@umich.edu                switch_cpus[i].max_insts_any_thread = options.maxinsts
3068887Sgeoffrey.blake@arm.com            # Add checker cpu if selected
3078887Sgeoffrey.blake@arm.com            if options.checker:
3088887Sgeoffrey.blake@arm.com                switch_cpus[i].addCheckerCpu()
3093481Shsul@eecs.umich.edu
3105311Ssaidi@eecs.umich.edu        testsys.switch_cpus = switch_cpus
3113481Shsul@eecs.umich.edu        switch_cpu_list = [(testsys.cpu[i], switch_cpus[i]) for i in xrange(np)]
3123395Shsul@eecs.umich.edu
3139151Satgutier@umich.edu    if options.repeat_switch:
3149518SAndreas.Sandberg@ARM.com        switch_class = getCPUClass(options.cpu_type)[0]
3159518SAndreas.Sandberg@ARM.com        if switch_class.require_caches() and \
3169518SAndreas.Sandberg@ARM.com                not options.caches:
3179518SAndreas.Sandberg@ARM.com            print "%s: Must be used with caches" % str(switch_class)
3189518SAndreas.Sandberg@ARM.com            sys.exit(1)
3199518SAndreas.Sandberg@ARM.com        if not switch_class.support_take_over():
3209518SAndreas.Sandberg@ARM.com            print "%s: CPU switching not supported" % str(switch_class)
3219518SAndreas.Sandberg@ARM.com            sys.exit(1)
3229151Satgutier@umich.edu
3239518SAndreas.Sandberg@ARM.com        repeat_switch_cpus = [switch_class(switched_out=True, \
3249518SAndreas.Sandberg@ARM.com                                               cpu_id=(i)) for i in xrange(np)]
3259151Satgutier@umich.edu
3269151Satgutier@umich.edu        for i in xrange(np):
3279151Satgutier@umich.edu            repeat_switch_cpus[i].system = testsys
3289151Satgutier@umich.edu            repeat_switch_cpus[i].workload = testsys.cpu[i].workload
3299793Sakash.bagdia@arm.com            repeat_switch_cpus[i].clk_domain = testsys.cpu[i].clk_domain
3309151Satgutier@umich.edu
3319151Satgutier@umich.edu            if options.maxinsts:
3329151Satgutier@umich.edu                repeat_switch_cpus[i].max_insts_any_thread = options.maxinsts
3339151Satgutier@umich.edu
3349151Satgutier@umich.edu            if options.checker:
3359151Satgutier@umich.edu                repeat_switch_cpus[i].addCheckerCpu()
3369151Satgutier@umich.edu
3379151Satgutier@umich.edu        testsys.repeat_switch_cpus = repeat_switch_cpus
3389151Satgutier@umich.edu
3399151Satgutier@umich.edu        if cpu_class:
3409151Satgutier@umich.edu            repeat_switch_cpu_list = [(switch_cpus[i], repeat_switch_cpus[i])
3419151Satgutier@umich.edu                                      for i in xrange(np)]
3429151Satgutier@umich.edu        else:
3439151Satgutier@umich.edu            repeat_switch_cpu_list = [(testsys.cpu[i], repeat_switch_cpus[i])
3449151Satgutier@umich.edu                                      for i in xrange(np)]
3459151Satgutier@umich.edu
3463395Shsul@eecs.umich.edu    if options.standard_switch:
3479433SAndreas.Sandberg@ARM.com        switch_cpus = [TimingSimpleCPU(switched_out=True, cpu_id=(i))
3483395Shsul@eecs.umich.edu                       for i in xrange(np)]
3499433SAndreas.Sandberg@ARM.com        switch_cpus_1 = [DerivO3CPU(switched_out=True, cpu_id=(i))
3503395Shsul@eecs.umich.edu                        for i in xrange(np)]
3513478Shsul@eecs.umich.edu
3523395Shsul@eecs.umich.edu        for i in xrange(np):
3533395Shsul@eecs.umich.edu            switch_cpus[i].system =  testsys
3543478Shsul@eecs.umich.edu            switch_cpus_1[i].system =  testsys
3558803Sgblack@eecs.umich.edu            switch_cpus[i].workload = testsys.cpu[i].workload
3568803Sgblack@eecs.umich.edu            switch_cpus_1[i].workload = testsys.cpu[i].workload
3579793Sakash.bagdia@arm.com            switch_cpus[i].clk_domain = testsys.cpu[i].clk_domain
3589793Sakash.bagdia@arm.com            switch_cpus_1[i].clk_domain = testsys.cpu[i].clk_domain
3593480Shsul@eecs.umich.edu
3605361Srstrong@cs.ucsd.edu            # if restoring, make atomic cpu simulate only a few instructions
3615369Ssaidi@eecs.umich.edu            if options.checkpoint_restore != None:
3625361Srstrong@cs.ucsd.edu                testsys.cpu[i].max_insts_any_thread = 1
3635361Srstrong@cs.ucsd.edu            # Fast forward to specified location if we are not restoring
3645361Srstrong@cs.ucsd.edu            elif options.fast_forward:
3655369Ssaidi@eecs.umich.edu                testsys.cpu[i].max_insts_any_thread = int(options.fast_forward)
3665361Srstrong@cs.ucsd.edu            # Fast forward to a simpoint (warning: time consuming)
3675361Srstrong@cs.ucsd.edu            elif options.simpoint:
3685378Ssaidi@eecs.umich.edu                if testsys.cpu[i].workload[0].simpoint == 0:
3696654Snate@binkert.org                    fatal('simpoint not found')
3705361Srstrong@cs.ucsd.edu                testsys.cpu[i].max_insts_any_thread = \
3715361Srstrong@cs.ucsd.edu                    testsys.cpu[i].workload[0].simpoint
3725361Srstrong@cs.ucsd.edu            # No distance specified, just switch
3735361Srstrong@cs.ucsd.edu            else:
3745361Srstrong@cs.ucsd.edu                testsys.cpu[i].max_insts_any_thread = 1
3755361Srstrong@cs.ucsd.edu
3765361Srstrong@cs.ucsd.edu            # warmup period
3775361Srstrong@cs.ucsd.edu            if options.warmup_insts:
3785361Srstrong@cs.ucsd.edu                switch_cpus[i].max_insts_any_thread =  options.warmup_insts
3795361Srstrong@cs.ucsd.edu
3805361Srstrong@cs.ucsd.edu            # simulation period
3818311Sksewell@umich.edu            if options.maxinsts:
3828311Sksewell@umich.edu                switch_cpus_1[i].max_insts_any_thread = options.maxinsts
3835353Svilas.sridharan@gmail.com
3848887Sgeoffrey.blake@arm.com            # attach the checker cpu if selected
3858887Sgeoffrey.blake@arm.com            if options.checker:
3868887Sgeoffrey.blake@arm.com                switch_cpus[i].addCheckerCpu()
3878887Sgeoffrey.blake@arm.com                switch_cpus_1[i].addCheckerCpu()
3888887Sgeoffrey.blake@arm.com
3898211Satgutier@umich.edu        testsys.switch_cpus = switch_cpus
3908211Satgutier@umich.edu        testsys.switch_cpus_1 = switch_cpus_1
3918211Satgutier@umich.edu        switch_cpu_list = [(testsys.cpu[i], switch_cpus[i]) for i in xrange(np)]
3928211Satgutier@umich.edu        switch_cpu_list1 = [(switch_cpus[i], switch_cpus_1[i]) for i in xrange(np)]
3933395Shsul@eecs.umich.edu
3945361Srstrong@cs.ucsd.edu    # set the checkpoint in the cpu before m5.instantiate is called
3955369Ssaidi@eecs.umich.edu    if options.take_checkpoints != None and \
3965361Srstrong@cs.ucsd.edu           (options.simpoint or options.at_instruction):
3975361Srstrong@cs.ucsd.edu        offset = int(options.take_checkpoints)
3985361Srstrong@cs.ucsd.edu        # Set an instruction break point
3995361Srstrong@cs.ucsd.edu        if options.simpoint:
4005361Srstrong@cs.ucsd.edu            for i in xrange(np):
4015378Ssaidi@eecs.umich.edu                if testsys.cpu[i].workload[0].simpoint == 0:
4026654Snate@binkert.org                    fatal('no simpoint for testsys.cpu[%d].workload[0]', i)
4035369Ssaidi@eecs.umich.edu                checkpoint_inst = int(testsys.cpu[i].workload[0].simpoint) + offset
4045361Srstrong@cs.ucsd.edu                testsys.cpu[i].max_insts_any_thread = checkpoint_inst
4055361Srstrong@cs.ucsd.edu                # used for output below
4065361Srstrong@cs.ucsd.edu                options.take_checkpoints = checkpoint_inst
4075361Srstrong@cs.ucsd.edu        else:
4085361Srstrong@cs.ucsd.edu            options.take_checkpoints = offset
4095361Srstrong@cs.ucsd.edu            # Set all test cpus with the right number of instructions
4105361Srstrong@cs.ucsd.edu            # for the upcoming simulation
4115361Srstrong@cs.ucsd.edu            for i in xrange(np):
4125361Srstrong@cs.ucsd.edu                testsys.cpu[i].max_insts_any_thread = offset
4135361Srstrong@cs.ucsd.edu
4147531Ssteve.reinhardt@amd.com    checkpoint_dir = None
4159816Sjthestness@gmail.com    if options.checkpoint_restore:
4169816Sjthestness@gmail.com        cpt_starttick, checkpoint_dir = findCptDir(options, cptdir, testsys)
4177531Ssteve.reinhardt@amd.com    m5.instantiate(checkpoint_dir)
4183395Shsul@eecs.umich.edu
4199816Sjthestness@gmail.com    # Handle the max tick settings now that tick frequency was resolved
4209816Sjthestness@gmail.com    # during system instantiation
4219816Sjthestness@gmail.com    # NOTE: the maxtick variable here is in absolute ticks, so it must
4229816Sjthestness@gmail.com    # include any simulated ticks before a checkpoint
4239816Sjthestness@gmail.com    explicit_maxticks = 0
4249816Sjthestness@gmail.com    maxtick_from_abs = m5.MaxTick
4259816Sjthestness@gmail.com    maxtick_from_rel = m5.MaxTick
4269816Sjthestness@gmail.com    maxtick_from_maxtime = m5.MaxTick
4279816Sjthestness@gmail.com    if options.abs_max_tick:
4289816Sjthestness@gmail.com        maxtick_from_abs = options.abs_max_tick
4299816Sjthestness@gmail.com        explicit_maxticks += 1
4309816Sjthestness@gmail.com    if options.rel_max_tick:
4319816Sjthestness@gmail.com        maxtick_from_rel = options.rel_max_tick
4329816Sjthestness@gmail.com        if options.checkpoint_restore:
4339816Sjthestness@gmail.com            # NOTE: this may need to be updated if checkpoints ever store
4349816Sjthestness@gmail.com            # the ticks per simulated second
4359816Sjthestness@gmail.com            maxtick_from_rel += cpt_starttick
4369867Sjthestness@gmail.com            if options.at_instruction or options.simpoint:
4379867Sjthestness@gmail.com                warn("Relative max tick specified with --at-instruction or" \
4389867Sjthestness@gmail.com                     " --simpoint\n      These options don't specify the " \
4399867Sjthestness@gmail.com                     "checkpoint start tick, so assuming\n      you mean " \
4409867Sjthestness@gmail.com                     "absolute max tick")
4419816Sjthestness@gmail.com        explicit_maxticks += 1
4429816Sjthestness@gmail.com    if options.maxtime:
4439816Sjthestness@gmail.com        maxtick_from_maxtime = m5.ticks.fromSeconds(options.maxtime)
4449816Sjthestness@gmail.com        explicit_maxticks += 1
4459816Sjthestness@gmail.com    if explicit_maxticks > 1:
4469816Sjthestness@gmail.com        warn("Specified multiple of --abs-max-tick, --rel-max-tick, --maxtime."\
4479816Sjthestness@gmail.com             " Using least")
4489816Sjthestness@gmail.com    maxtick = min([maxtick_from_abs, maxtick_from_rel, maxtick_from_maxtime])
4499816Sjthestness@gmail.com
4509816Sjthestness@gmail.com    if options.checkpoint_restore != None and maxtick < cpt_starttick:
4519816Sjthestness@gmail.com        fatal("Bad maxtick (%d) specified: " \
4529816Sjthestness@gmail.com              "Checkpoint starts starts from tick: %d", maxtick, cpt_starttick)
4539816Sjthestness@gmail.com
4543481Shsul@eecs.umich.edu    if options.standard_switch or cpu_class:
4555361Srstrong@cs.ucsd.edu        if options.standard_switch:
4565361Srstrong@cs.ucsd.edu            print "Switch at instruction count:%s" % \
4575361Srstrong@cs.ucsd.edu                    str(testsys.cpu[0].max_insts_any_thread)
4585361Srstrong@cs.ucsd.edu            exit_event = m5.simulate()
4595361Srstrong@cs.ucsd.edu        elif cpu_class and options.fast_forward:
4605361Srstrong@cs.ucsd.edu            print "Switch at instruction count:%s" % \
4615361Srstrong@cs.ucsd.edu                    str(testsys.cpu[0].max_insts_any_thread)
4625361Srstrong@cs.ucsd.edu            exit_event = m5.simulate()
4635361Srstrong@cs.ucsd.edu        else:
4645361Srstrong@cs.ucsd.edu            print "Switch at curTick count:%s" % str(10000)
4655361Srstrong@cs.ucsd.edu            exit_event = m5.simulate(10000)
4667766Sgblack@eecs.umich.edu        print "Switched CPUS @ tick %s" % (m5.curTick())
4673395Shsul@eecs.umich.edu
4689521SAndreas.Sandberg@ARM.com        m5.switchCpus(testsys, switch_cpu_list)
4693395Shsul@eecs.umich.edu
4703481Shsul@eecs.umich.edu        if options.standard_switch:
4715361Srstrong@cs.ucsd.edu            print "Switch at instruction count:%d" % \
4725361Srstrong@cs.ucsd.edu                    (testsys.switch_cpus[0].max_insts_any_thread)
4735361Srstrong@cs.ucsd.edu
4745361Srstrong@cs.ucsd.edu            #warmup instruction count may have already been set
4755361Srstrong@cs.ucsd.edu            if options.warmup_insts:
4765361Srstrong@cs.ucsd.edu                exit_event = m5.simulate()
4775361Srstrong@cs.ucsd.edu            else:
4789151Satgutier@umich.edu                exit_event = m5.simulate(options.standard_switch)
4797766Sgblack@eecs.umich.edu            print "Switching CPUS @ tick %s" % (m5.curTick())
4805361Srstrong@cs.ucsd.edu            print "Simulation ends instruction count:%d" % \
4815361Srstrong@cs.ucsd.edu                    (testsys.switch_cpus_1[0].max_insts_any_thread)
4829521SAndreas.Sandberg@ARM.com            m5.switchCpus(testsys, switch_cpu_list1)
4833395Shsul@eecs.umich.edu
4847489Ssteve.reinhardt@amd.com    # If we're taking and restoring checkpoints, use checkpoint_dir
4857489Ssteve.reinhardt@amd.com    # option only for finding the checkpoints to restore from.  This
4867489Ssteve.reinhardt@amd.com    # lets us test checkpointing by restoring from one set of
4877489Ssteve.reinhardt@amd.com    # checkpoints, generating a second set, and then comparing them.
4887489Ssteve.reinhardt@amd.com    if options.take_checkpoints and options.checkpoint_restore:
4897489Ssteve.reinhardt@amd.com        if m5.options.outdir:
4907489Ssteve.reinhardt@amd.com            cptdir = m5.options.outdir
4917489Ssteve.reinhardt@amd.com        else:
4927489Ssteve.reinhardt@amd.com            cptdir = getcwd()
4937489Ssteve.reinhardt@amd.com
4945369Ssaidi@eecs.umich.edu    if options.take_checkpoints != None :
4959140Snilay@cs.wisc.edu        # Checkpoints being taken via the command line at <when> and at
4969140Snilay@cs.wisc.edu        # subsequent periods of <period>.  Checkpoint instructions
4979140Snilay@cs.wisc.edu        # received from the benchmark running are ignored and skipped in
4989140Snilay@cs.wisc.edu        # favor of command line checkpoint instructions.
4999606Snilay@cs.wisc.edu        exit_event = scriptCheckpoints(options, maxtick, cptdir)
5009140Snilay@cs.wisc.edu    else:
5019151Satgutier@umich.edu        if options.fast_forward:
5029151Satgutier@umich.edu            m5.stats.reset()
5039151Satgutier@umich.edu        print "**** REAL SIMULATION ****"
5049151Satgutier@umich.edu
5059140Snilay@cs.wisc.edu        # If checkpoints are being taken, then the checkpoint instruction
5069140Snilay@cs.wisc.edu        # will occur in the benchmark code it self.
5079151Satgutier@umich.edu        if options.repeat_switch and maxtick > options.repeat_switch:
5089460Ssaidi@eecs.umich.edu            exit_event = repeatSwitch(testsys, repeat_switch_cpu_list,
5099151Satgutier@umich.edu                                      maxtick, options.repeat_switch)
5109151Satgutier@umich.edu        else:
5119460Ssaidi@eecs.umich.edu            exit_event = benchCheckpoints(options, maxtick, cptdir)
5123395Shsul@eecs.umich.edu
5139460Ssaidi@eecs.umich.edu    print 'Exiting @ tick %i because %s' % (m5.curTick(), exit_event.getCause())
5146776SBrad.Beckmann@amd.com    if options.checkpoint_at_end:
5157525Ssteve.reinhardt@amd.com        m5.checkpoint(joinpath(cptdir, "cpt.%d"))
5169457Svilanova@ac.upc.edu
5179494Sandreas@sandberg.pp.se    if not m5.options.interactive:
5189494Sandreas@sandberg.pp.se        sys.exit(exit_event.getCode())
519