Options.py revision 9935
19665Sandreas.hansson@arm.com# Copyright (c) 2013 ARM Limited 29665Sandreas.hansson@arm.com# All rights reserved. 39665Sandreas.hansson@arm.com# 49665Sandreas.hansson@arm.com# The license below extends only to copyright in the software and shall 59665Sandreas.hansson@arm.com# not be construed as granting a license to any other intellectual 69665Sandreas.hansson@arm.com# property including but not limited to intellectual property relating 79665Sandreas.hansson@arm.com# to a hardware implementation of the functionality of the software 89665Sandreas.hansson@arm.com# licensed hereunder. You may use the software subject to the license 99665Sandreas.hansson@arm.com# terms below provided that you ensure that this notice is replicated 109665Sandreas.hansson@arm.com# unmodified and in its entirety in all distributions of the software, 119665Sandreas.hansson@arm.com# modified or unmodified, in source code or in binary form. 129665Sandreas.hansson@arm.com# 135353Svilas.sridharan@gmail.com# Copyright (c) 2006-2008 The Regents of The University of Michigan 143395Shsul@eecs.umich.edu# All rights reserved. 153395Shsul@eecs.umich.edu# 163395Shsul@eecs.umich.edu# Redistribution and use in source and binary forms, with or without 173395Shsul@eecs.umich.edu# modification, are permitted provided that the following conditions are 183395Shsul@eecs.umich.edu# met: redistributions of source code must retain the above copyright 193395Shsul@eecs.umich.edu# notice, this list of conditions and the following disclaimer; 203395Shsul@eecs.umich.edu# redistributions in binary form must reproduce the above copyright 213395Shsul@eecs.umich.edu# notice, this list of conditions and the following disclaimer in the 223395Shsul@eecs.umich.edu# documentation and/or other materials provided with the distribution; 233395Shsul@eecs.umich.edu# neither the name of the copyright holders nor the names of its 243395Shsul@eecs.umich.edu# contributors may be used to endorse or promote products derived from 253395Shsul@eecs.umich.edu# this software without specific prior written permission. 263395Shsul@eecs.umich.edu# 273395Shsul@eecs.umich.edu# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 283395Shsul@eecs.umich.edu# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 293395Shsul@eecs.umich.edu# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 303395Shsul@eecs.umich.edu# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 313395Shsul@eecs.umich.edu# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 323395Shsul@eecs.umich.edu# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 333395Shsul@eecs.umich.edu# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 343395Shsul@eecs.umich.edu# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 353395Shsul@eecs.umich.edu# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 363395Shsul@eecs.umich.edu# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 373395Shsul@eecs.umich.edu# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 383395Shsul@eecs.umich.edu# 393395Shsul@eecs.umich.edu# Authors: Lisa Hsu 403395Shsul@eecs.umich.edu 418920Snilay@cs.wisc.eduimport m5 428920Snilay@cs.wisc.edufrom m5.defines import buildEnv 438920Snilay@cs.wisc.edufrom m5.objects import * 448920Snilay@cs.wisc.edufrom Benchmarks import * 457025SBrad.Beckmann@amd.com 469520SAndreas.Sandberg@ARM.comimport CpuConfig 479665Sandreas.hansson@arm.comimport MemConfig 489520SAndreas.Sandberg@ARM.com 499520SAndreas.Sandberg@ARM.comdef _listCpuTypes(option, opt, value, parser): 509520SAndreas.Sandberg@ARM.com CpuConfig.print_cpu_list() 519520SAndreas.Sandberg@ARM.com sys.exit(0) 529520SAndreas.Sandberg@ARM.com 539665Sandreas.hansson@arm.comdef _listMemTypes(option, opt, value, parser): 549665Sandreas.hansson@arm.com MemConfig.print_mem_list() 559665Sandreas.hansson@arm.com sys.exit(0) 569665Sandreas.hansson@arm.com 578920Snilay@cs.wisc.edudef addCommonOptions(parser): 588920Snilay@cs.wisc.edu # system options 599520SAndreas.Sandberg@ARM.com parser.add_option("--list-cpu-types", 609520SAndreas.Sandberg@ARM.com action="callback", callback=_listCpuTypes, 619520SAndreas.Sandberg@ARM.com help="List available CPU types") 628920Snilay@cs.wisc.edu parser.add_option("--cpu-type", type="choice", default="atomic", 639520SAndreas.Sandberg@ARM.com choices=CpuConfig.cpu_names(), 648920Snilay@cs.wisc.edu help = "type of cpu to run with") 658920Snilay@cs.wisc.edu parser.add_option("--checker", action="store_true"); 668920Snilay@cs.wisc.edu parser.add_option("-n", "--num-cpus", type="int", default=1) 679827Sakash.bagdia@arm.com parser.add_option("--sys-voltage", action="store", type="string", 689827Sakash.bagdia@arm.com default='1.0V', 699827Sakash.bagdia@arm.com help = """Top-level voltage for blocks running at system 709827Sakash.bagdia@arm.com power supply""") 719790Sakash.bagdia@arm.com parser.add_option("--sys-clock", action="store", type="string", 729790Sakash.bagdia@arm.com default='1GHz', 739790Sakash.bagdia@arm.com help = """Top-level clock for blocks running at system 749790Sakash.bagdia@arm.com speed""") 759789Sakash.bagdia@arm.com parser.add_option("--cpu-clock", action="store", type="string", 769789Sakash.bagdia@arm.com default='2GHz', 779789Sakash.bagdia@arm.com help="Clock for blocks running at CPU speed") 789800Snilay@cs.wisc.edu parser.add_option("--smt", action="store_true", default=False, 799800Snilay@cs.wisc.edu help = """ 809800Snilay@cs.wisc.edu Only used if multiple programs are specified. If true, 819800Snilay@cs.wisc.edu then the number of threads per cpu is same as the 829800Snilay@cs.wisc.edu number of programs.""") 839800Snilay@cs.wisc.edu 849800Snilay@cs.wisc.edu # Memory Options 859800Snilay@cs.wisc.edu parser.add_option("--list-mem-types", 869800Snilay@cs.wisc.edu action="callback", callback=_listMemTypes, 879800Snilay@cs.wisc.edu help="List available memory types") 889800Snilay@cs.wisc.edu parser.add_option("--mem-type", type="choice", default="simple_mem", 899800Snilay@cs.wisc.edu choices=MemConfig.mem_names(), 909800Snilay@cs.wisc.edu help = "type of memory to use") 919836Sandreas.hansson@arm.com parser.add_option("--mem-channels", type="int", default=1, 929836Sandreas.hansson@arm.com help = "number of memory channels") 939800Snilay@cs.wisc.edu parser.add_option("--mem-size", action="store", type="string", 949800Snilay@cs.wisc.edu default="512MB", 959800Snilay@cs.wisc.edu help="Specify the physical memory size (single memory)") 969800Snilay@cs.wisc.edu 979800Snilay@cs.wisc.edu # Cache Options 989800Snilay@cs.wisc.edu parser.add_option("--caches", action="store_true") 999800Snilay@cs.wisc.edu parser.add_option("--l2cache", action="store_true") 1009800Snilay@cs.wisc.edu parser.add_option("--fastmem", action="store_true") 1018920Snilay@cs.wisc.edu parser.add_option("--num-dirs", type="int", default=1) 1028920Snilay@cs.wisc.edu parser.add_option("--num-l2caches", type="int", default=1) 1038920Snilay@cs.wisc.edu parser.add_option("--num-l3caches", type="int", default=1) 1048920Snilay@cs.wisc.edu parser.add_option("--l1d_size", type="string", default="64kB") 1058920Snilay@cs.wisc.edu parser.add_option("--l1i_size", type="string", default="32kB") 1068920Snilay@cs.wisc.edu parser.add_option("--l2_size", type="string", default="2MB") 1078920Snilay@cs.wisc.edu parser.add_option("--l3_size", type="string", default="16MB") 1088920Snilay@cs.wisc.edu parser.add_option("--l1d_assoc", type="int", default=2) 1098920Snilay@cs.wisc.edu parser.add_option("--l1i_assoc", type="int", default=2) 1108920Snilay@cs.wisc.edu parser.add_option("--l2_assoc", type="int", default=8) 1118920Snilay@cs.wisc.edu parser.add_option("--l3_assoc", type="int", default=16) 1128920Snilay@cs.wisc.edu parser.add_option("--cacheline_size", type="int", default=64) 1139800Snilay@cs.wisc.edu 1149800Snilay@cs.wisc.edu # Enable Ruby 1158920Snilay@cs.wisc.edu parser.add_option("--ruby", action="store_true") 1163395Shsul@eecs.umich.edu 1178920Snilay@cs.wisc.edu # Run duration options 1189909Snilay@cs.wisc.edu parser.add_option("-m", "--abs-max-tick", type="int", default=m5.MaxTick, 1199816Sjthestness@gmail.com metavar="TICKS", help="Run to absolute simulated tick " \ 1209816Sjthestness@gmail.com "specified including ticks from a restored checkpoint") 1219816Sjthestness@gmail.com parser.add_option("--rel-max-tick", type="int", default=None, 1229816Sjthestness@gmail.com metavar="TICKS", help="Simulate for specified number of" \ 1239816Sjthestness@gmail.com " ticks relative to the simulation start tick (e.g. if " \ 1249816Sjthestness@gmail.com "restoring a checkpoint)") 1259816Sjthestness@gmail.com parser.add_option("--maxtime", type="float", default=None, 1269816Sjthestness@gmail.com help="Run to the specified absolute simulated time in " \ 1279816Sjthestness@gmail.com "seconds") 1288920Snilay@cs.wisc.edu parser.add_option("-I", "--maxinsts", action="store", type="int", 1298920Snilay@cs.wisc.edu default=None, help="""Total number of instructions to 1308920Snilay@cs.wisc.edu simulate (default: run forever)""") 1318920Snilay@cs.wisc.edu parser.add_option("--work-item-id", action="store", type="int", 1328920Snilay@cs.wisc.edu help="the specific work id for exit & checkpointing") 1338920Snilay@cs.wisc.edu parser.add_option("--work-begin-cpu-id-exit", action="store", type="int", 1348920Snilay@cs.wisc.edu help="exit when work starts on the specified cpu") 1358920Snilay@cs.wisc.edu parser.add_option("--work-end-exit-count", action="store", type="int", 1368920Snilay@cs.wisc.edu help="exit at specified work end count") 1378920Snilay@cs.wisc.edu parser.add_option("--work-begin-exit-count", action="store", type="int", 1388920Snilay@cs.wisc.edu help="exit at specified work begin count") 1398920Snilay@cs.wisc.edu parser.add_option("--init-param", action="store", type="int", default=0, 1408920Snilay@cs.wisc.edu help="""Parameter available in simulation with m5 1418920Snilay@cs.wisc.edu initparam""") 1426776SBrad.Beckmann@amd.com 1439800Snilay@cs.wisc.edu # Simpoint options 1449800Snilay@cs.wisc.edu parser.add_option("--simpoint-profile", action="store_true", 1459800Snilay@cs.wisc.edu help="Enable basic block profiling for SimPoints") 1469800Snilay@cs.wisc.edu parser.add_option("--simpoint-interval", type="int", default=10000000, 1479800Snilay@cs.wisc.edu help="SimPoint interval in num of instructions") 1489800Snilay@cs.wisc.edu 1498920Snilay@cs.wisc.edu # Checkpointing options 1508920Snilay@cs.wisc.edu ###Note that performing checkpointing via python script files will override 1518920Snilay@cs.wisc.edu ###checkpoint instructions built into binaries. 1528920Snilay@cs.wisc.edu parser.add_option("--take-checkpoints", action="store", type="string", 1539357Sandreas.hansson@arm.com help="<M,N> take checkpoints at tick M and every N ticks thereafter") 1548920Snilay@cs.wisc.edu parser.add_option("--max-checkpoints", action="store", type="int", 1558920Snilay@cs.wisc.edu help="the maximum number of checkpoints to drop", default=5) 1568920Snilay@cs.wisc.edu parser.add_option("--checkpoint-dir", action="store", type="string", 1578920Snilay@cs.wisc.edu help="Place all checkpoints in this absolute directory") 1588920Snilay@cs.wisc.edu parser.add_option("-r", "--checkpoint-restore", action="store", type="int", 1598920Snilay@cs.wisc.edu help="restore from checkpoint <N>") 1608920Snilay@cs.wisc.edu parser.add_option("--checkpoint-at-end", action="store_true", 1618920Snilay@cs.wisc.edu help="take a checkpoint at end of run") 1628920Snilay@cs.wisc.edu parser.add_option("--work-begin-checkpoint-count", action="store", type="int", 1638920Snilay@cs.wisc.edu help="checkpoint at specified work begin count") 1648920Snilay@cs.wisc.edu parser.add_option("--work-end-checkpoint-count", action="store", type="int", 1658920Snilay@cs.wisc.edu help="checkpoint at specified work end count") 1668920Snilay@cs.wisc.edu parser.add_option("--work-cpus-checkpoint-count", action="store", type="int", 1678920Snilay@cs.wisc.edu help="checkpoint and exit when active cpu count is reached") 1688920Snilay@cs.wisc.edu parser.add_option("--restore-with-cpu", action="store", type="choice", 1699736Sandreas@sandberg.pp.se default="atomic", choices=CpuConfig.cpu_names(), 1708920Snilay@cs.wisc.edu help = "cpu type for restoring from a checkpoint") 1713395Shsul@eecs.umich.edu 1725361Srstrong@cs.ucsd.edu 1738920Snilay@cs.wisc.edu # CPU Switching - default switch model goes from a checkpoint 1748920Snilay@cs.wisc.edu # to a timing simple CPU with caches to warm up, then to detailed CPU for 1758920Snilay@cs.wisc.edu # data measurement 1769151Satgutier@umich.edu parser.add_option("--repeat-switch", action="store", type="int", 1779151Satgutier@umich.edu default=None, 1789151Satgutier@umich.edu help="switch back and forth between CPUs with period <N>") 1799151Satgutier@umich.edu parser.add_option("-s", "--standard-switch", action="store", type="int", 1809151Satgutier@umich.edu default=None, 1819151Satgutier@umich.edu help="switch from timing to Detailed CPU after warmup period of <N>") 1829562Ssaidi@eecs.umich.edu parser.add_option("-p", "--prog-interval", type="str", 1838920Snilay@cs.wisc.edu help="CPU Progress Interval") 1848920Snilay@cs.wisc.edu 1858920Snilay@cs.wisc.edu # Fastforwarding and simpoint related materials 1868920Snilay@cs.wisc.edu parser.add_option("-W", "--warmup-insts", action="store", type="int", 1878920Snilay@cs.wisc.edu default=None, 1888920Snilay@cs.wisc.edu help="Warmup period in total instructions (requires --standard-switch)") 1898920Snilay@cs.wisc.edu parser.add_option("--bench", action="store", type="string", default=None, 1908920Snilay@cs.wisc.edu help="base names for --take-checkpoint and --checkpoint-restore") 1918920Snilay@cs.wisc.edu parser.add_option("-F", "--fast-forward", action="store", type="string", 1928920Snilay@cs.wisc.edu default=None, 1938920Snilay@cs.wisc.edu help="Number of instructions to fast forward before switching") 1948920Snilay@cs.wisc.edu parser.add_option("-S", "--simpoint", action="store_true", default=False, 1958920Snilay@cs.wisc.edu help="""Use workload simpoints as an instruction offset for 1968920Snilay@cs.wisc.edu --checkpoint-restore or --take-checkpoint.""") 1978920Snilay@cs.wisc.edu parser.add_option("--at-instruction", action="store_true", default=False, 1988920Snilay@cs.wisc.edu help="""Treat value of --checkpoint-restore or --take-checkpoint as a 1998920Snilay@cs.wisc.edu number of instructions.""") 2008920Snilay@cs.wisc.edu 2018920Snilay@cs.wisc.edudef addSEOptions(parser): 2028920Snilay@cs.wisc.edu # Benchmark options 2038920Snilay@cs.wisc.edu parser.add_option("-c", "--cmd", default="", 2048920Snilay@cs.wisc.edu help="The binary to run in syscall emulation mode.") 2058920Snilay@cs.wisc.edu parser.add_option("-o", "--options", default="", 2068920Snilay@cs.wisc.edu help="""The options to pass to the binary, use " " 2078920Snilay@cs.wisc.edu around the entire string""") 2088920Snilay@cs.wisc.edu parser.add_option("-i", "--input", default="", 2098920Snilay@cs.wisc.edu help="Read stdin from a file.") 2108920Snilay@cs.wisc.edu parser.add_option("--output", default="", 2118920Snilay@cs.wisc.edu help="Redirect stdout to a file.") 2128920Snilay@cs.wisc.edu parser.add_option("--errout", default="", 2138920Snilay@cs.wisc.edu help="Redirect stderr to a file.") 2148920Snilay@cs.wisc.edu 2158920Snilay@cs.wisc.edudef addFSOptions(parser): 2168920Snilay@cs.wisc.edu # Simulation options 2178920Snilay@cs.wisc.edu parser.add_option("--timesync", action="store_true", 2188920Snilay@cs.wisc.edu help="Prevent simulated time from getting ahead of real time") 2198920Snilay@cs.wisc.edu 2208920Snilay@cs.wisc.edu # System options 2218920Snilay@cs.wisc.edu parser.add_option("--kernel", action="store", type="string") 2228920Snilay@cs.wisc.edu parser.add_option("--script", action="store", type="string") 2238920Snilay@cs.wisc.edu parser.add_option("--frame-capture", action="store_true", 2248920Snilay@cs.wisc.edu help="Stores changed frame buffers from the VNC server to compressed "\ 2258920Snilay@cs.wisc.edu "files in the gem5 output directory") 2268920Snilay@cs.wisc.edu 2278920Snilay@cs.wisc.edu if buildEnv['TARGET_ISA'] == "arm": 2288920Snilay@cs.wisc.edu parser.add_option("--bare-metal", action="store_true", 2298920Snilay@cs.wisc.edu help="Provide the raw system without the linux specific bits") 2308920Snilay@cs.wisc.edu parser.add_option("--machine-type", action="store", type="choice", 2318920Snilay@cs.wisc.edu choices=ArmMachineType.map.keys(), default="RealView_PBX") 2329539Satgutier@umich.edu parser.add_option("--dtb-filename", action="store", type="string", 2339539Satgutier@umich.edu help="Specifies device tree blob file to use with device-tree-"\ 2349539Satgutier@umich.edu "enabled kernels") 2359935Sdam.sunwoo@arm.com parser.add_option("--enable-context-switch-stats-dump", \ 2369935Sdam.sunwoo@arm.com action="store_true", help="Enable stats dump at context "\ 2379935Sdam.sunwoo@arm.com "switches and dump tasks file (required for Streamline)") 2389935Sdam.sunwoo@arm.com 2398920Snilay@cs.wisc.edu # Benchmark options 2408920Snilay@cs.wisc.edu parser.add_option("--dual", action="store_true", 2418920Snilay@cs.wisc.edu help="Simulate two systems attached with an ethernet link") 2428920Snilay@cs.wisc.edu parser.add_option("-b", "--benchmark", action="store", type="string", 2438920Snilay@cs.wisc.edu dest="benchmark", 2448920Snilay@cs.wisc.edu help="Specify the benchmark to run. Available benchmarks: %s"\ 2458920Snilay@cs.wisc.edu % DefinedBenchmarks) 2468920Snilay@cs.wisc.edu 2478920Snilay@cs.wisc.edu # Metafile options 2488920Snilay@cs.wisc.edu parser.add_option("--etherdump", action="store", type="string", dest="etherdump", 2498920Snilay@cs.wisc.edu help="Specify the filename to dump a pcap capture of the" \ 2508920Snilay@cs.wisc.edu "ethernet traffic") 2518956Sjayneel@cs.wisc.edu 2528956Sjayneel@cs.wisc.edu # Disk Image Options 2538956Sjayneel@cs.wisc.edu parser.add_option("--disk-image", action="store", type="string", default=None, 2548956Sjayneel@cs.wisc.edu help="Path to the disk image to use.") 255