Options.py revision 13357
19665Sandreas.hansson@arm.com# Copyright (c) 2013 ARM Limited 29665Sandreas.hansson@arm.com# All rights reserved. 39665Sandreas.hansson@arm.com# 49665Sandreas.hansson@arm.com# The license below extends only to copyright in the software and shall 59665Sandreas.hansson@arm.com# not be construed as granting a license to any other intellectual 69665Sandreas.hansson@arm.com# property including but not limited to intellectual property relating 79665Sandreas.hansson@arm.com# to a hardware implementation of the functionality of the software 89665Sandreas.hansson@arm.com# licensed hereunder. You may use the software subject to the license 99665Sandreas.hansson@arm.com# terms below provided that you ensure that this notice is replicated 109665Sandreas.hansson@arm.com# unmodified and in its entirety in all distributions of the software, 119665Sandreas.hansson@arm.com# modified or unmodified, in source code or in binary form. 129665Sandreas.hansson@arm.com# 135353Svilas.sridharan@gmail.com# Copyright (c) 2006-2008 The Regents of The University of Michigan 143395Shsul@eecs.umich.edu# All rights reserved. 153395Shsul@eecs.umich.edu# 163395Shsul@eecs.umich.edu# Redistribution and use in source and binary forms, with or without 173395Shsul@eecs.umich.edu# modification, are permitted provided that the following conditions are 183395Shsul@eecs.umich.edu# met: redistributions of source code must retain the above copyright 193395Shsul@eecs.umich.edu# notice, this list of conditions and the following disclaimer; 203395Shsul@eecs.umich.edu# redistributions in binary form must reproduce the above copyright 213395Shsul@eecs.umich.edu# notice, this list of conditions and the following disclaimer in the 223395Shsul@eecs.umich.edu# documentation and/or other materials provided with the distribution; 233395Shsul@eecs.umich.edu# neither the name of the copyright holders nor the names of its 243395Shsul@eecs.umich.edu# contributors may be used to endorse or promote products derived from 253395Shsul@eecs.umich.edu# this software without specific prior written permission. 263395Shsul@eecs.umich.edu# 273395Shsul@eecs.umich.edu# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 283395Shsul@eecs.umich.edu# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 293395Shsul@eecs.umich.edu# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 303395Shsul@eecs.umich.edu# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 313395Shsul@eecs.umich.edu# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 323395Shsul@eecs.umich.edu# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 333395Shsul@eecs.umich.edu# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 343395Shsul@eecs.umich.edu# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 353395Shsul@eecs.umich.edu# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 363395Shsul@eecs.umich.edu# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 373395Shsul@eecs.umich.edu# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 383395Shsul@eecs.umich.edu# 393395Shsul@eecs.umich.edu# Authors: Lisa Hsu 403395Shsul@eecs.umich.edu 418920Snilay@cs.wisc.eduimport m5 428920Snilay@cs.wisc.edufrom m5.defines import buildEnv 438920Snilay@cs.wisc.edufrom m5.objects import * 4411688Sandreas.hansson@arm.comfrom common.Benchmarks import * 457025SBrad.Beckmann@amd.com 4611688Sandreas.hansson@arm.comfrom common import CpuConfig 4711688Sandreas.hansson@arm.comfrom common import MemConfig 4811688Sandreas.hansson@arm.comfrom common import PlatformConfig 4910747SChris.Emmons@arm.com 509520SAndreas.Sandberg@ARM.comdef _listCpuTypes(option, opt, value, parser): 519520SAndreas.Sandberg@ARM.com CpuConfig.print_cpu_list() 529520SAndreas.Sandberg@ARM.com sys.exit(0) 539520SAndreas.Sandberg@ARM.com 549665Sandreas.hansson@arm.comdef _listMemTypes(option, opt, value, parser): 559665Sandreas.hansson@arm.com MemConfig.print_mem_list() 569665Sandreas.hansson@arm.com sys.exit(0) 579665Sandreas.hansson@arm.com 5811238Sandreas.sandberg@arm.comdef _listPlatformTypes(option, opt, value, parser): 5911238Sandreas.sandberg@arm.com PlatformConfig.print_platform_list() 6011238Sandreas.sandberg@arm.com sys.exit(0) 6111238Sandreas.sandberg@arm.com 6211688Sandreas.hansson@arm.com# Add the very basic options that work also in the case of the no ISA 6311688Sandreas.hansson@arm.com# being used, and consequently no CPUs, but rather various types of 6411688Sandreas.hansson@arm.com# testers and traffic generators. 6511688Sandreas.hansson@arm.comdef addNoISAOptions(parser): 668920Snilay@cs.wisc.edu parser.add_option("-n", "--num-cpus", type="int", default=1) 679827Sakash.bagdia@arm.com parser.add_option("--sys-voltage", action="store", type="string", 689827Sakash.bagdia@arm.com default='1.0V', 699827Sakash.bagdia@arm.com help = """Top-level voltage for blocks running at system 709827Sakash.bagdia@arm.com power supply""") 719790Sakash.bagdia@arm.com parser.add_option("--sys-clock", action="store", type="string", 729790Sakash.bagdia@arm.com default='1GHz', 739790Sakash.bagdia@arm.com help = """Top-level clock for blocks running at system 749790Sakash.bagdia@arm.com speed""") 7511688Sandreas.hansson@arm.com 7611688Sandreas.hansson@arm.com # Memory Options 7711688Sandreas.hansson@arm.com parser.add_option("--list-mem-types", 7811688Sandreas.hansson@arm.com action="callback", callback=_listMemTypes, 7911688Sandreas.hansson@arm.com help="List available memory types") 8011837Swendy.elsasser@arm.com parser.add_option("--mem-type", type="choice", default="DDR3_1600_8x8", 8111688Sandreas.hansson@arm.com choices=MemConfig.mem_names(), 8211688Sandreas.hansson@arm.com help = "type of memory to use") 8311688Sandreas.hansson@arm.com parser.add_option("--mem-channels", type="int", default=1, 8411688Sandreas.hansson@arm.com help = "number of memory channels") 8511688Sandreas.hansson@arm.com parser.add_option("--mem-ranks", type="int", default=None, 8611688Sandreas.hansson@arm.com help = "number of memory ranks per channel") 8711688Sandreas.hansson@arm.com parser.add_option("--mem-size", action="store", type="string", 8811688Sandreas.hansson@arm.com default="512MB", 8911688Sandreas.hansson@arm.com help="Specify the physical memory size (single memory)") 9011688Sandreas.hansson@arm.com 9111688Sandreas.hansson@arm.com 9211688Sandreas.hansson@arm.com parser.add_option("--memchecker", action="store_true") 9311688Sandreas.hansson@arm.com 9411688Sandreas.hansson@arm.com # Cache Options 9511688Sandreas.hansson@arm.com parser.add_option("--external-memory-system", type="string", 9611688Sandreas.hansson@arm.com help="use external ports of this port_type for caches") 9711688Sandreas.hansson@arm.com parser.add_option("--tlm-memory", type="string", 9811688Sandreas.hansson@arm.com help="use external port for SystemC TLM cosimulation") 9911688Sandreas.hansson@arm.com parser.add_option("--caches", action="store_true") 10011688Sandreas.hansson@arm.com parser.add_option("--l2cache", action="store_true") 10111688Sandreas.hansson@arm.com parser.add_option("--num-dirs", type="int", default=1) 10211688Sandreas.hansson@arm.com parser.add_option("--num-l2caches", type="int", default=1) 10311688Sandreas.hansson@arm.com parser.add_option("--num-l3caches", type="int", default=1) 10411688Sandreas.hansson@arm.com parser.add_option("--l1d_size", type="string", default="64kB") 10511688Sandreas.hansson@arm.com parser.add_option("--l1i_size", type="string", default="32kB") 10611688Sandreas.hansson@arm.com parser.add_option("--l2_size", type="string", default="2MB") 10711688Sandreas.hansson@arm.com parser.add_option("--l3_size", type="string", default="16MB") 10811688Sandreas.hansson@arm.com parser.add_option("--l1d_assoc", type="int", default=2) 10911688Sandreas.hansson@arm.com parser.add_option("--l1i_assoc", type="int", default=2) 11011688Sandreas.hansson@arm.com parser.add_option("--l2_assoc", type="int", default=8) 11111688Sandreas.hansson@arm.com parser.add_option("--l3_assoc", type="int", default=16) 11211688Sandreas.hansson@arm.com parser.add_option("--cacheline_size", type="int", default=64) 11311688Sandreas.hansson@arm.com 11411688Sandreas.hansson@arm.com # Enable Ruby 11511688Sandreas.hansson@arm.com parser.add_option("--ruby", action="store_true") 11611688Sandreas.hansson@arm.com 11711688Sandreas.hansson@arm.com # Run duration options 11811688Sandreas.hansson@arm.com parser.add_option("-m", "--abs-max-tick", type="int", default=m5.MaxTick, 11911688Sandreas.hansson@arm.com metavar="TICKS", help="Run to absolute simulated tick " 12011688Sandreas.hansson@arm.com "specified including ticks from a restored checkpoint") 12111688Sandreas.hansson@arm.com parser.add_option("--rel-max-tick", type="int", default=None, 12211688Sandreas.hansson@arm.com metavar="TICKS", help="Simulate for specified number of" 12311688Sandreas.hansson@arm.com " ticks relative to the simulation start tick (e.g. if " 12411688Sandreas.hansson@arm.com "restoring a checkpoint)") 12511688Sandreas.hansson@arm.com parser.add_option("--maxtime", type="float", default=None, 12611688Sandreas.hansson@arm.com help="Run to the specified absolute simulated time in " 12711688Sandreas.hansson@arm.com "seconds") 12813357Sciro.santilli@arm.com parser.add_option("-P", "--param", action="append", default=[], 12913357Sciro.santilli@arm.com help="Set a SimObject parameter relative to the root node. " 13013357Sciro.santilli@arm.com "An extended Python multi range slicing syntax can be used " 13113357Sciro.santilli@arm.com "for arrays. For example: " 13213357Sciro.santilli@arm.com "'system.cpu[0,1,3:8:2].max_insts_all_threads = 42' " 13313357Sciro.santilli@arm.com "sets max_insts_all_threads for cpus 0, 1, 3, 5 and 7 " 13413357Sciro.santilli@arm.com "Direct parameters of the root object are not accessible, " 13513357Sciro.santilli@arm.com "only parameters of its children.") 13611688Sandreas.hansson@arm.com 13711688Sandreas.hansson@arm.com# Add common options that assume a non-NULL ISA. 13811688Sandreas.hansson@arm.comdef addCommonOptions(parser): 13911688Sandreas.hansson@arm.com # start by adding the base options that do not assume an ISA 14011688Sandreas.hansson@arm.com addNoISAOptions(parser) 14111688Sandreas.hansson@arm.com 14211688Sandreas.hansson@arm.com # system options 14311688Sandreas.hansson@arm.com parser.add_option("--list-cpu-types", 14411688Sandreas.hansson@arm.com action="callback", callback=_listCpuTypes, 14511688Sandreas.hansson@arm.com help="List available CPU types") 14611995Sgabeblack@google.com parser.add_option("--cpu-type", type="choice", default="AtomicSimpleCPU", 14711688Sandreas.hansson@arm.com choices=CpuConfig.cpu_names(), 14811688Sandreas.hansson@arm.com help = "type of cpu to run with") 14911688Sandreas.hansson@arm.com parser.add_option("--checker", action="store_true"); 1509789Sakash.bagdia@arm.com parser.add_option("--cpu-clock", action="store", type="string", 1519789Sakash.bagdia@arm.com default='2GHz', 1529789Sakash.bagdia@arm.com help="Clock for blocks running at CPU speed") 1539800Snilay@cs.wisc.edu parser.add_option("--smt", action="store_true", default=False, 1549800Snilay@cs.wisc.edu help = """ 1559800Snilay@cs.wisc.edu Only used if multiple programs are specified. If true, 1569800Snilay@cs.wisc.edu then the number of threads per cpu is same as the 1579800Snilay@cs.wisc.edu number of programs.""") 15811251Sradhika.jagtap@ARM.com parser.add_option("--elastic-trace-en", action="store_true", 15911251Sradhika.jagtap@ARM.com help="""Enable capture of data dependency and instruction 16011251Sradhika.jagtap@ARM.com fetch traces using elastic trace probe.""") 16111251Sradhika.jagtap@ARM.com # Trace file paths input to trace probe in a capture simulation and input 16211251Sradhika.jagtap@ARM.com # to Trace CPU in a replay simulation 16311251Sradhika.jagtap@ARM.com parser.add_option("--inst-trace-file", action="store", type="string", 16411251Sradhika.jagtap@ARM.com help="""Instruction fetch trace file input to 16511251Sradhika.jagtap@ARM.com Elastic Trace probe in a capture simulation and 16611251Sradhika.jagtap@ARM.com Trace CPU in a replay simulation""", default="") 16711251Sradhika.jagtap@ARM.com parser.add_option("--data-trace-file", action="store", type="string", 16811251Sradhika.jagtap@ARM.com help="""Data dependency trace file input to 16911251Sradhika.jagtap@ARM.com Elastic Trace probe in a capture simulation and 17011251Sradhika.jagtap@ARM.com Trace CPU in a replay simulation""", default="") 1719800Snilay@cs.wisc.edu 17210037SARM gem5 Developers parser.add_option("-l", "--lpae", action="store_true") 17310037SARM gem5 Developers parser.add_option("-V", "--virtualisation", action="store_true") 17410037SARM gem5 Developers 17511626Smichael.lebeane@amd.com # dist-gem5 options 17611626Smichael.lebeane@amd.com parser.add_option("--dist", action="store_true", 17711626Smichael.lebeane@amd.com help="Parallel distributed gem5 simulation.") 17811703Smichael.lebeane@amd.com parser.add_option("--dist-sync-on-pseudo-op", action="store_true", 17911703Smichael.lebeane@amd.com help="Use a pseudo-op to start dist-gem5 synchronization.") 18011626Smichael.lebeane@amd.com parser.add_option("--is-switch", action="store_true", 18111626Smichael.lebeane@amd.com help="Select the network switch simulator process for a"\ 18211626Smichael.lebeane@amd.com "distributed gem5 run") 18311626Smichael.lebeane@amd.com parser.add_option("--dist-rank", default=0, action="store", type="int", 18411626Smichael.lebeane@amd.com help="Rank of this system within the dist gem5 run.") 18511626Smichael.lebeane@amd.com parser.add_option("--dist-size", default=0, action="store", type="int", 18611626Smichael.lebeane@amd.com help="Number of gem5 processes within the dist gem5 run.") 18711626Smichael.lebeane@amd.com parser.add_option("--dist-server-name", 18811626Smichael.lebeane@amd.com default="127.0.0.1", 18911626Smichael.lebeane@amd.com action="store", type="string", 19011626Smichael.lebeane@amd.com help="Name of the message server host\nDEFAULT: localhost") 19111626Smichael.lebeane@amd.com parser.add_option("--dist-server-port", 19211626Smichael.lebeane@amd.com default=2200, 19311626Smichael.lebeane@amd.com action="store", type="int", 19411626Smichael.lebeane@amd.com help="Message server listen port\nDEFAULT: 2200") 19511626Smichael.lebeane@amd.com parser.add_option("--dist-sync-repeat", 19611626Smichael.lebeane@amd.com default="0us", 19711626Smichael.lebeane@amd.com action="store", type="string", 19811626Smichael.lebeane@amd.com help="Repeat interval for synchronisation barriers among dist-gem5 processes\nDEFAULT: --ethernet-linkdelay") 19911626Smichael.lebeane@amd.com parser.add_option("--dist-sync-start", 20011626Smichael.lebeane@amd.com default="5200000000000t", 20111626Smichael.lebeane@amd.com action="store", type="string", 20211626Smichael.lebeane@amd.com help="Time to schedule the first dist synchronisation barrier\nDEFAULT:5200000000000t") 20311626Smichael.lebeane@amd.com parser.add_option("--ethernet-linkspeed", default="10Gbps", 20411626Smichael.lebeane@amd.com action="store", type="string", 20511626Smichael.lebeane@amd.com help="Link speed in bps\nDEFAULT: 10Gbps") 20611626Smichael.lebeane@amd.com parser.add_option("--ethernet-linkdelay", default="10us", 20711626Smichael.lebeane@amd.com action="store", type="string", 20811626Smichael.lebeane@amd.com help="Link delay in seconds\nDEFAULT: 10us") 20911626Smichael.lebeane@amd.com 2108920Snilay@cs.wisc.edu # Run duration options 2118920Snilay@cs.wisc.edu parser.add_option("-I", "--maxinsts", action="store", type="int", 2128920Snilay@cs.wisc.edu default=None, help="""Total number of instructions to 2138920Snilay@cs.wisc.edu simulate (default: run forever)""") 2148920Snilay@cs.wisc.edu parser.add_option("--work-item-id", action="store", type="int", 2158920Snilay@cs.wisc.edu help="the specific work id for exit & checkpointing") 21610159Sgedare@rtems.org parser.add_option("--num-work-ids", action="store", type="int", 21710159Sgedare@rtems.org help="Number of distinct work item types") 2188920Snilay@cs.wisc.edu parser.add_option("--work-begin-cpu-id-exit", action="store", type="int", 2198920Snilay@cs.wisc.edu help="exit when work starts on the specified cpu") 2208920Snilay@cs.wisc.edu parser.add_option("--work-end-exit-count", action="store", type="int", 2218920Snilay@cs.wisc.edu help="exit at specified work end count") 2228920Snilay@cs.wisc.edu parser.add_option("--work-begin-exit-count", action="store", type="int", 2238920Snilay@cs.wisc.edu help="exit at specified work begin count") 2248920Snilay@cs.wisc.edu parser.add_option("--init-param", action="store", type="int", default=0, 2258920Snilay@cs.wisc.edu help="""Parameter available in simulation with m5 2268920Snilay@cs.wisc.edu initparam""") 22710757SCurtis.Dunham@arm.com parser.add_option("--initialize-only", action="store_true", default=False, 22810757SCurtis.Dunham@arm.com help="""Exit after initialization. Do not simulate time. 22910757SCurtis.Dunham@arm.com Useful when gem5 is run as a library.""") 2306776SBrad.Beckmann@amd.com 2319800Snilay@cs.wisc.edu # Simpoint options 2329800Snilay@cs.wisc.edu parser.add_option("--simpoint-profile", action="store_true", 2339800Snilay@cs.wisc.edu help="Enable basic block profiling for SimPoints") 2349800Snilay@cs.wisc.edu parser.add_option("--simpoint-interval", type="int", default=10000000, 2359800Snilay@cs.wisc.edu help="SimPoint interval in num of instructions") 23610608Sdam.sunwoo@arm.com parser.add_option("--take-simpoint-checkpoints", action="store", type="string", 23710608Sdam.sunwoo@arm.com help="<simpoint file,weight file,interval-length,warmup-length>") 23810608Sdam.sunwoo@arm.com parser.add_option("--restore-simpoint-checkpoint", action="store_true", 23910608Sdam.sunwoo@arm.com help="restore from a simpoint checkpoint taken with " + 24010608Sdam.sunwoo@arm.com "--take-simpoint-checkpoints") 2419800Snilay@cs.wisc.edu 2428920Snilay@cs.wisc.edu # Checkpointing options 2438920Snilay@cs.wisc.edu ###Note that performing checkpointing via python script files will override 2448920Snilay@cs.wisc.edu ###checkpoint instructions built into binaries. 2458920Snilay@cs.wisc.edu parser.add_option("--take-checkpoints", action="store", type="string", 2469357Sandreas.hansson@arm.com help="<M,N> take checkpoints at tick M and every N ticks thereafter") 2478920Snilay@cs.wisc.edu parser.add_option("--max-checkpoints", action="store", type="int", 2488920Snilay@cs.wisc.edu help="the maximum number of checkpoints to drop", default=5) 2498920Snilay@cs.wisc.edu parser.add_option("--checkpoint-dir", action="store", type="string", 2508920Snilay@cs.wisc.edu help="Place all checkpoints in this absolute directory") 2518920Snilay@cs.wisc.edu parser.add_option("-r", "--checkpoint-restore", action="store", type="int", 2528920Snilay@cs.wisc.edu help="restore from checkpoint <N>") 2538920Snilay@cs.wisc.edu parser.add_option("--checkpoint-at-end", action="store_true", 2548920Snilay@cs.wisc.edu help="take a checkpoint at end of run") 2558920Snilay@cs.wisc.edu parser.add_option("--work-begin-checkpoint-count", action="store", type="int", 2568920Snilay@cs.wisc.edu help="checkpoint at specified work begin count") 2578920Snilay@cs.wisc.edu parser.add_option("--work-end-checkpoint-count", action="store", type="int", 2588920Snilay@cs.wisc.edu help="checkpoint at specified work end count") 2598920Snilay@cs.wisc.edu parser.add_option("--work-cpus-checkpoint-count", action="store", type="int", 2608920Snilay@cs.wisc.edu help="checkpoint and exit when active cpu count is reached") 2618920Snilay@cs.wisc.edu parser.add_option("--restore-with-cpu", action="store", type="choice", 26211995Sgabeblack@google.com default="AtomicSimpleCPU", choices=CpuConfig.cpu_names(), 2638920Snilay@cs.wisc.edu help = "cpu type for restoring from a checkpoint") 2643395Shsul@eecs.umich.edu 2655361Srstrong@cs.ucsd.edu 2668920Snilay@cs.wisc.edu # CPU Switching - default switch model goes from a checkpoint 2678920Snilay@cs.wisc.edu # to a timing simple CPU with caches to warm up, then to detailed CPU for 2688920Snilay@cs.wisc.edu # data measurement 2699151Satgutier@umich.edu parser.add_option("--repeat-switch", action="store", type="int", 2709151Satgutier@umich.edu default=None, 2719151Satgutier@umich.edu help="switch back and forth between CPUs with period <N>") 2729151Satgutier@umich.edu parser.add_option("-s", "--standard-switch", action="store", type="int", 2739151Satgutier@umich.edu default=None, 2749151Satgutier@umich.edu help="switch from timing to Detailed CPU after warmup period of <N>") 2759562Ssaidi@eecs.umich.edu parser.add_option("-p", "--prog-interval", type="str", 2768920Snilay@cs.wisc.edu help="CPU Progress Interval") 2778920Snilay@cs.wisc.edu 2788920Snilay@cs.wisc.edu # Fastforwarding and simpoint related materials 2798920Snilay@cs.wisc.edu parser.add_option("-W", "--warmup-insts", action="store", type="int", 2808920Snilay@cs.wisc.edu default=None, 2818920Snilay@cs.wisc.edu help="Warmup period in total instructions (requires --standard-switch)") 2828920Snilay@cs.wisc.edu parser.add_option("--bench", action="store", type="string", default=None, 2838920Snilay@cs.wisc.edu help="base names for --take-checkpoint and --checkpoint-restore") 2848920Snilay@cs.wisc.edu parser.add_option("-F", "--fast-forward", action="store", type="string", 2858920Snilay@cs.wisc.edu default=None, 2868920Snilay@cs.wisc.edu help="Number of instructions to fast forward before switching") 2878920Snilay@cs.wisc.edu parser.add_option("-S", "--simpoint", action="store_true", default=False, 2888920Snilay@cs.wisc.edu help="""Use workload simpoints as an instruction offset for 2898920Snilay@cs.wisc.edu --checkpoint-restore or --take-checkpoint.""") 2908920Snilay@cs.wisc.edu parser.add_option("--at-instruction", action="store_true", default=False, 2918920Snilay@cs.wisc.edu help="""Treat value of --checkpoint-restore or --take-checkpoint as a 2928920Snilay@cs.wisc.edu number of instructions.""") 29310037SARM gem5 Developers parser.add_option("--spec-input", default="ref", type="choice", 29410037SARM gem5 Developers choices=["ref", "test", "train", "smred", "mdred", 29510037SARM gem5 Developers "lgred"], 29610037SARM gem5 Developers help="Input set size for SPEC CPU2000 benchmarks.") 29710037SARM gem5 Developers parser.add_option("--arm-iset", default="arm", type="choice", 29810037SARM gem5 Developers choices=["arm", "thumb", "aarch64"], 29910037SARM gem5 Developers help="ARM instruction set.") 30010037SARM gem5 Developers 3018920Snilay@cs.wisc.edu 3028920Snilay@cs.wisc.edudef addSEOptions(parser): 3038920Snilay@cs.wisc.edu # Benchmark options 3048920Snilay@cs.wisc.edu parser.add_option("-c", "--cmd", default="", 3058920Snilay@cs.wisc.edu help="The binary to run in syscall emulation mode.") 3068920Snilay@cs.wisc.edu parser.add_option("-o", "--options", default="", 3078920Snilay@cs.wisc.edu help="""The options to pass to the binary, use " " 3088920Snilay@cs.wisc.edu around the entire string""") 30910803Sbrandon.potter@amd.com parser.add_option("-e", "--env", default="", 31010803Sbrandon.potter@amd.com help="Initialize workload environment from text file.") 3118920Snilay@cs.wisc.edu parser.add_option("-i", "--input", default="", 3128920Snilay@cs.wisc.edu help="Read stdin from a file.") 3138920Snilay@cs.wisc.edu parser.add_option("--output", default="", 3148920Snilay@cs.wisc.edu help="Redirect stdout to a file.") 3158920Snilay@cs.wisc.edu parser.add_option("--errout", default="", 3168920Snilay@cs.wisc.edu help="Redirect stderr to a file.") 3178920Snilay@cs.wisc.edu 3188920Snilay@cs.wisc.edudef addFSOptions(parser): 31911688Sandreas.hansson@arm.com from FSConfig import os_types 32011688Sandreas.hansson@arm.com 3218920Snilay@cs.wisc.edu # Simulation options 3228920Snilay@cs.wisc.edu parser.add_option("--timesync", action="store_true", 3238920Snilay@cs.wisc.edu help="Prevent simulated time from getting ahead of real time") 3248920Snilay@cs.wisc.edu 3258920Snilay@cs.wisc.edu # System options 3268920Snilay@cs.wisc.edu parser.add_option("--kernel", action="store", type="string") 32710747SChris.Emmons@arm.com parser.add_option("--os-type", action="store", type="choice", 32810747SChris.Emmons@arm.com choices=os_types[buildEnv['TARGET_ISA']], default="linux", 32910747SChris.Emmons@arm.com help="Specifies type of OS to boot") 3308920Snilay@cs.wisc.edu parser.add_option("--script", action="store", type="string") 3318920Snilay@cs.wisc.edu parser.add_option("--frame-capture", action="store_true", 3328920Snilay@cs.wisc.edu help="Stores changed frame buffers from the VNC server to compressed "\ 3338920Snilay@cs.wisc.edu "files in the gem5 output directory") 3348920Snilay@cs.wisc.edu 3358920Snilay@cs.wisc.edu if buildEnv['TARGET_ISA'] == "arm": 3368920Snilay@cs.wisc.edu parser.add_option("--bare-metal", action="store_true", 3378920Snilay@cs.wisc.edu help="Provide the raw system without the linux specific bits") 33811238Sandreas.sandberg@arm.com parser.add_option("--list-machine-types", 33911238Sandreas.sandberg@arm.com action="callback", callback=_listPlatformTypes, 34011238Sandreas.sandberg@arm.com help="List available platform types") 3418920Snilay@cs.wisc.edu parser.add_option("--machine-type", action="store", type="choice", 34211238Sandreas.sandberg@arm.com choices=PlatformConfig.platform_names(), 34311238Sandreas.sandberg@arm.com default="VExpress_EMM") 3449539Satgutier@umich.edu parser.add_option("--dtb-filename", action="store", type="string", 3459539Satgutier@umich.edu help="Specifies device tree blob file to use with device-tree-"\ 3469539Satgutier@umich.edu "enabled kernels") 34712079Sgedare@rtems.org parser.add_option("--enable-security-extensions", action="store_true", 34812079Sgedare@rtems.org help="Turn on the ARM Security Extensions") 3499935Sdam.sunwoo@arm.com parser.add_option("--enable-context-switch-stats-dump", \ 3509935Sdam.sunwoo@arm.com action="store_true", help="Enable stats dump at context "\ 3519935Sdam.sunwoo@arm.com "switches and dump tasks file (required for Streamline)") 35212475Sglenn.bergmans@arm.com parser.add_option("--generate-dtb", action="store_true", default=False, 35312475Sglenn.bergmans@arm.com help="Automatically generate a dtb file") 3549935Sdam.sunwoo@arm.com 3558920Snilay@cs.wisc.edu # Benchmark options 3568920Snilay@cs.wisc.edu parser.add_option("--dual", action="store_true", 3578920Snilay@cs.wisc.edu help="Simulate two systems attached with an ethernet link") 3588920Snilay@cs.wisc.edu parser.add_option("-b", "--benchmark", action="store", type="string", 3598920Snilay@cs.wisc.edu dest="benchmark", 3608920Snilay@cs.wisc.edu help="Specify the benchmark to run. Available benchmarks: %s"\ 3618920Snilay@cs.wisc.edu % DefinedBenchmarks) 3628920Snilay@cs.wisc.edu 3638920Snilay@cs.wisc.edu # Metafile options 3648920Snilay@cs.wisc.edu parser.add_option("--etherdump", action="store", type="string", dest="etherdump", 3658920Snilay@cs.wisc.edu help="Specify the filename to dump a pcap capture of the" \ 3668920Snilay@cs.wisc.edu "ethernet traffic") 3678956Sjayneel@cs.wisc.edu 3688956Sjayneel@cs.wisc.edu # Disk Image Options 3698956Sjayneel@cs.wisc.edu parser.add_option("--disk-image", action="store", type="string", default=None, 3708956Sjayneel@cs.wisc.edu help="Path to the disk image to use.") 37110697SCurtis.Dunham@arm.com parser.add_option("--root-device", action="store", type="string", default=None, 37210697SCurtis.Dunham@arm.com help="OS device name for root partition") 37310594Sgabeblack@google.com 37410594Sgabeblack@google.com # Command line options 37510594Sgabeblack@google.com parser.add_option("--command-line", action="store", type="string", 37610594Sgabeblack@google.com default=None, 37710594Sgabeblack@google.com help="Template for the kernel command line.") 37810594Sgabeblack@google.com parser.add_option("--command-line-file", action="store", 37910594Sgabeblack@google.com default=None, type="string", 38010594Sgabeblack@google.com help="File with a template for the kernel command line") 381