MAINTAINERS revision 14285:dd51c2516464 
1See CONTRIBUTING.md for details of gem5's contribution process.
2
3This file contains the keywords used in commit messages. Each keyword has one
4or more maintainers. At least one (not all) of these maintainers must review
5the patch before it can be pushed. These people will automatically be emailed
6when you upload the patch to Gerrit (https://gem5-review.googlesource.com).
7These keywords mostly follow the directory structure.
8
9Individuals on the project management committee are maintainers for all of the
10gem5 components (i.e., they can review any patch as the maintainer). These
11individuals are required to review any patches to components without explicit
12maintainers.
13
14PMC Members (general maintainers):
15  Ali Saidi <asaidi@gmail.com>
16  Andreas Sandberg <andreas.sandberg@arm.com>
17  Brad Beckmann <brad.beckmann@amd.com>
18  David Wood <david@cs.wisc.edu>
19  Gabe Black <gabeblack@google.com>
20  Jason Lowe-Power <jason@lowepower.com> (chair)
21  Matt Sinclair <sinclair@cs.wisc.edu>
22  Tony Gutierrez <anthony.gutierrez@amd.com>
23  Steve Reinhardt <stever@gmail.com>
24
25arch: General architecture-specific components
26  Gabe Black <gabeblack@google.com>
27arch-alpha:
28arch-arm:
29  Andreas Sandberg <andreas.sandberg@arm.com>
30arch-hsail:
31  Tony Gutierrez <anthony.gutierrez@amd.com>
32arch-mips:
33arch-power:
34arch-riscv:
35  Alec Roelke <ar4jc@virginia.edu>
36arch-sparc:
37  Gabe Black <gabeblack@google.com>
38arch-x86:
39  Gabe Black <gabeblack@google.com>
40
41base:
42
43configs:
44  Jason Lowe-Power <jason@lowepower.com>
45
46cpu: General changes to all CPU models (e.g., BaseCPU)
47cpu-kvm:
48  Andreas Sandberg <andreas.sandberg@arm.com>
49cpu-minor:
50cpu-o3:
51cpu-simple:
52
53dev:
54dev-virtio:
55  Andreas Sandberg <andreas.sandberg@arm.com>
56
57ext: Components external to gem5
58
59gpu-compute:
60  Tony Gutierrez <anthony.gutierrez@amd.com>
61
62learning-gem5: The code and configs for the Learning gem5 book (see
63               learning.gem5.com)
64  Jason Lowe-Power <jason@lowepower.com>
65
66mem: General memory system (e.g., XBar, Packet)
67  Nikos Nikoleris <nikos.nikoleris@arm.com>
68mem-cache: Classic caches and coherence
69  Nikos Nikoleris <nikos.nikoleris@arm.com>
70mem-garnet: Garnet subcomponent of Ruby
71  Tushar Krishna <tushar@ece.gatech.edu>
72mem-ruby: Ruby structures and protocols
73  Brad Beckmann <brad.beckmann@amd.com>
74  Jason Lowe-Power <jason@lowepower.com>
75
76misc: Anything outside of the other categories
77
78python: Python SimObject wrapping and infrastructure
79  Andreas Sandberg <andreas.sandberg@arm.com>
80
81scons: Build system
82
83sim: General simulation components
84  Jason Lowe-Power <jason@lowepower.com>
85sim-se: Syscall emulation
86  Brandon Potter <brandon.potter@amd.com>
87sim-power: Power modeling
88  Andreas Sandberg <andreas.sandberg@arm.com>
89
90stats: Updates to statistics for regressions
91
92system: System boot code and related components
93system-alpha:
94system-arm:
95  Andreas Sandberg <andreas.sandberg@arm.com>
96
97tests: testing changes (not stats updates for tests. See stats:)
98  Andreas Sandberg <andreas.sandberg@arm.com>
99
100util:
101